779 lines
49 KiB
C
779 lines
49 KiB
C
/*
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* OMAP44xx PRM instance offset macros
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*
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* Copyright (C) 2009-2010 Texas Instruments, Inc.
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* Copyright (C) 2009-2010 Nokia Corporation
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*
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* Paul Walmsley (paul@pwsan.com)
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* Rajendra Nayak (rnayak@ti.com)
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* Benoit Cousson (b-cousson@ti.com)
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*
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* This file is automatically generated from the OMAP hardware databases.
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* We respectfully ask that any modifications to this file be coordinated
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* with the public linux-omap@vger.kernel.org mailing list and the
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* authors above to ensure that the autogeneration scripts are kept
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* up-to-date with the file contents.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* XXX This file needs to be updated to align on one of "OMAP4", "OMAP44XX",
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* or "OMAP4430".
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*/
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#ifndef __ARCH_ARM_MACH_OMAP2_PRM44XX_H
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#define __ARCH_ARM_MACH_OMAP2_PRM44XX_H
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#include "prcm-common.h"
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#include "prm.h"
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#define OMAP4430_PRM_BASE 0x4a306000
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#define OMAP44XX_PRM_REGADDR(inst, reg) \
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OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE + (inst) + (reg))
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/* PRM instances */
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#define OMAP4430_PRM_OCP_SOCKET_INST 0x0000
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#define OMAP4430_PRM_CKGEN_INST 0x0100
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#define OMAP4430_PRM_MPU_INST 0x0300
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#define OMAP4430_PRM_TESLA_INST 0x0400
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#define OMAP4430_PRM_ABE_INST 0x0500
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#define OMAP4430_PRM_ALWAYS_ON_INST 0x0600
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#define OMAP4430_PRM_CORE_INST 0x0700
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#define OMAP4430_PRM_IVAHD_INST 0x0f00
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#define OMAP4430_PRM_CAM_INST 0x1000
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#define OMAP4430_PRM_DSS_INST 0x1100
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#define OMAP4430_PRM_GFX_INST 0x1200
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#define OMAP4430_PRM_L3INIT_INST 0x1300
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#define OMAP4430_PRM_L4PER_INST 0x1400
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#define OMAP4430_PRM_CEFUSE_INST 0x1600
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#define OMAP4430_PRM_WKUP_INST 0x1700
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#define OMAP4430_PRM_WKUP_CM_INST 0x1800
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#define OMAP4430_PRM_EMU_INST 0x1900
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#define OMAP4430_PRM_EMU_CM_INST 0x1a00
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#define OMAP4430_PRM_DEVICE_INST 0x1b00
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#define OMAP4430_PRM_INSTR_INST 0x1f00
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/* PRM clockdomain register offsets (from instance start) */
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#define OMAP4430_PRM_MPU_MPU_CDOFFS 0x0000
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#define OMAP4430_PRM_TESLA_TESLA_CDOFFS 0x0000
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#define OMAP4430_PRM_ABE_ABE_CDOFFS 0x0000
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#define OMAP4430_PRM_CORE_CORE_CDOFFS 0x0000
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#define OMAP4430_PRM_IVAHD_IVAHD_CDOFFS 0x0000
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#define OMAP4430_PRM_CAM_CAM_CDOFFS 0x0000
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#define OMAP4430_PRM_DSS_DSS_CDOFFS 0x0000
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#define OMAP4430_PRM_GFX_GFX_CDOFFS 0x0000
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#define OMAP4430_PRM_L3INIT_L3INIT_CDOFFS 0x0000
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#define OMAP4430_PRM_L4PER_L4PER_CDOFFS 0x0000
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#define OMAP4430_PRM_CEFUSE_CEFUSE_CDOFFS 0x0000
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#define OMAP4430_PRM_WKUP_CM_WKUP_CDOFFS 0x0000
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#define OMAP4430_PRM_EMU_EMU_CDOFFS 0x0000
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#define OMAP4430_PRM_EMU_CM_EMU_CDOFFS 0x0000
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/* OMAP4 specific register offsets */
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#define OMAP4_RM_RSTCTRL 0x0000
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#define OMAP4_RM_RSTTIME 0x0004
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#define OMAP4_RM_RSTST 0x0008
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#define OMAP4_PM_PWSTCTRL 0x0000
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#define OMAP4_PM_PWSTST 0x0004
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/* PRM */
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/* PRM.OCP_SOCKET_PRM register offsets */
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#define OMAP4_REVISION_PRM_OFFSET 0x0000
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#define OMAP4430_REVISION_PRM OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0000)
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#define OMAP4_PRM_IRQSTATUS_MPU_OFFSET 0x0010
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#define OMAP4430_PRM_IRQSTATUS_MPU OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0010)
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#define OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET 0x0014
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#define OMAP4430_PRM_IRQSTATUS_MPU_2 OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0014)
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#define OMAP4_PRM_IRQENABLE_MPU_OFFSET 0x0018
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#define OMAP4430_PRM_IRQENABLE_MPU OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0018)
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#define OMAP4_PRM_IRQENABLE_MPU_2_OFFSET 0x001c
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#define OMAP4430_PRM_IRQENABLE_MPU_2 OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x001c)
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#define OMAP4_PRM_IRQSTATUS_DUCATI_OFFSET 0x0020
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#define OMAP4430_PRM_IRQSTATUS_DUCATI OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0020)
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#define OMAP4_PRM_IRQENABLE_DUCATI_OFFSET 0x0028
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#define OMAP4430_PRM_IRQENABLE_DUCATI OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0028)
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#define OMAP4_PRM_IRQSTATUS_TESLA_OFFSET 0x0030
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#define OMAP4430_PRM_IRQSTATUS_TESLA OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0030)
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#define OMAP4_PRM_IRQENABLE_TESLA_OFFSET 0x0038
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#define OMAP4430_PRM_IRQENABLE_TESLA OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0038)
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#define OMAP4_CM_PRM_PROFILING_CLKCTRL_OFFSET 0x0040
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#define OMAP4430_CM_PRM_PROFILING_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0040)
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/* PRM.CKGEN_PRM register offsets */
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#define OMAP4_CM_ABE_DSS_SYS_CLKSEL_OFFSET 0x0000
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#define OMAP4430_CM_ABE_DSS_SYS_CLKSEL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CKGEN_INST, 0x0000)
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#define OMAP4_CM_L4_WKUP_CLKSEL_OFFSET 0x0008
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#define OMAP4430_CM_L4_WKUP_CLKSEL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CKGEN_INST, 0x0008)
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#define OMAP4_CM_ABE_PLL_REF_CLKSEL_OFFSET 0x000c
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#define OMAP4430_CM_ABE_PLL_REF_CLKSEL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CKGEN_INST, 0x000c)
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#define OMAP4_CM_SYS_CLKSEL_OFFSET 0x0010
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#define OMAP4430_CM_SYS_CLKSEL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CKGEN_INST, 0x0010)
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/* PRM.MPU_PRM register offsets */
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#define OMAP4_PM_MPU_PWRSTCTRL_OFFSET 0x0000
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#define OMAP4430_PM_MPU_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_MPU_INST, 0x0000)
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#define OMAP4_PM_MPU_PWRSTST_OFFSET 0x0004
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#define OMAP4430_PM_MPU_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_MPU_INST, 0x0004)
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#define OMAP4_RM_MPU_RSTST_OFFSET 0x0014
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#define OMAP4430_RM_MPU_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_MPU_INST, 0x0014)
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#define OMAP4_RM_MPU_MPU_CONTEXT_OFFSET 0x0024
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#define OMAP4430_RM_MPU_MPU_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_MPU_INST, 0x0024)
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/* PRM.TESLA_PRM register offsets */
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#define OMAP4_PM_TESLA_PWRSTCTRL_OFFSET 0x0000
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#define OMAP4430_PM_TESLA_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_TESLA_INST, 0x0000)
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#define OMAP4_PM_TESLA_PWRSTST_OFFSET 0x0004
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#define OMAP4430_PM_TESLA_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_TESLA_INST, 0x0004)
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#define OMAP4_RM_TESLA_RSTCTRL_OFFSET 0x0010
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#define OMAP4430_RM_TESLA_RSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_TESLA_INST, 0x0010)
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#define OMAP4_RM_TESLA_RSTST_OFFSET 0x0014
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#define OMAP4430_RM_TESLA_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_TESLA_INST, 0x0014)
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#define OMAP4_RM_TESLA_TESLA_CONTEXT_OFFSET 0x0024
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#define OMAP4430_RM_TESLA_TESLA_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_TESLA_INST, 0x0024)
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/* PRM.ABE_PRM register offsets */
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#define OMAP4_PM_ABE_PWRSTCTRL_OFFSET 0x0000
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#define OMAP4430_PM_ABE_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0000)
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#define OMAP4_PM_ABE_PWRSTST_OFFSET 0x0004
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#define OMAP4430_PM_ABE_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0004)
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#define OMAP4_RM_ABE_AESS_CONTEXT_OFFSET 0x002c
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#define OMAP4430_RM_ABE_AESS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x002c)
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#define OMAP4_PM_ABE_PDM_WKDEP_OFFSET 0x0030
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#define OMAP4430_PM_ABE_PDM_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0030)
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#define OMAP4_RM_ABE_PDM_CONTEXT_OFFSET 0x0034
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#define OMAP4430_RM_ABE_PDM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0034)
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#define OMAP4_PM_ABE_DMIC_WKDEP_OFFSET 0x0038
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#define OMAP4430_PM_ABE_DMIC_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0038)
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#define OMAP4_RM_ABE_DMIC_CONTEXT_OFFSET 0x003c
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#define OMAP4430_RM_ABE_DMIC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x003c)
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#define OMAP4_PM_ABE_MCASP_WKDEP_OFFSET 0x0040
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#define OMAP4430_PM_ABE_MCASP_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0040)
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#define OMAP4_RM_ABE_MCASP_CONTEXT_OFFSET 0x0044
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#define OMAP4430_RM_ABE_MCASP_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0044)
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#define OMAP4_PM_ABE_MCBSP1_WKDEP_OFFSET 0x0048
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#define OMAP4430_PM_ABE_MCBSP1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0048)
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#define OMAP4_RM_ABE_MCBSP1_CONTEXT_OFFSET 0x004c
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#define OMAP4430_RM_ABE_MCBSP1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x004c)
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#define OMAP4_PM_ABE_MCBSP2_WKDEP_OFFSET 0x0050
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#define OMAP4430_PM_ABE_MCBSP2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0050)
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#define OMAP4_RM_ABE_MCBSP2_CONTEXT_OFFSET 0x0054
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#define OMAP4430_RM_ABE_MCBSP2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0054)
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#define OMAP4_PM_ABE_MCBSP3_WKDEP_OFFSET 0x0058
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#define OMAP4430_PM_ABE_MCBSP3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0058)
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#define OMAP4_RM_ABE_MCBSP3_CONTEXT_OFFSET 0x005c
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#define OMAP4430_RM_ABE_MCBSP3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x005c)
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#define OMAP4_PM_ABE_SLIMBUS_WKDEP_OFFSET 0x0060
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#define OMAP4430_PM_ABE_SLIMBUS_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0060)
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#define OMAP4_RM_ABE_SLIMBUS_CONTEXT_OFFSET 0x0064
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#define OMAP4430_RM_ABE_SLIMBUS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0064)
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#define OMAP4_PM_ABE_TIMER5_WKDEP_OFFSET 0x0068
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#define OMAP4430_PM_ABE_TIMER5_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0068)
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#define OMAP4_RM_ABE_TIMER5_CONTEXT_OFFSET 0x006c
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#define OMAP4430_RM_ABE_TIMER5_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x006c)
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#define OMAP4_PM_ABE_TIMER6_WKDEP_OFFSET 0x0070
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#define OMAP4430_PM_ABE_TIMER6_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0070)
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#define OMAP4_RM_ABE_TIMER6_CONTEXT_OFFSET 0x0074
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#define OMAP4430_RM_ABE_TIMER6_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0074)
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#define OMAP4_PM_ABE_TIMER7_WKDEP_OFFSET 0x0078
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#define OMAP4430_PM_ABE_TIMER7_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0078)
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#define OMAP4_RM_ABE_TIMER7_CONTEXT_OFFSET 0x007c
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#define OMAP4430_RM_ABE_TIMER7_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x007c)
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#define OMAP4_PM_ABE_TIMER8_WKDEP_OFFSET 0x0080
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#define OMAP4430_PM_ABE_TIMER8_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0080)
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#define OMAP4_RM_ABE_TIMER8_CONTEXT_OFFSET 0x0084
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#define OMAP4430_RM_ABE_TIMER8_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0084)
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#define OMAP4_PM_ABE_WDT3_WKDEP_OFFSET 0x0088
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#define OMAP4430_PM_ABE_WDT3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0088)
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#define OMAP4_RM_ABE_WDT3_CONTEXT_OFFSET 0x008c
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#define OMAP4430_RM_ABE_WDT3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x008c)
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/* PRM.ALWAYS_ON_PRM register offsets */
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#define OMAP4_RM_ALWON_MDMINTC_CONTEXT_OFFSET 0x0024
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#define OMAP4430_RM_ALWON_MDMINTC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_INST, 0x0024)
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#define OMAP4_PM_ALWON_SR_MPU_WKDEP_OFFSET 0x0028
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#define OMAP4430_PM_ALWON_SR_MPU_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_INST, 0x0028)
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#define OMAP4_RM_ALWON_SR_MPU_CONTEXT_OFFSET 0x002c
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#define OMAP4430_RM_ALWON_SR_MPU_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_INST, 0x002c)
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#define OMAP4_PM_ALWON_SR_IVA_WKDEP_OFFSET 0x0030
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#define OMAP4430_PM_ALWON_SR_IVA_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_INST, 0x0030)
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#define OMAP4_RM_ALWON_SR_IVA_CONTEXT_OFFSET 0x0034
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#define OMAP4430_RM_ALWON_SR_IVA_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_INST, 0x0034)
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#define OMAP4_PM_ALWON_SR_CORE_WKDEP_OFFSET 0x0038
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#define OMAP4430_PM_ALWON_SR_CORE_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_INST, 0x0038)
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#define OMAP4_RM_ALWON_SR_CORE_CONTEXT_OFFSET 0x003c
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#define OMAP4430_RM_ALWON_SR_CORE_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_INST, 0x003c)
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/* PRM.CORE_PRM register offsets */
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#define OMAP4_PM_CORE_PWRSTCTRL_OFFSET 0x0000
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#define OMAP4430_PM_CORE_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0000)
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#define OMAP4_PM_CORE_PWRSTST_OFFSET 0x0004
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#define OMAP4430_PM_CORE_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0004)
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#define OMAP4_RM_L3_1_L3_1_CONTEXT_OFFSET 0x0024
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#define OMAP4430_RM_L3_1_L3_1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0024)
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#define OMAP4_RM_L3_2_L3_2_CONTEXT_OFFSET 0x0124
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#define OMAP4430_RM_L3_2_L3_2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0124)
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#define OMAP4_RM_L3_2_GPMC_CONTEXT_OFFSET 0x012c
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#define OMAP4430_RM_L3_2_GPMC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x012c)
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#define OMAP4_RM_L3_2_OCMC_RAM_CONTEXT_OFFSET 0x0134
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#define OMAP4430_RM_L3_2_OCMC_RAM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0134)
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#define OMAP4_RM_DUCATI_RSTCTRL_OFFSET 0x0210
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#define OMAP4430_RM_DUCATI_RSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0210)
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#define OMAP4_RM_DUCATI_RSTST_OFFSET 0x0214
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#define OMAP4430_RM_DUCATI_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0214)
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#define OMAP4_RM_DUCATI_DUCATI_CONTEXT_OFFSET 0x0224
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#define OMAP4430_RM_DUCATI_DUCATI_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0224)
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#define OMAP4_RM_SDMA_SDMA_CONTEXT_OFFSET 0x0324
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#define OMAP4430_RM_SDMA_SDMA_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0324)
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#define OMAP4_RM_MEMIF_DMM_CONTEXT_OFFSET 0x0424
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#define OMAP4430_RM_MEMIF_DMM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0424)
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#define OMAP4_RM_MEMIF_EMIF_FW_CONTEXT_OFFSET 0x042c
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#define OMAP4430_RM_MEMIF_EMIF_FW_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x042c)
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#define OMAP4_RM_MEMIF_EMIF_1_CONTEXT_OFFSET 0x0434
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#define OMAP4430_RM_MEMIF_EMIF_1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0434)
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#define OMAP4_RM_MEMIF_EMIF_2_CONTEXT_OFFSET 0x043c
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#define OMAP4430_RM_MEMIF_EMIF_2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x043c)
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#define OMAP4_RM_MEMIF_DLL_CONTEXT_OFFSET 0x0444
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#define OMAP4430_RM_MEMIF_DLL_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0444)
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#define OMAP4_RM_MEMIF_EMIF_H1_CONTEXT_OFFSET 0x0454
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#define OMAP4430_RM_MEMIF_EMIF_H1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0454)
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#define OMAP4_RM_MEMIF_EMIF_H2_CONTEXT_OFFSET 0x045c
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#define OMAP4430_RM_MEMIF_EMIF_H2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x045c)
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#define OMAP4_RM_MEMIF_DLL_H_CONTEXT_OFFSET 0x0464
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#define OMAP4430_RM_MEMIF_DLL_H_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0464)
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#define OMAP4_RM_D2D_SAD2D_CONTEXT_OFFSET 0x0524
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#define OMAP4430_RM_D2D_SAD2D_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0524)
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#define OMAP4_RM_D2D_INSTEM_ICR_CONTEXT_OFFSET 0x052c
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#define OMAP4430_RM_D2D_INSTEM_ICR_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x052c)
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#define OMAP4_RM_D2D_SAD2D_FW_CONTEXT_OFFSET 0x0534
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#define OMAP4430_RM_D2D_SAD2D_FW_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0534)
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#define OMAP4_RM_L4CFG_L4_CFG_CONTEXT_OFFSET 0x0624
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#define OMAP4430_RM_L4CFG_L4_CFG_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0624)
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#define OMAP4_RM_L4CFG_HW_SEM_CONTEXT_OFFSET 0x062c
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#define OMAP4430_RM_L4CFG_HW_SEM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x062c)
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#define OMAP4_RM_L4CFG_MAILBOX_CONTEXT_OFFSET 0x0634
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#define OMAP4430_RM_L4CFG_MAILBOX_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0634)
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#define OMAP4_RM_L4CFG_SAR_ROM_CONTEXT_OFFSET 0x063c
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#define OMAP4430_RM_L4CFG_SAR_ROM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x063c)
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#define OMAP4_RM_L3INSTR_L3_3_CONTEXT_OFFSET 0x0724
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#define OMAP4430_RM_L3INSTR_L3_3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0724)
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#define OMAP4_RM_L3INSTR_L3_INSTR_CONTEXT_OFFSET 0x072c
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#define OMAP4430_RM_L3INSTR_L3_INSTR_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x072c)
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#define OMAP4_RM_L3INSTR_OCP_WP1_CONTEXT_OFFSET 0x0744
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#define OMAP4430_RM_L3INSTR_OCP_WP1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0744)
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/* PRM.IVAHD_PRM register offsets */
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#define OMAP4_PM_IVAHD_PWRSTCTRL_OFFSET 0x0000
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#define OMAP4430_PM_IVAHD_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_INST, 0x0000)
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#define OMAP4_PM_IVAHD_PWRSTST_OFFSET 0x0004
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#define OMAP4430_PM_IVAHD_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_INST, 0x0004)
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#define OMAP4_RM_IVAHD_RSTCTRL_OFFSET 0x0010
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#define OMAP4430_RM_IVAHD_RSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_INST, 0x0010)
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#define OMAP4_RM_IVAHD_RSTST_OFFSET 0x0014
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#define OMAP4430_RM_IVAHD_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_INST, 0x0014)
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#define OMAP4_RM_IVAHD_IVAHD_CONTEXT_OFFSET 0x0024
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#define OMAP4430_RM_IVAHD_IVAHD_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_INST, 0x0024)
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#define OMAP4_RM_IVAHD_SL2_CONTEXT_OFFSET 0x002c
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#define OMAP4430_RM_IVAHD_SL2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_INST, 0x002c)
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/* PRM.CAM_PRM register offsets */
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#define OMAP4_PM_CAM_PWRSTCTRL_OFFSET 0x0000
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#define OMAP4430_PM_CAM_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CAM_INST, 0x0000)
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#define OMAP4_PM_CAM_PWRSTST_OFFSET 0x0004
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#define OMAP4430_PM_CAM_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CAM_INST, 0x0004)
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#define OMAP4_RM_CAM_ISS_CONTEXT_OFFSET 0x0024
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#define OMAP4430_RM_CAM_ISS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CAM_INST, 0x0024)
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#define OMAP4_RM_CAM_FDIF_CONTEXT_OFFSET 0x002c
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#define OMAP4430_RM_CAM_FDIF_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CAM_INST, 0x002c)
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/* PRM.DSS_PRM register offsets */
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#define OMAP4_PM_DSS_PWRSTCTRL_OFFSET 0x0000
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#define OMAP4430_PM_DSS_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DSS_INST, 0x0000)
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#define OMAP4_PM_DSS_PWRSTST_OFFSET 0x0004
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#define OMAP4430_PM_DSS_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DSS_INST, 0x0004)
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#define OMAP4_PM_DSS_DSS_WKDEP_OFFSET 0x0020
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#define OMAP4430_PM_DSS_DSS_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DSS_INST, 0x0020)
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#define OMAP4_RM_DSS_DSS_CONTEXT_OFFSET 0x0024
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#define OMAP4430_RM_DSS_DSS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DSS_INST, 0x0024)
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#define OMAP4_RM_DSS_DEISS_CONTEXT_OFFSET 0x002c
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#define OMAP4430_RM_DSS_DEISS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DSS_INST, 0x002c)
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/* PRM.GFX_PRM register offsets */
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#define OMAP4_PM_GFX_PWRSTCTRL_OFFSET 0x0000
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#define OMAP4430_PM_GFX_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_GFX_INST, 0x0000)
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#define OMAP4_PM_GFX_PWRSTST_OFFSET 0x0004
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#define OMAP4430_PM_GFX_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_GFX_INST, 0x0004)
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#define OMAP4_RM_GFX_GFX_CONTEXT_OFFSET 0x0024
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#define OMAP4430_RM_GFX_GFX_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_GFX_INST, 0x0024)
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/* PRM.L3INIT_PRM register offsets */
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#define OMAP4_PM_L3INIT_PWRSTCTRL_OFFSET 0x0000
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#define OMAP4430_PM_L3INIT_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0000)
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#define OMAP4_PM_L3INIT_PWRSTST_OFFSET 0x0004
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#define OMAP4430_PM_L3INIT_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0004)
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#define OMAP4_PM_L3INIT_MMC1_WKDEP_OFFSET 0x0028
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#define OMAP4430_PM_L3INIT_MMC1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0028)
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#define OMAP4_RM_L3INIT_MMC1_CONTEXT_OFFSET 0x002c
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#define OMAP4430_RM_L3INIT_MMC1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x002c)
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#define OMAP4_PM_L3INIT_MMC2_WKDEP_OFFSET 0x0030
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#define OMAP4430_PM_L3INIT_MMC2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0030)
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#define OMAP4_RM_L3INIT_MMC2_CONTEXT_OFFSET 0x0034
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#define OMAP4430_RM_L3INIT_MMC2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0034)
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#define OMAP4_PM_L3INIT_HSI_WKDEP_OFFSET 0x0038
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#define OMAP4430_PM_L3INIT_HSI_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0038)
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#define OMAP4_RM_L3INIT_HSI_CONTEXT_OFFSET 0x003c
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#define OMAP4430_RM_L3INIT_HSI_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x003c)
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#define OMAP4_PM_L3INIT_UNIPRO1_WKDEP_OFFSET 0x0040
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#define OMAP4430_PM_L3INIT_UNIPRO1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0040)
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#define OMAP4_RM_L3INIT_UNIPRO1_CONTEXT_OFFSET 0x0044
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#define OMAP4430_RM_L3INIT_UNIPRO1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0044)
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#define OMAP4_PM_L3INIT_USB_HOST_WKDEP_OFFSET 0x0058
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#define OMAP4430_PM_L3INIT_USB_HOST_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0058)
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#define OMAP4_RM_L3INIT_USB_HOST_CONTEXT_OFFSET 0x005c
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#define OMAP4430_RM_L3INIT_USB_HOST_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x005c)
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#define OMAP4_PM_L3INIT_USB_OTG_WKDEP_OFFSET 0x0060
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#define OMAP4430_PM_L3INIT_USB_OTG_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0060)
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#define OMAP4_RM_L3INIT_USB_OTG_CONTEXT_OFFSET 0x0064
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#define OMAP4430_RM_L3INIT_USB_OTG_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0064)
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#define OMAP4_PM_L3INIT_USB_TLL_WKDEP_OFFSET 0x0068
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#define OMAP4430_PM_L3INIT_USB_TLL_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0068)
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#define OMAP4_RM_L3INIT_USB_TLL_CONTEXT_OFFSET 0x006c
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#define OMAP4430_RM_L3INIT_USB_TLL_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x006c)
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#define OMAP4_RM_L3INIT_P1500_CONTEXT_OFFSET 0x007c
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#define OMAP4430_RM_L3INIT_P1500_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x007c)
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#define OMAP4_RM_L3INIT_EMAC_CONTEXT_OFFSET 0x0084
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#define OMAP4430_RM_L3INIT_EMAC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0084)
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#define OMAP4_PM_L3INIT_SATA_WKDEP_OFFSET 0x0088
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#define OMAP4430_PM_L3INIT_SATA_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0088)
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#define OMAP4_RM_L3INIT_SATA_CONTEXT_OFFSET 0x008c
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#define OMAP4430_RM_L3INIT_SATA_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x008c)
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#define OMAP4_RM_L3INIT_TPPSS_CONTEXT_OFFSET 0x0094
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#define OMAP4430_RM_L3INIT_TPPSS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0094)
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#define OMAP4_PM_L3INIT_PCIESS_WKDEP_OFFSET 0x0098
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#define OMAP4430_PM_L3INIT_PCIESS_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0098)
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#define OMAP4_RM_L3INIT_PCIESS_CONTEXT_OFFSET 0x009c
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#define OMAP4430_RM_L3INIT_PCIESS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x009c)
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#define OMAP4_RM_L3INIT_CCPTX_CONTEXT_OFFSET 0x00ac
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#define OMAP4430_RM_L3INIT_CCPTX_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00ac)
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#define OMAP4_PM_L3INIT_XHPI_WKDEP_OFFSET 0x00c0
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#define OMAP4430_PM_L3INIT_XHPI_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00c0)
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#define OMAP4_RM_L3INIT_XHPI_CONTEXT_OFFSET 0x00c4
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#define OMAP4430_RM_L3INIT_XHPI_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00c4)
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#define OMAP4_PM_L3INIT_MMC6_WKDEP_OFFSET 0x00c8
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#define OMAP4430_PM_L3INIT_MMC6_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00c8)
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#define OMAP4_RM_L3INIT_MMC6_CONTEXT_OFFSET 0x00cc
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#define OMAP4430_RM_L3INIT_MMC6_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00cc)
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#define OMAP4_PM_L3INIT_USB_HOST_FS_WKDEP_OFFSET 0x00d0
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#define OMAP4430_PM_L3INIT_USB_HOST_FS_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00d0)
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#define OMAP4_RM_L3INIT_USB_HOST_FS_CONTEXT_OFFSET 0x00d4
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#define OMAP4430_RM_L3INIT_USB_HOST_FS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00d4)
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#define OMAP4_RM_L3INIT_USBPHYOCP2SCP_CONTEXT_OFFSET 0x00e4
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#define OMAP4430_RM_L3INIT_USBPHYOCP2SCP_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00e4)
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/* PRM.L4PER_PRM register offsets */
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#define OMAP4_PM_L4PER_PWRSTCTRL_OFFSET 0x0000
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#define OMAP4430_PM_L4PER_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0000)
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#define OMAP4_PM_L4PER_PWRSTST_OFFSET 0x0004
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#define OMAP4430_PM_L4PER_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0004)
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#define OMAP4_RM_L4PER_ADC_CONTEXT_OFFSET 0x0024
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#define OMAP4430_RM_L4PER_ADC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0024)
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#define OMAP4_PM_L4PER_DMTIMER10_WKDEP_OFFSET 0x0028
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#define OMAP4430_PM_L4PER_DMTIMER10_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0028)
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#define OMAP4_RM_L4PER_DMTIMER10_CONTEXT_OFFSET 0x002c
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#define OMAP4430_RM_L4PER_DMTIMER10_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x002c)
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#define OMAP4_PM_L4PER_DMTIMER11_WKDEP_OFFSET 0x0030
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#define OMAP4430_PM_L4PER_DMTIMER11_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0030)
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#define OMAP4_RM_L4PER_DMTIMER11_CONTEXT_OFFSET 0x0034
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#define OMAP4430_RM_L4PER_DMTIMER11_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0034)
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#define OMAP4_PM_L4PER_DMTIMER2_WKDEP_OFFSET 0x0038
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#define OMAP4430_PM_L4PER_DMTIMER2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0038)
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#define OMAP4_RM_L4PER_DMTIMER2_CONTEXT_OFFSET 0x003c
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#define OMAP4430_RM_L4PER_DMTIMER2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x003c)
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#define OMAP4_PM_L4PER_DMTIMER3_WKDEP_OFFSET 0x0040
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#define OMAP4430_PM_L4PER_DMTIMER3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0040)
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#define OMAP4_RM_L4PER_DMTIMER3_CONTEXT_OFFSET 0x0044
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#define OMAP4430_RM_L4PER_DMTIMER3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0044)
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#define OMAP4_PM_L4PER_DMTIMER4_WKDEP_OFFSET 0x0048
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#define OMAP4430_PM_L4PER_DMTIMER4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0048)
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#define OMAP4_RM_L4PER_DMTIMER4_CONTEXT_OFFSET 0x004c
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#define OMAP4430_RM_L4PER_DMTIMER4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x004c)
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#define OMAP4_PM_L4PER_DMTIMER9_WKDEP_OFFSET 0x0050
|
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#define OMAP4430_PM_L4PER_DMTIMER9_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0050)
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#define OMAP4_RM_L4PER_DMTIMER9_CONTEXT_OFFSET 0x0054
|
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#define OMAP4430_RM_L4PER_DMTIMER9_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0054)
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#define OMAP4_RM_L4PER_ELM_CONTEXT_OFFSET 0x005c
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#define OMAP4430_RM_L4PER_ELM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x005c)
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#define OMAP4_PM_L4PER_GPIO2_WKDEP_OFFSET 0x0060
|
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#define OMAP4430_PM_L4PER_GPIO2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0060)
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#define OMAP4_RM_L4PER_GPIO2_CONTEXT_OFFSET 0x0064
|
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#define OMAP4430_RM_L4PER_GPIO2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0064)
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#define OMAP4_PM_L4PER_GPIO3_WKDEP_OFFSET 0x0068
|
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#define OMAP4430_PM_L4PER_GPIO3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0068)
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#define OMAP4_RM_L4PER_GPIO3_CONTEXT_OFFSET 0x006c
|
|
#define OMAP4430_RM_L4PER_GPIO3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x006c)
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#define OMAP4_PM_L4PER_GPIO4_WKDEP_OFFSET 0x0070
|
|
#define OMAP4430_PM_L4PER_GPIO4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0070)
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#define OMAP4_RM_L4PER_GPIO4_CONTEXT_OFFSET 0x0074
|
|
#define OMAP4430_RM_L4PER_GPIO4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0074)
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#define OMAP4_PM_L4PER_GPIO5_WKDEP_OFFSET 0x0078
|
|
#define OMAP4430_PM_L4PER_GPIO5_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0078)
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|
#define OMAP4_RM_L4PER_GPIO5_CONTEXT_OFFSET 0x007c
|
|
#define OMAP4430_RM_L4PER_GPIO5_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x007c)
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#define OMAP4_PM_L4PER_GPIO6_WKDEP_OFFSET 0x0080
|
|
#define OMAP4430_PM_L4PER_GPIO6_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0080)
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|
#define OMAP4_RM_L4PER_GPIO6_CONTEXT_OFFSET 0x0084
|
|
#define OMAP4430_RM_L4PER_GPIO6_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0084)
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|
#define OMAP4_RM_L4PER_HDQ1W_CONTEXT_OFFSET 0x008c
|
|
#define OMAP4430_RM_L4PER_HDQ1W_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x008c)
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|
#define OMAP4_PM_L4PER_HECC1_WKDEP_OFFSET 0x0090
|
|
#define OMAP4430_PM_L4PER_HECC1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0090)
|
|
#define OMAP4_RM_L4PER_HECC1_CONTEXT_OFFSET 0x0094
|
|
#define OMAP4430_RM_L4PER_HECC1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0094)
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#define OMAP4_PM_L4PER_HECC2_WKDEP_OFFSET 0x0098
|
|
#define OMAP4430_PM_L4PER_HECC2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0098)
|
|
#define OMAP4_RM_L4PER_HECC2_CONTEXT_OFFSET 0x009c
|
|
#define OMAP4430_RM_L4PER_HECC2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x009c)
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#define OMAP4_PM_L4PER_I2C1_WKDEP_OFFSET 0x00a0
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#define OMAP4430_PM_L4PER_I2C1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00a0)
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#define OMAP4_RM_L4PER_I2C1_CONTEXT_OFFSET 0x00a4
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#define OMAP4430_RM_L4PER_I2C1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00a4)
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#define OMAP4_PM_L4PER_I2C2_WKDEP_OFFSET 0x00a8
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#define OMAP4430_PM_L4PER_I2C2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00a8)
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#define OMAP4_RM_L4PER_I2C2_CONTEXT_OFFSET 0x00ac
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#define OMAP4430_RM_L4PER_I2C2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00ac)
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#define OMAP4_PM_L4PER_I2C3_WKDEP_OFFSET 0x00b0
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#define OMAP4430_PM_L4PER_I2C3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00b0)
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#define OMAP4_RM_L4PER_I2C3_CONTEXT_OFFSET 0x00b4
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#define OMAP4430_RM_L4PER_I2C3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00b4)
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#define OMAP4_PM_L4PER_I2C4_WKDEP_OFFSET 0x00b8
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#define OMAP4430_PM_L4PER_I2C4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00b8)
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#define OMAP4_RM_L4PER_I2C4_CONTEXT_OFFSET 0x00bc
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#define OMAP4430_RM_L4PER_I2C4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00bc)
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#define OMAP4_RM_L4PER_L4_PER_CONTEXT_OFFSET 0x00c0
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#define OMAP4430_RM_L4PER_L4_PER_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00c0)
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#define OMAP4_PM_L4PER_MCASP2_WKDEP_OFFSET 0x00d0
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#define OMAP4430_PM_L4PER_MCASP2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00d0)
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#define OMAP4_RM_L4PER_MCASP2_CONTEXT_OFFSET 0x00d4
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#define OMAP4430_RM_L4PER_MCASP2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00d4)
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#define OMAP4_PM_L4PER_MCASP3_WKDEP_OFFSET 0x00d8
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#define OMAP4430_PM_L4PER_MCASP3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00d8)
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#define OMAP4_RM_L4PER_MCASP3_CONTEXT_OFFSET 0x00dc
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#define OMAP4430_RM_L4PER_MCASP3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00dc)
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#define OMAP4_PM_L4PER_MCBSP4_WKDEP_OFFSET 0x00e0
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#define OMAP4430_PM_L4PER_MCBSP4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00e0)
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#define OMAP4_RM_L4PER_MCBSP4_CONTEXT_OFFSET 0x00e4
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#define OMAP4430_RM_L4PER_MCBSP4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00e4)
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#define OMAP4_RM_L4PER_MGATE_CONTEXT_OFFSET 0x00ec
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#define OMAP4430_RM_L4PER_MGATE_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00ec)
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#define OMAP4_PM_L4PER_MCSPI1_WKDEP_OFFSET 0x00f0
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#define OMAP4430_PM_L4PER_MCSPI1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00f0)
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#define OMAP4_RM_L4PER_MCSPI1_CONTEXT_OFFSET 0x00f4
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#define OMAP4430_RM_L4PER_MCSPI1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00f4)
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#define OMAP4_PM_L4PER_MCSPI2_WKDEP_OFFSET 0x00f8
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#define OMAP4430_PM_L4PER_MCSPI2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00f8)
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#define OMAP4_RM_L4PER_MCSPI2_CONTEXT_OFFSET 0x00fc
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#define OMAP4430_RM_L4PER_MCSPI2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00fc)
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#define OMAP4_PM_L4PER_MCSPI3_WKDEP_OFFSET 0x0100
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#define OMAP4430_PM_L4PER_MCSPI3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0100)
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#define OMAP4_RM_L4PER_MCSPI3_CONTEXT_OFFSET 0x0104
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#define OMAP4430_RM_L4PER_MCSPI3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0104)
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#define OMAP4_PM_L4PER_MCSPI4_WKDEP_OFFSET 0x0108
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#define OMAP4430_PM_L4PER_MCSPI4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0108)
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#define OMAP4_RM_L4PER_MCSPI4_CONTEXT_OFFSET 0x010c
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#define OMAP4430_RM_L4PER_MCSPI4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x010c)
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#define OMAP4_PM_L4PER_MMCSD3_WKDEP_OFFSET 0x0120
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#define OMAP4430_PM_L4PER_MMCSD3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0120)
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#define OMAP4_RM_L4PER_MMCSD3_CONTEXT_OFFSET 0x0124
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#define OMAP4430_RM_L4PER_MMCSD3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0124)
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#define OMAP4_PM_L4PER_MMCSD4_WKDEP_OFFSET 0x0128
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#define OMAP4430_PM_L4PER_MMCSD4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0128)
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#define OMAP4_RM_L4PER_MMCSD4_CONTEXT_OFFSET 0x012c
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#define OMAP4430_RM_L4PER_MMCSD4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x012c)
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#define OMAP4_RM_L4PER_MSPROHG_CONTEXT_OFFSET 0x0134
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#define OMAP4430_RM_L4PER_MSPROHG_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0134)
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#define OMAP4_PM_L4PER_SLIMBUS2_WKDEP_OFFSET 0x0138
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#define OMAP4430_PM_L4PER_SLIMBUS2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0138)
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#define OMAP4_RM_L4PER_SLIMBUS2_CONTEXT_OFFSET 0x013c
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#define OMAP4430_RM_L4PER_SLIMBUS2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x013c)
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#define OMAP4_PM_L4PER_UART1_WKDEP_OFFSET 0x0140
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#define OMAP4430_PM_L4PER_UART1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0140)
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#define OMAP4_RM_L4PER_UART1_CONTEXT_OFFSET 0x0144
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#define OMAP4430_RM_L4PER_UART1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0144)
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#define OMAP4_PM_L4PER_UART2_WKDEP_OFFSET 0x0148
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#define OMAP4430_PM_L4PER_UART2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0148)
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#define OMAP4_RM_L4PER_UART2_CONTEXT_OFFSET 0x014c
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#define OMAP4430_RM_L4PER_UART2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x014c)
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#define OMAP4_PM_L4PER_UART3_WKDEP_OFFSET 0x0150
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#define OMAP4430_PM_L4PER_UART3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0150)
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#define OMAP4_RM_L4PER_UART3_CONTEXT_OFFSET 0x0154
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#define OMAP4430_RM_L4PER_UART3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0154)
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#define OMAP4_PM_L4PER_UART4_WKDEP_OFFSET 0x0158
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#define OMAP4430_PM_L4PER_UART4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0158)
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#define OMAP4_RM_L4PER_UART4_CONTEXT_OFFSET 0x015c
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#define OMAP4430_RM_L4PER_UART4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x015c)
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#define OMAP4_PM_L4PER_MMCSD5_WKDEP_OFFSET 0x0160
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#define OMAP4430_PM_L4PER_MMCSD5_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0160)
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#define OMAP4_RM_L4PER_MMCSD5_CONTEXT_OFFSET 0x0164
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#define OMAP4430_RM_L4PER_MMCSD5_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0164)
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#define OMAP4_PM_L4PER_I2C5_WKDEP_OFFSET 0x0168
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#define OMAP4430_PM_L4PER_I2C5_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0168)
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#define OMAP4_RM_L4PER_I2C5_CONTEXT_OFFSET 0x016c
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#define OMAP4430_RM_L4PER_I2C5_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x016c)
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#define OMAP4_RM_L4SEC_AES1_CONTEXT_OFFSET 0x01a4
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#define OMAP4430_RM_L4SEC_AES1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x01a4)
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#define OMAP4_RM_L4SEC_AES2_CONTEXT_OFFSET 0x01ac
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#define OMAP4430_RM_L4SEC_AES2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x01ac)
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#define OMAP4_RM_L4SEC_DES3DES_CONTEXT_OFFSET 0x01b4
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#define OMAP4430_RM_L4SEC_DES3DES_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x01b4)
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#define OMAP4_RM_L4SEC_PKAEIP29_CONTEXT_OFFSET 0x01bc
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#define OMAP4430_RM_L4SEC_PKAEIP29_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x01bc)
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#define OMAP4_RM_L4SEC_RNG_CONTEXT_OFFSET 0x01c4
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#define OMAP4430_RM_L4SEC_RNG_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x01c4)
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#define OMAP4_RM_L4SEC_SHA2MD51_CONTEXT_OFFSET 0x01cc
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#define OMAP4430_RM_L4SEC_SHA2MD51_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x01cc)
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#define OMAP4_RM_L4SEC_CRYPTODMA_CONTEXT_OFFSET 0x01dc
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#define OMAP4430_RM_L4SEC_CRYPTODMA_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x01dc)
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/* PRM.CEFUSE_PRM register offsets */
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#define OMAP4_PM_CEFUSE_PWRSTCTRL_OFFSET 0x0000
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#define OMAP4430_PM_CEFUSE_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CEFUSE_INST, 0x0000)
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#define OMAP4_PM_CEFUSE_PWRSTST_OFFSET 0x0004
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#define OMAP4430_PM_CEFUSE_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CEFUSE_INST, 0x0004)
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#define OMAP4_RM_CEFUSE_CEFUSE_CONTEXT_OFFSET 0x0024
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#define OMAP4430_RM_CEFUSE_CEFUSE_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CEFUSE_INST, 0x0024)
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/* PRM.WKUP_PRM register offsets */
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#define OMAP4_RM_WKUP_L4WKUP_CONTEXT_OFFSET 0x0024
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#define OMAP4430_RM_WKUP_L4WKUP_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0024)
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#define OMAP4_RM_WKUP_WDT1_CONTEXT_OFFSET 0x002c
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#define OMAP4430_RM_WKUP_WDT1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x002c)
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#define OMAP4_PM_WKUP_WDT2_WKDEP_OFFSET 0x0030
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#define OMAP4430_PM_WKUP_WDT2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0030)
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#define OMAP4_RM_WKUP_WDT2_CONTEXT_OFFSET 0x0034
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#define OMAP4430_RM_WKUP_WDT2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0034)
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#define OMAP4_PM_WKUP_GPIO1_WKDEP_OFFSET 0x0038
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#define OMAP4430_PM_WKUP_GPIO1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0038)
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#define OMAP4_RM_WKUP_GPIO1_CONTEXT_OFFSET 0x003c
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#define OMAP4430_RM_WKUP_GPIO1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x003c)
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#define OMAP4_PM_WKUP_TIMER1_WKDEP_OFFSET 0x0040
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#define OMAP4430_PM_WKUP_TIMER1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0040)
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#define OMAP4_RM_WKUP_TIMER1_CONTEXT_OFFSET 0x0044
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#define OMAP4430_RM_WKUP_TIMER1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0044)
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#define OMAP4_PM_WKUP_TIMER12_WKDEP_OFFSET 0x0048
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#define OMAP4430_PM_WKUP_TIMER12_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0048)
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#define OMAP4_RM_WKUP_TIMER12_CONTEXT_OFFSET 0x004c
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#define OMAP4430_RM_WKUP_TIMER12_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x004c)
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#define OMAP4_RM_WKUP_SYNCTIMER_CONTEXT_OFFSET 0x0054
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#define OMAP4430_RM_WKUP_SYNCTIMER_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0054)
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#define OMAP4_PM_WKUP_USIM_WKDEP_OFFSET 0x0058
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#define OMAP4430_PM_WKUP_USIM_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0058)
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#define OMAP4_RM_WKUP_USIM_CONTEXT_OFFSET 0x005c
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#define OMAP4430_RM_WKUP_USIM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x005c)
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#define OMAP4_RM_WKUP_SARRAM_CONTEXT_OFFSET 0x0064
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#define OMAP4430_RM_WKUP_SARRAM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0064)
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#define OMAP4_PM_WKUP_KEYBOARD_WKDEP_OFFSET 0x0078
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#define OMAP4430_PM_WKUP_KEYBOARD_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0078)
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#define OMAP4_RM_WKUP_KEYBOARD_CONTEXT_OFFSET 0x007c
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#define OMAP4430_RM_WKUP_KEYBOARD_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x007c)
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#define OMAP4_PM_WKUP_RTC_WKDEP_OFFSET 0x0080
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#define OMAP4430_PM_WKUP_RTC_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0080)
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#define OMAP4_RM_WKUP_RTC_CONTEXT_OFFSET 0x0084
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#define OMAP4430_RM_WKUP_RTC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0084)
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/* PRM.WKUP_CM register offsets */
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#define OMAP4_CM_WKUP_CLKSTCTRL_OFFSET 0x0000
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#define OMAP4430_CM_WKUP_CLKSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0000)
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#define OMAP4_CM_WKUP_L4WKUP_CLKCTRL_OFFSET 0x0020
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#define OMAP4430_CM_WKUP_L4WKUP_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0020)
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#define OMAP4_CM_WKUP_WDT1_CLKCTRL_OFFSET 0x0028
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#define OMAP4430_CM_WKUP_WDT1_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0028)
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#define OMAP4_CM_WKUP_WDT2_CLKCTRL_OFFSET 0x0030
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#define OMAP4430_CM_WKUP_WDT2_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0030)
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#define OMAP4_CM_WKUP_GPIO1_CLKCTRL_OFFSET 0x0038
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#define OMAP4430_CM_WKUP_GPIO1_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0038)
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#define OMAP4_CM_WKUP_TIMER1_CLKCTRL_OFFSET 0x0040
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#define OMAP4430_CM_WKUP_TIMER1_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0040)
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#define OMAP4_CM_WKUP_TIMER12_CLKCTRL_OFFSET 0x0048
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#define OMAP4430_CM_WKUP_TIMER12_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0048)
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#define OMAP4_CM_WKUP_SYNCTIMER_CLKCTRL_OFFSET 0x0050
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#define OMAP4430_CM_WKUP_SYNCTIMER_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0050)
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#define OMAP4_CM_WKUP_USIM_CLKCTRL_OFFSET 0x0058
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#define OMAP4430_CM_WKUP_USIM_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0058)
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#define OMAP4_CM_WKUP_SARRAM_CLKCTRL_OFFSET 0x0060
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#define OMAP4430_CM_WKUP_SARRAM_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0060)
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#define OMAP4_CM_WKUP_KEYBOARD_CLKCTRL_OFFSET 0x0078
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#define OMAP4430_CM_WKUP_KEYBOARD_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0078)
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#define OMAP4_CM_WKUP_RTC_CLKCTRL_OFFSET 0x0080
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#define OMAP4430_CM_WKUP_RTC_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0080)
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#define OMAP4_CM_WKUP_BANDGAP_CLKCTRL_OFFSET 0x0088
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#define OMAP4430_CM_WKUP_BANDGAP_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0088)
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/* PRM.EMU_PRM register offsets */
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#define OMAP4_PM_EMU_PWRSTCTRL_OFFSET 0x0000
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#define OMAP4430_PM_EMU_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_INST, 0x0000)
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#define OMAP4_PM_EMU_PWRSTST_OFFSET 0x0004
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#define OMAP4430_PM_EMU_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_INST, 0x0004)
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#define OMAP4_RM_EMU_DEBUGSS_CONTEXT_OFFSET 0x0024
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#define OMAP4430_RM_EMU_DEBUGSS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_INST, 0x0024)
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/* PRM.EMU_CM register offsets */
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#define OMAP4_CM_EMU_CLKSTCTRL_OFFSET 0x0000
|
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#define OMAP4430_CM_EMU_CLKSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_CM_INST, 0x0000)
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#define OMAP4_CM_EMU_DYNAMICDEP_OFFSET 0x0008
|
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#define OMAP4430_CM_EMU_DYNAMICDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_CM_INST, 0x0008)
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#define OMAP4_CM_EMU_DEBUGSS_CLKCTRL_OFFSET 0x0020
|
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#define OMAP4430_CM_EMU_DEBUGSS_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_CM_INST, 0x0020)
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/* PRM.DEVICE_PRM register offsets */
|
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#define OMAP4_PRM_RSTCTRL_OFFSET 0x0000
|
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#define OMAP4430_PRM_RSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0000)
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#define OMAP4_PRM_RSTST_OFFSET 0x0004
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#define OMAP4430_PRM_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0004)
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#define OMAP4_PRM_RSTTIME_OFFSET 0x0008
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#define OMAP4430_PRM_RSTTIME OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0008)
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#define OMAP4_PRM_CLKREQCTRL_OFFSET 0x000c
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#define OMAP4430_PRM_CLKREQCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x000c)
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#define OMAP4_PRM_VOLTCTRL_OFFSET 0x0010
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#define OMAP4430_PRM_VOLTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0010)
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#define OMAP4_PRM_PWRREQCTRL_OFFSET 0x0014
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#define OMAP4430_PRM_PWRREQCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0014)
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#define OMAP4_PRM_PSCON_COUNT_OFFSET 0x0018
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#define OMAP4430_PRM_PSCON_COUNT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0018)
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#define OMAP4_PRM_IO_COUNT_OFFSET 0x001c
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#define OMAP4430_PRM_IO_COUNT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x001c)
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#define OMAP4_PRM_IO_PMCTRL_OFFSET 0x0020
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#define OMAP4430_PRM_IO_PMCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0020)
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#define OMAP4_PRM_VOLTSETUP_WARMRESET_OFFSET 0x0024
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#define OMAP4430_PRM_VOLTSETUP_WARMRESET OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0024)
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#define OMAP4_PRM_VOLTSETUP_CORE_OFF_OFFSET 0x0028
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#define OMAP4430_PRM_VOLTSETUP_CORE_OFF OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0028)
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#define OMAP4_PRM_VOLTSETUP_MPU_OFF_OFFSET 0x002c
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#define OMAP4430_PRM_VOLTSETUP_MPU_OFF OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x002c)
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#define OMAP4_PRM_VOLTSETUP_IVA_OFF_OFFSET 0x0030
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#define OMAP4430_PRM_VOLTSETUP_IVA_OFF OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0030)
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#define OMAP4_PRM_VOLTSETUP_CORE_RET_SLEEP_OFFSET 0x0034
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#define OMAP4430_PRM_VOLTSETUP_CORE_RET_SLEEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0034)
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#define OMAP4_PRM_VOLTSETUP_MPU_RET_SLEEP_OFFSET 0x0038
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#define OMAP4430_PRM_VOLTSETUP_MPU_RET_SLEEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0038)
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#define OMAP4_PRM_VOLTSETUP_IVA_RET_SLEEP_OFFSET 0x003c
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#define OMAP4430_PRM_VOLTSETUP_IVA_RET_SLEEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x003c)
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#define OMAP4_PRM_VP_CORE_CONFIG_OFFSET 0x0040
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#define OMAP4430_PRM_VP_CORE_CONFIG OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0040)
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#define OMAP4_PRM_VP_CORE_STATUS_OFFSET 0x0044
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#define OMAP4430_PRM_VP_CORE_STATUS OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0044)
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#define OMAP4_PRM_VP_CORE_VLIMITTO_OFFSET 0x0048
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#define OMAP4430_PRM_VP_CORE_VLIMITTO OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0048)
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#define OMAP4_PRM_VP_CORE_VOLTAGE_OFFSET 0x004c
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#define OMAP4430_PRM_VP_CORE_VOLTAGE OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x004c)
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#define OMAP4_PRM_VP_CORE_VSTEPMAX_OFFSET 0x0050
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#define OMAP4430_PRM_VP_CORE_VSTEPMAX OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0050)
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#define OMAP4_PRM_VP_CORE_VSTEPMIN_OFFSET 0x0054
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#define OMAP4430_PRM_VP_CORE_VSTEPMIN OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0054)
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#define OMAP4_PRM_VP_MPU_CONFIG_OFFSET 0x0058
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#define OMAP4430_PRM_VP_MPU_CONFIG OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0058)
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#define OMAP4_PRM_VP_MPU_STATUS_OFFSET 0x005c
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#define OMAP4430_PRM_VP_MPU_STATUS OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x005c)
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#define OMAP4_PRM_VP_MPU_VLIMITTO_OFFSET 0x0060
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#define OMAP4430_PRM_VP_MPU_VLIMITTO OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0060)
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#define OMAP4_PRM_VP_MPU_VOLTAGE_OFFSET 0x0064
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#define OMAP4430_PRM_VP_MPU_VOLTAGE OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0064)
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#define OMAP4_PRM_VP_MPU_VSTEPMAX_OFFSET 0x0068
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#define OMAP4430_PRM_VP_MPU_VSTEPMAX OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0068)
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#define OMAP4_PRM_VP_MPU_VSTEPMIN_OFFSET 0x006c
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#define OMAP4430_PRM_VP_MPU_VSTEPMIN OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x006c)
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#define OMAP4_PRM_VP_IVA_CONFIG_OFFSET 0x0070
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#define OMAP4430_PRM_VP_IVA_CONFIG OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0070)
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#define OMAP4_PRM_VP_IVA_STATUS_OFFSET 0x0074
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#define OMAP4430_PRM_VP_IVA_STATUS OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0074)
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#define OMAP4_PRM_VP_IVA_VLIMITTO_OFFSET 0x0078
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#define OMAP4430_PRM_VP_IVA_VLIMITTO OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0078)
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#define OMAP4_PRM_VP_IVA_VOLTAGE_OFFSET 0x007c
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#define OMAP4430_PRM_VP_IVA_VOLTAGE OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x007c)
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#define OMAP4_PRM_VP_IVA_VSTEPMAX_OFFSET 0x0080
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#define OMAP4430_PRM_VP_IVA_VSTEPMAX OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0080)
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#define OMAP4_PRM_VP_IVA_VSTEPMIN_OFFSET 0x0084
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#define OMAP4430_PRM_VP_IVA_VSTEPMIN OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0084)
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#define OMAP4_PRM_VC_SMPS_SA_OFFSET 0x0088
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#define OMAP4430_PRM_VC_SMPS_SA OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0088)
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#define OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET 0x008c
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#define OMAP4430_PRM_VC_VAL_SMPS_RA_VOL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x008c)
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#define OMAP4_PRM_VC_VAL_SMPS_RA_CMD_OFFSET 0x0090
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#define OMAP4430_PRM_VC_VAL_SMPS_RA_CMD OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0090)
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#define OMAP4_PRM_VC_VAL_CMD_VDD_CORE_L_OFFSET 0x0094
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#define OMAP4430_PRM_VC_VAL_CMD_VDD_CORE_L OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0094)
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#define OMAP4_PRM_VC_VAL_CMD_VDD_MPU_L_OFFSET 0x0098
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#define OMAP4430_PRM_VC_VAL_CMD_VDD_MPU_L OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0098)
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#define OMAP4_PRM_VC_VAL_CMD_VDD_IVA_L_OFFSET 0x009c
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#define OMAP4430_PRM_VC_VAL_CMD_VDD_IVA_L OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x009c)
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#define OMAP4_PRM_VC_VAL_BYPASS_OFFSET 0x00a0
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#define OMAP4430_PRM_VC_VAL_BYPASS OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a0)
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#define OMAP4_PRM_VC_CFG_CHANNEL_OFFSET 0x00a4
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#define OMAP4430_PRM_VC_CFG_CHANNEL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a4)
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#define OMAP4_PRM_VC_CFG_I2C_INSTE_OFFSET 0x00a8
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#define OMAP4430_PRM_VC_CFG_I2C_INSTE OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a8)
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#define OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET 0x00ac
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#define OMAP4430_PRM_VC_CFG_I2C_CLK OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00ac)
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#define OMAP4_PRM_SRAM_COUNT_OFFSET 0x00b0
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#define OMAP4430_PRM_SRAM_COUNT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00b0)
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#define OMAP4_PRM_SRAM_WKUP_SETUP_OFFSET 0x00b4
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#define OMAP4430_PRM_SRAM_WKUP_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00b4)
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#define OMAP4_PRM_LDO_SRAM_CORE_SETUP_OFFSET 0x00b8
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#define OMAP4430_PRM_LDO_SRAM_CORE_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00b8)
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#define OMAP4_PRM_LDO_SRAM_CORE_CTRL_OFFSET 0x00bc
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#define OMAP4430_PRM_LDO_SRAM_CORE_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00bc)
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#define OMAP4_PRM_LDO_SRAM_MPU_SETUP_OFFSET 0x00c0
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#define OMAP4430_PRM_LDO_SRAM_MPU_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00c0)
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#define OMAP4_PRM_LDO_SRAM_MPU_CTRL_OFFSET 0x00c4
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#define OMAP4430_PRM_LDO_SRAM_MPU_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00c4)
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#define OMAP4_PRM_LDO_SRAM_IVA_SETUP_OFFSET 0x00c8
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#define OMAP4430_PRM_LDO_SRAM_IVA_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00c8)
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#define OMAP4_PRM_LDO_SRAM_IVA_CTRL_OFFSET 0x00cc
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#define OMAP4430_PRM_LDO_SRAM_IVA_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00cc)
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#define OMAP4_PRM_LDO_ABB_MPU_SETUP_OFFSET 0x00d0
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#define OMAP4430_PRM_LDO_ABB_MPU_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00d0)
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#define OMAP4_PRM_LDO_ABB_MPU_CTRL_OFFSET 0x00d4
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#define OMAP4430_PRM_LDO_ABB_MPU_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00d4)
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#define OMAP4_PRM_LDO_ABB_IVA_SETUP_OFFSET 0x00d8
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#define OMAP4430_PRM_LDO_ABB_IVA_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00d8)
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#define OMAP4_PRM_LDO_ABB_IVA_CTRL_OFFSET 0x00dc
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#define OMAP4430_PRM_LDO_ABB_IVA_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00dc)
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#define OMAP4_PRM_LDO_BANDGAP_SETUP_OFFSET 0x00e0
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#define OMAP4430_PRM_LDO_BANDGAP_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00e0)
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#define OMAP4_PRM_DEVICE_OFF_CTRL_OFFSET 0x00e4
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#define OMAP4430_PRM_DEVICE_OFF_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00e4)
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#define OMAP4_PRM_PHASE1_CNDP_OFFSET 0x00e8
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#define OMAP4430_PRM_PHASE1_CNDP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00e8)
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#define OMAP4_PRM_PHASE2A_CNDP_OFFSET 0x00ec
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#define OMAP4430_PRM_PHASE2A_CNDP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00ec)
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#define OMAP4_PRM_PHASE2B_CNDP_OFFSET 0x00f0
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#define OMAP4430_PRM_PHASE2B_CNDP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00f0)
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#define OMAP4_PRM_INSTEM_IF_CTRL_OFFSET 0x00f4
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#define OMAP4430_PRM_INSTEM_IF_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00f4)
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#define OMAP4_PRM_VC_ERRST_OFFSET 0x00f8
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#define OMAP4430_PRM_VC_ERRST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00f8)
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/* Function prototypes */
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# ifndef __ASSEMBLER__
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extern u32 omap4_prm_read_inst_reg(s16 inst, u16 idx);
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extern void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 idx);
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extern u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx);
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extern u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *reg);
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extern u32 omap4_prm_set_inst_reg_bits(u32 bits, s16 inst, s16 idx);
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extern u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, s16 idx);
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extern u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask);
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extern int omap4_prm_is_hardreset_asserted(void __iomem *rstctrl_reg, u8 shift);
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extern int omap4_prm_assert_hardreset(void __iomem *rstctrl_reg, u8 shift);
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extern int omap4_prm_deassert_hardreset(void __iomem *rstctrl_reg, u8 shift);
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extern void omap4_prm_global_warm_sw_reset(void);
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# endif
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#endif
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