129 lines
3.3 KiB
C
129 lines
3.3 KiB
C
/* system.h: FR-V CPU control definitions
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*
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* Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
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* Written by David Howells (dhowells@redhat.com)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#ifndef _ASM_SYSTEM_H
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#define _ASM_SYSTEM_H
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#include <linux/config.h> /* get configuration macros */
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#include <linux/linkage.h>
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#include <asm/atomic.h>
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struct thread_struct;
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#define prepare_to_switch() do { } while(0)
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/*
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* switch_to(prev, next) should switch from task `prev' to `next'
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* `prev' will never be the same as `next'.
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* The `mb' is to tell GCC not to cache `current' across this call.
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*/
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extern asmlinkage
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struct task_struct *__switch_to(struct thread_struct *prev_thread,
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struct thread_struct *next_thread,
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struct task_struct *prev);
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#define switch_to(prev, next, last) \
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do { \
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(prev)->thread.sched_lr = \
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(unsigned long) __builtin_return_address(0); \
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(last) = __switch_to(&(prev)->thread, &(next)->thread, (prev)); \
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mb(); \
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} while(0)
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/*
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* interrupt flag manipulation
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*/
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#define local_irq_disable() \
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do { \
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unsigned long psr; \
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asm volatile(" movsg psr,%0 \n" \
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" andi %0,%2,%0 \n" \
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" ori %0,%1,%0 \n" \
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" movgs %0,psr \n" \
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: "=r"(psr) \
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: "i" (PSR_PIL_14), "i" (~PSR_PIL) \
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: "memory"); \
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} while(0)
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#define local_irq_enable() \
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do { \
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unsigned long psr; \
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asm volatile(" movsg psr,%0 \n" \
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" andi %0,%1,%0 \n" \
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" movgs %0,psr \n" \
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: "=r"(psr) \
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: "i" (~PSR_PIL) \
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: "memory"); \
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} while(0)
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#define local_save_flags(flags) \
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do { \
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typecheck(unsigned long, flags); \
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asm("movsg psr,%0" \
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: "=r"(flags) \
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: \
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: "memory"); \
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} while(0)
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#define local_irq_save(flags) \
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do { \
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unsigned long npsr; \
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typecheck(unsigned long, flags); \
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asm volatile(" movsg psr,%0 \n" \
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" andi %0,%3,%1 \n" \
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" ori %1,%2,%1 \n" \
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" movgs %1,psr \n" \
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: "=r"(flags), "=r"(npsr) \
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: "i" (PSR_PIL_14), "i" (~PSR_PIL) \
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: "memory"); \
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} while(0)
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#define local_irq_restore(flags) \
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do { \
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typecheck(unsigned long, flags); \
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asm volatile(" movgs %0,psr \n" \
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: \
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: "r" (flags) \
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: "memory"); \
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} while(0)
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#define irqs_disabled() \
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((__get_PSR() & PSR_PIL) >= PSR_PIL_14)
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/*
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* Force strict CPU ordering.
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*/
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#define nop() asm volatile ("nop"::)
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#define mb() asm volatile ("membar" : : :"memory")
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#define rmb() asm volatile ("membar" : : :"memory")
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#define wmb() asm volatile ("membar" : : :"memory")
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#define set_mb(var, value) do { var = value; mb(); } while (0)
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#define set_wmb(var, value) do { var = value; wmb(); } while (0)
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#define smp_mb() mb()
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#define smp_rmb() rmb()
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#define smp_wmb() wmb()
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#define read_barrier_depends() do {} while(0)
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#define smp_read_barrier_depends() read_barrier_depends()
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#define HARD_RESET_NOW() \
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do { \
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cli(); \
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} while(1)
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extern void die_if_kernel(const char *, ...) __attribute__((format(printf, 1, 2)));
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extern void free_initmem(void);
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#define arch_align_stack(x) (x)
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#endif /* _ASM_SYSTEM_H */
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