1871 lines
44 KiB
C
1871 lines
44 KiB
C
/*
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* Copyright 2002 Andi Kleen, SuSE Labs.
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* Thanks to Ben LaHaise for precious feedback.
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*/
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#include <linux/highmem.h>
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#include <linux/bootmem.h>
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#include <linux/module.h>
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#include <linux/sched.h>
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#include <linux/mm.h>
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#include <linux/interrupt.h>
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#include <linux/seq_file.h>
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#include <linux/debugfs.h>
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#include <linux/pfn.h>
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#include <linux/percpu.h>
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#include <linux/gfp.h>
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#include <linux/pci.h>
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#include <asm/e820.h>
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#include <asm/processor.h>
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#include <asm/tlbflush.h>
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#include <asm/sections.h>
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#include <asm/setup.h>
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#include <asm/uaccess.h>
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#include <asm/pgalloc.h>
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#include <asm/proto.h>
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#include <asm/pat.h>
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/*
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* The current flushing context - we pass it instead of 5 arguments:
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*/
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struct cpa_data {
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unsigned long *vaddr;
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pgd_t *pgd;
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pgprot_t mask_set;
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pgprot_t mask_clr;
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int numpages;
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int flags;
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unsigned long pfn;
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unsigned force_split : 1;
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int curpage;
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struct page **pages;
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};
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/*
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* Serialize cpa() (for !DEBUG_PAGEALLOC which uses large identity mappings)
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* using cpa_lock. So that we don't allow any other cpu, with stale large tlb
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* entries change the page attribute in parallel to some other cpu
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* splitting a large page entry along with changing the attribute.
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*/
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static DEFINE_SPINLOCK(cpa_lock);
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#define CPA_FLUSHTLB 1
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#define CPA_ARRAY 2
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#define CPA_PAGES_ARRAY 4
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#ifdef CONFIG_PROC_FS
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static unsigned long direct_pages_count[PG_LEVEL_NUM];
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void update_page_count(int level, unsigned long pages)
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{
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/* Protect against CPA */
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spin_lock(&pgd_lock);
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direct_pages_count[level] += pages;
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spin_unlock(&pgd_lock);
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}
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static void split_page_count(int level)
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{
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direct_pages_count[level]--;
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direct_pages_count[level - 1] += PTRS_PER_PTE;
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}
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void arch_report_meminfo(struct seq_file *m)
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{
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seq_printf(m, "DirectMap4k: %8lu kB\n",
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direct_pages_count[PG_LEVEL_4K] << 2);
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#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
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seq_printf(m, "DirectMap2M: %8lu kB\n",
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direct_pages_count[PG_LEVEL_2M] << 11);
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#else
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seq_printf(m, "DirectMap4M: %8lu kB\n",
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direct_pages_count[PG_LEVEL_2M] << 12);
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#endif
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#ifdef CONFIG_X86_64
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if (direct_gbpages)
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seq_printf(m, "DirectMap1G: %8lu kB\n",
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direct_pages_count[PG_LEVEL_1G] << 20);
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#endif
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}
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#else
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static inline void split_page_count(int level) { }
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#endif
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#ifdef CONFIG_X86_64
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static inline unsigned long highmap_start_pfn(void)
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{
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return __pa_symbol(_text) >> PAGE_SHIFT;
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}
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static inline unsigned long highmap_end_pfn(void)
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{
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return __pa_symbol(roundup(_brk_end, PMD_SIZE)) >> PAGE_SHIFT;
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}
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#endif
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#ifdef CONFIG_DEBUG_PAGEALLOC
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# define debug_pagealloc 1
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#else
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# define debug_pagealloc 0
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#endif
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static inline int
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within(unsigned long addr, unsigned long start, unsigned long end)
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{
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return addr >= start && addr < end;
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}
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/*
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* Flushing functions
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*/
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/**
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* clflush_cache_range - flush a cache range with clflush
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* @vaddr: virtual start address
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* @size: number of bytes to flush
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*
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* clflush is an unordered instruction which needs fencing with mfence
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* to avoid ordering issues.
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*/
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void clflush_cache_range(void *vaddr, unsigned int size)
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{
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void *vend = vaddr + size - 1;
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mb();
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for (; vaddr < vend; vaddr += boot_cpu_data.x86_clflush_size)
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clflush(vaddr);
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/*
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* Flush any possible final partial cacheline:
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*/
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clflush(vend);
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mb();
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}
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EXPORT_SYMBOL_GPL(clflush_cache_range);
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static void __cpa_flush_all(void *arg)
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{
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unsigned long cache = (unsigned long)arg;
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/*
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* Flush all to work around Errata in early athlons regarding
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* large page flushing.
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*/
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__flush_tlb_all();
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if (cache && boot_cpu_data.x86 >= 4)
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wbinvd();
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}
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static void cpa_flush_all(unsigned long cache)
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{
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BUG_ON(irqs_disabled());
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on_each_cpu(__cpa_flush_all, (void *) cache, 1);
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}
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static void __cpa_flush_range(void *arg)
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{
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/*
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* We could optimize that further and do individual per page
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* tlb invalidates for a low number of pages. Caveat: we must
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* flush the high aliases on 64bit as well.
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*/
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__flush_tlb_all();
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}
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static void cpa_flush_range(unsigned long start, int numpages, int cache)
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{
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unsigned int i, level;
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unsigned long addr;
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BUG_ON(irqs_disabled());
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WARN_ON(PAGE_ALIGN(start) != start);
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on_each_cpu(__cpa_flush_range, NULL, 1);
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if (!cache)
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return;
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/*
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* We only need to flush on one CPU,
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* clflush is a MESI-coherent instruction that
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* will cause all other CPUs to flush the same
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* cachelines:
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*/
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for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
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pte_t *pte = lookup_address(addr, &level);
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/*
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* Only flush present addresses:
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*/
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if (pte && (pte_val(*pte) & _PAGE_PRESENT))
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clflush_cache_range((void *) addr, PAGE_SIZE);
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}
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}
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static void cpa_flush_array(unsigned long *start, int numpages, int cache,
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int in_flags, struct page **pages)
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{
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unsigned int i, level;
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unsigned long do_wbinvd = cache && numpages >= 1024; /* 4M threshold */
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BUG_ON(irqs_disabled());
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on_each_cpu(__cpa_flush_all, (void *) do_wbinvd, 1);
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if (!cache || do_wbinvd)
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return;
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/*
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* We only need to flush on one CPU,
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* clflush is a MESI-coherent instruction that
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* will cause all other CPUs to flush the same
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* cachelines:
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*/
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for (i = 0; i < numpages; i++) {
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unsigned long addr;
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pte_t *pte;
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if (in_flags & CPA_PAGES_ARRAY)
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addr = (unsigned long)page_address(pages[i]);
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else
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addr = start[i];
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pte = lookup_address(addr, &level);
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/*
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* Only flush present addresses:
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*/
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if (pte && (pte_val(*pte) & _PAGE_PRESENT))
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clflush_cache_range((void *)addr, PAGE_SIZE);
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}
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}
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/*
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* Certain areas of memory on x86 require very specific protection flags,
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* for example the BIOS area or kernel text. Callers don't always get this
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* right (again, ioremap() on BIOS memory is not uncommon) so this function
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* checks and fixes these known static required protection bits.
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*/
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static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
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unsigned long pfn)
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{
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pgprot_t forbidden = __pgprot(0);
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/*
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* The BIOS area between 640k and 1Mb needs to be executable for
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* PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
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*/
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#ifdef CONFIG_PCI_BIOS
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if (pcibios_enabled && within(pfn, BIOS_BEGIN >> PAGE_SHIFT, BIOS_END >> PAGE_SHIFT))
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pgprot_val(forbidden) |= _PAGE_NX;
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#endif
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/*
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* The kernel text needs to be executable for obvious reasons
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* Does not cover __inittext since that is gone later on. On
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* 64bit we do not enforce !NX on the low mapping
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*/
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if (within(address, (unsigned long)_text, (unsigned long)_etext))
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pgprot_val(forbidden) |= _PAGE_NX;
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/*
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* The .rodata section needs to be read-only. Using the pfn
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* catches all aliases.
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*/
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if (within(pfn, __pa_symbol(__start_rodata) >> PAGE_SHIFT,
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__pa_symbol(__end_rodata) >> PAGE_SHIFT))
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pgprot_val(forbidden) |= _PAGE_RW;
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#if defined(CONFIG_X86_64) && defined(CONFIG_DEBUG_RODATA)
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/*
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* Once the kernel maps the text as RO (kernel_set_to_readonly is set),
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* kernel text mappings for the large page aligned text, rodata sections
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* will be always read-only. For the kernel identity mappings covering
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* the holes caused by this alignment can be anything that user asks.
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*
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* This will preserve the large page mappings for kernel text/data
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* at no extra cost.
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*/
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if (kernel_set_to_readonly &&
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within(address, (unsigned long)_text,
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(unsigned long)__end_rodata_hpage_align)) {
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unsigned int level;
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/*
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* Don't enforce the !RW mapping for the kernel text mapping,
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* if the current mapping is already using small page mapping.
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* No need to work hard to preserve large page mappings in this
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* case.
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*
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* This also fixes the Linux Xen paravirt guest boot failure
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* (because of unexpected read-only mappings for kernel identity
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* mappings). In this paravirt guest case, the kernel text
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* mapping and the kernel identity mapping share the same
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* page-table pages. Thus we can't really use different
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* protections for the kernel text and identity mappings. Also,
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* these shared mappings are made of small page mappings.
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* Thus this don't enforce !RW mapping for small page kernel
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* text mapping logic will help Linux Xen parvirt guest boot
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* as well.
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*/
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if (lookup_address(address, &level) && (level != PG_LEVEL_4K))
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pgprot_val(forbidden) |= _PAGE_RW;
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}
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#endif
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prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
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return prot;
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}
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static pte_t *__lookup_address_in_pgd(pgd_t *pgd, unsigned long address,
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unsigned int *level)
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{
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pud_t *pud;
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pmd_t *pmd;
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*level = PG_LEVEL_NONE;
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if (pgd_none(*pgd))
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return NULL;
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pud = pud_offset(pgd, address);
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if (pud_none(*pud))
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return NULL;
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*level = PG_LEVEL_1G;
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if (pud_large(*pud) || !pud_present(*pud))
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return (pte_t *)pud;
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pmd = pmd_offset(pud, address);
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if (pmd_none(*pmd))
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return NULL;
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*level = PG_LEVEL_2M;
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if (pmd_large(*pmd) || !pmd_present(*pmd))
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return (pte_t *)pmd;
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*level = PG_LEVEL_4K;
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return pte_offset_kernel(pmd, address);
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}
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/*
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* Lookup the page table entry for a virtual address. Return a pointer
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* to the entry and the level of the mapping.
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*
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* Note: We return pud and pmd either when the entry is marked large
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* or when the present bit is not set. Otherwise we would return a
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* pointer to a nonexisting mapping.
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*/
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pte_t *lookup_address(unsigned long address, unsigned int *level)
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{
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return __lookup_address_in_pgd(pgd_offset_k(address), address, level);
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}
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EXPORT_SYMBOL_GPL(lookup_address);
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static pte_t *_lookup_address_cpa(struct cpa_data *cpa, unsigned long address,
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unsigned int *level)
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{
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if (cpa->pgd)
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return __lookup_address_in_pgd(cpa->pgd + pgd_index(address),
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address, level);
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return lookup_address(address, level);
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}
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/*
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* This is necessary because __pa() does not work on some
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* kinds of memory, like vmalloc() or the alloc_remap()
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* areas on 32-bit NUMA systems. The percpu areas can
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* end up in this kind of memory, for instance.
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*
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* This could be optimized, but it is only intended to be
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* used at inititalization time, and keeping it
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* unoptimized should increase the testing coverage for
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* the more obscure platforms.
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*/
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phys_addr_t slow_virt_to_phys(void *__virt_addr)
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{
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unsigned long virt_addr = (unsigned long)__virt_addr;
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phys_addr_t phys_addr;
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unsigned long offset;
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enum pg_level level;
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unsigned long psize;
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unsigned long pmask;
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pte_t *pte;
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pte = lookup_address(virt_addr, &level);
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BUG_ON(!pte);
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psize = page_level_size(level);
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pmask = page_level_mask(level);
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offset = virt_addr & ~pmask;
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phys_addr = pte_pfn(*pte) << PAGE_SHIFT;
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return (phys_addr | offset);
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}
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EXPORT_SYMBOL_GPL(slow_virt_to_phys);
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/*
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* Set the new pmd in all the pgds we know about:
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*/
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static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
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{
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/* change init_mm */
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set_pte_atomic(kpte, pte);
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#ifdef CONFIG_X86_32
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if (!SHARED_KERNEL_PMD) {
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struct page *page;
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list_for_each_entry(page, &pgd_list, lru) {
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pgd_t *pgd;
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pud_t *pud;
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pmd_t *pmd;
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pgd = (pgd_t *)page_address(page) + pgd_index(address);
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pud = pud_offset(pgd, address);
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pmd = pmd_offset(pud, address);
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set_pte_atomic((pte_t *)pmd, pte);
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}
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}
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#endif
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}
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static int
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try_preserve_large_page(pte_t *kpte, unsigned long address,
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struct cpa_data *cpa)
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{
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unsigned long nextpage_addr, numpages, pmask, psize, addr, pfn;
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pte_t new_pte, old_pte, *tmp;
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pgprot_t old_prot, new_prot, req_prot;
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int i, do_split = 1;
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enum pg_level level;
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if (cpa->force_split)
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return 1;
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spin_lock(&pgd_lock);
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/*
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* Check for races, another CPU might have split this page
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* up already:
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*/
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tmp = _lookup_address_cpa(cpa, address, &level);
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if (tmp != kpte)
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goto out_unlock;
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switch (level) {
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case PG_LEVEL_2M:
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#ifdef CONFIG_X86_64
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case PG_LEVEL_1G:
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#endif
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psize = page_level_size(level);
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pmask = page_level_mask(level);
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break;
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default:
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do_split = -EINVAL;
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goto out_unlock;
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}
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|
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/*
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* Calculate the number of pages, which fit into this large
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* page starting at address:
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*/
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nextpage_addr = (address + psize) & pmask;
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numpages = (nextpage_addr - address) >> PAGE_SHIFT;
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if (numpages < cpa->numpages)
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cpa->numpages = numpages;
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|
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/*
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* We are safe now. Check whether the new pgprot is the same:
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*/
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old_pte = *kpte;
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old_prot = req_prot = pte_pgprot(old_pte);
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pgprot_val(req_prot) &= ~pgprot_val(cpa->mask_clr);
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pgprot_val(req_prot) |= pgprot_val(cpa->mask_set);
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|
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/*
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* Set the PSE and GLOBAL flags only if the PRESENT flag is
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* set otherwise pmd_present/pmd_huge will return true even on
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* a non present pmd. The canon_pgprot will clear _PAGE_GLOBAL
|
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* for the ancient hardware that doesn't support it.
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*/
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if (pgprot_val(req_prot) & _PAGE_PRESENT)
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pgprot_val(req_prot) |= _PAGE_PSE | _PAGE_GLOBAL;
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else
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pgprot_val(req_prot) &= ~(_PAGE_PSE | _PAGE_GLOBAL);
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req_prot = canon_pgprot(req_prot);
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|
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/*
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* old_pte points to the large page base address. So we need
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* to add the offset of the virtual address:
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*/
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pfn = pte_pfn(old_pte) + ((address & (psize - 1)) >> PAGE_SHIFT);
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cpa->pfn = pfn;
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|
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new_prot = static_protections(req_prot, address, pfn);
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|
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/*
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* We need to check the full range, whether
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* static_protection() requires a different pgprot for one of
|
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* the pages in the range we try to preserve:
|
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*/
|
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addr = address & pmask;
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pfn = pte_pfn(old_pte);
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for (i = 0; i < (psize >> PAGE_SHIFT); i++, addr += PAGE_SIZE, pfn++) {
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pgprot_t chk_prot = static_protections(req_prot, addr, pfn);
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|
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if (pgprot_val(chk_prot) != pgprot_val(new_prot))
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goto out_unlock;
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}
|
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|
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/*
|
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* If there are no changes, return. maxpages has been updated
|
|
* above:
|
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*/
|
|
if (pgprot_val(new_prot) == pgprot_val(old_prot)) {
|
|
do_split = 0;
|
|
goto out_unlock;
|
|
}
|
|
|
|
/*
|
|
* We need to change the attributes. Check, whether we can
|
|
* change the large page in one go. We request a split, when
|
|
* the address is not aligned and the number of pages is
|
|
* smaller than the number of pages in the large page. Note
|
|
* that we limited the number of possible pages already to
|
|
* the number of pages in the large page.
|
|
*/
|
|
if (address == (address & pmask) && cpa->numpages == (psize >> PAGE_SHIFT)) {
|
|
/*
|
|
* The address is aligned and the number of pages
|
|
* covers the full page.
|
|
*/
|
|
new_pte = pfn_pte(pte_pfn(old_pte), new_prot);
|
|
__set_pmd_pte(kpte, address, new_pte);
|
|
cpa->flags |= CPA_FLUSHTLB;
|
|
do_split = 0;
|
|
}
|
|
|
|
out_unlock:
|
|
spin_unlock(&pgd_lock);
|
|
|
|
return do_split;
|
|
}
|
|
|
|
static int
|
|
__split_large_page(struct cpa_data *cpa, pte_t *kpte, unsigned long address,
|
|
struct page *base)
|
|
{
|
|
pte_t *pbase = (pte_t *)page_address(base);
|
|
unsigned long pfn, pfninc = 1;
|
|
unsigned int i, level;
|
|
pte_t *tmp;
|
|
pgprot_t ref_prot;
|
|
|
|
spin_lock(&pgd_lock);
|
|
/*
|
|
* Check for races, another CPU might have split this page
|
|
* up for us already:
|
|
*/
|
|
tmp = _lookup_address_cpa(cpa, address, &level);
|
|
if (tmp != kpte) {
|
|
spin_unlock(&pgd_lock);
|
|
return 1;
|
|
}
|
|
|
|
paravirt_alloc_pte(&init_mm, page_to_pfn(base));
|
|
ref_prot = pte_pgprot(pte_clrhuge(*kpte));
|
|
/*
|
|
* If we ever want to utilize the PAT bit, we need to
|
|
* update this function to make sure it's converted from
|
|
* bit 12 to bit 7 when we cross from the 2MB level to
|
|
* the 4K level:
|
|
*/
|
|
WARN_ON_ONCE(pgprot_val(ref_prot) & _PAGE_PAT_LARGE);
|
|
|
|
#ifdef CONFIG_X86_64
|
|
if (level == PG_LEVEL_1G) {
|
|
pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT;
|
|
/*
|
|
* Set the PSE flags only if the PRESENT flag is set
|
|
* otherwise pmd_present/pmd_huge will return true
|
|
* even on a non present pmd.
|
|
*/
|
|
if (pgprot_val(ref_prot) & _PAGE_PRESENT)
|
|
pgprot_val(ref_prot) |= _PAGE_PSE;
|
|
else
|
|
pgprot_val(ref_prot) &= ~_PAGE_PSE;
|
|
}
|
|
#endif
|
|
|
|
/*
|
|
* Set the GLOBAL flags only if the PRESENT flag is set
|
|
* otherwise pmd/pte_present will return true even on a non
|
|
* present pmd/pte. The canon_pgprot will clear _PAGE_GLOBAL
|
|
* for the ancient hardware that doesn't support it.
|
|
*/
|
|
if (pgprot_val(ref_prot) & _PAGE_PRESENT)
|
|
pgprot_val(ref_prot) |= _PAGE_GLOBAL;
|
|
else
|
|
pgprot_val(ref_prot) &= ~_PAGE_GLOBAL;
|
|
|
|
/*
|
|
* Get the target pfn from the original entry:
|
|
*/
|
|
pfn = pte_pfn(*kpte);
|
|
for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc)
|
|
set_pte(&pbase[i], pfn_pte(pfn, canon_pgprot(ref_prot)));
|
|
|
|
if (pfn_range_is_mapped(PFN_DOWN(__pa(address)),
|
|
PFN_DOWN(__pa(address)) + 1))
|
|
split_page_count(level);
|
|
|
|
/*
|
|
* Install the new, split up pagetable.
|
|
*
|
|
* We use the standard kernel pagetable protections for the new
|
|
* pagetable protections, the actual ptes set above control the
|
|
* primary protection behavior:
|
|
*/
|
|
__set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE)));
|
|
|
|
/*
|
|
* Intel Atom errata AAH41 workaround.
|
|
*
|
|
* The real fix should be in hw or in a microcode update, but
|
|
* we also probabilistically try to reduce the window of having
|
|
* a large TLB mixed with 4K TLBs while instruction fetches are
|
|
* going on.
|
|
*/
|
|
__flush_tlb_all();
|
|
spin_unlock(&pgd_lock);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int split_large_page(struct cpa_data *cpa, pte_t *kpte,
|
|
unsigned long address)
|
|
{
|
|
struct page *base;
|
|
|
|
if (!debug_pagealloc)
|
|
spin_unlock(&cpa_lock);
|
|
base = alloc_pages(GFP_KERNEL | __GFP_NOTRACK, 0);
|
|
if (!debug_pagealloc)
|
|
spin_lock(&cpa_lock);
|
|
if (!base)
|
|
return -ENOMEM;
|
|
|
|
if (__split_large_page(cpa, kpte, address, base))
|
|
__free_page(base);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static bool try_to_free_pte_page(pte_t *pte)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < PTRS_PER_PTE; i++)
|
|
if (!pte_none(pte[i]))
|
|
return false;
|
|
|
|
free_page((unsigned long)pte);
|
|
return true;
|
|
}
|
|
|
|
static bool try_to_free_pmd_page(pmd_t *pmd)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < PTRS_PER_PMD; i++)
|
|
if (!pmd_none(pmd[i]))
|
|
return false;
|
|
|
|
free_page((unsigned long)pmd);
|
|
return true;
|
|
}
|
|
|
|
static bool unmap_pte_range(pmd_t *pmd, unsigned long start, unsigned long end)
|
|
{
|
|
pte_t *pte = pte_offset_kernel(pmd, start);
|
|
|
|
while (start < end) {
|
|
set_pte(pte, __pte(0));
|
|
|
|
start += PAGE_SIZE;
|
|
pte++;
|
|
}
|
|
|
|
if (try_to_free_pte_page((pte_t *)pmd_page_vaddr(*pmd))) {
|
|
pmd_clear(pmd);
|
|
return true;
|
|
}
|
|
return false;
|
|
}
|
|
|
|
static void __unmap_pmd_range(pud_t *pud, pmd_t *pmd,
|
|
unsigned long start, unsigned long end)
|
|
{
|
|
if (unmap_pte_range(pmd, start, end))
|
|
if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud)))
|
|
pud_clear(pud);
|
|
}
|
|
|
|
static void unmap_pmd_range(pud_t *pud, unsigned long start, unsigned long end)
|
|
{
|
|
pmd_t *pmd = pmd_offset(pud, start);
|
|
|
|
/*
|
|
* Not on a 2MB page boundary?
|
|
*/
|
|
if (start & (PMD_SIZE - 1)) {
|
|
unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
|
|
unsigned long pre_end = min_t(unsigned long, end, next_page);
|
|
|
|
__unmap_pmd_range(pud, pmd, start, pre_end);
|
|
|
|
start = pre_end;
|
|
pmd++;
|
|
}
|
|
|
|
/*
|
|
* Try to unmap in 2M chunks.
|
|
*/
|
|
while (end - start >= PMD_SIZE) {
|
|
if (pmd_large(*pmd))
|
|
pmd_clear(pmd);
|
|
else
|
|
__unmap_pmd_range(pud, pmd, start, start + PMD_SIZE);
|
|
|
|
start += PMD_SIZE;
|
|
pmd++;
|
|
}
|
|
|
|
/*
|
|
* 4K leftovers?
|
|
*/
|
|
if (start < end)
|
|
return __unmap_pmd_range(pud, pmd, start, end);
|
|
|
|
/*
|
|
* Try again to free the PMD page if haven't succeeded above.
|
|
*/
|
|
if (!pud_none(*pud))
|
|
if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud)))
|
|
pud_clear(pud);
|
|
}
|
|
|
|
static void unmap_pud_range(pgd_t *pgd, unsigned long start, unsigned long end)
|
|
{
|
|
pud_t *pud = pud_offset(pgd, start);
|
|
|
|
/*
|
|
* Not on a GB page boundary?
|
|
*/
|
|
if (start & (PUD_SIZE - 1)) {
|
|
unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
|
|
unsigned long pre_end = min_t(unsigned long, end, next_page);
|
|
|
|
unmap_pmd_range(pud, start, pre_end);
|
|
|
|
start = pre_end;
|
|
pud++;
|
|
}
|
|
|
|
/*
|
|
* Try to unmap in 1G chunks?
|
|
*/
|
|
while (end - start >= PUD_SIZE) {
|
|
|
|
if (pud_large(*pud))
|
|
pud_clear(pud);
|
|
else
|
|
unmap_pmd_range(pud, start, start + PUD_SIZE);
|
|
|
|
start += PUD_SIZE;
|
|
pud++;
|
|
}
|
|
|
|
/*
|
|
* 2M leftovers?
|
|
*/
|
|
if (start < end)
|
|
unmap_pmd_range(pud, start, end);
|
|
|
|
/*
|
|
* No need to try to free the PUD page because we'll free it in
|
|
* populate_pgd's error path
|
|
*/
|
|
}
|
|
|
|
static int alloc_pte_page(pmd_t *pmd)
|
|
{
|
|
pte_t *pte = (pte_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
|
|
if (!pte)
|
|
return -1;
|
|
|
|
set_pmd(pmd, __pmd(__pa(pte) | _KERNPG_TABLE));
|
|
return 0;
|
|
}
|
|
|
|
static int alloc_pmd_page(pud_t *pud)
|
|
{
|
|
pmd_t *pmd = (pmd_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
|
|
if (!pmd)
|
|
return -1;
|
|
|
|
set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE));
|
|
return 0;
|
|
}
|
|
|
|
static void populate_pte(struct cpa_data *cpa,
|
|
unsigned long start, unsigned long end,
|
|
unsigned num_pages, pmd_t *pmd, pgprot_t pgprot)
|
|
{
|
|
pte_t *pte;
|
|
|
|
pte = pte_offset_kernel(pmd, start);
|
|
|
|
while (num_pages-- && start < end) {
|
|
|
|
/* deal with the NX bit */
|
|
if (!(pgprot_val(pgprot) & _PAGE_NX))
|
|
cpa->pfn &= ~_PAGE_NX;
|
|
|
|
set_pte(pte, pfn_pte(cpa->pfn >> PAGE_SHIFT, pgprot));
|
|
|
|
start += PAGE_SIZE;
|
|
cpa->pfn += PAGE_SIZE;
|
|
pte++;
|
|
}
|
|
}
|
|
|
|
static int populate_pmd(struct cpa_data *cpa,
|
|
unsigned long start, unsigned long end,
|
|
unsigned num_pages, pud_t *pud, pgprot_t pgprot)
|
|
{
|
|
unsigned int cur_pages = 0;
|
|
pmd_t *pmd;
|
|
|
|
/*
|
|
* Not on a 2M boundary?
|
|
*/
|
|
if (start & (PMD_SIZE - 1)) {
|
|
unsigned long pre_end = start + (num_pages << PAGE_SHIFT);
|
|
unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
|
|
|
|
pre_end = min_t(unsigned long, pre_end, next_page);
|
|
cur_pages = (pre_end - start) >> PAGE_SHIFT;
|
|
cur_pages = min_t(unsigned int, num_pages, cur_pages);
|
|
|
|
/*
|
|
* Need a PTE page?
|
|
*/
|
|
pmd = pmd_offset(pud, start);
|
|
if (pmd_none(*pmd))
|
|
if (alloc_pte_page(pmd))
|
|
return -1;
|
|
|
|
populate_pte(cpa, start, pre_end, cur_pages, pmd, pgprot);
|
|
|
|
start = pre_end;
|
|
}
|
|
|
|
/*
|
|
* We mapped them all?
|
|
*/
|
|
if (num_pages == cur_pages)
|
|
return cur_pages;
|
|
|
|
while (end - start >= PMD_SIZE) {
|
|
|
|
/*
|
|
* We cannot use a 1G page so allocate a PMD page if needed.
|
|
*/
|
|
if (pud_none(*pud))
|
|
if (alloc_pmd_page(pud))
|
|
return -1;
|
|
|
|
pmd = pmd_offset(pud, start);
|
|
|
|
set_pmd(pmd, __pmd(cpa->pfn | _PAGE_PSE | massage_pgprot(pgprot)));
|
|
|
|
start += PMD_SIZE;
|
|
cpa->pfn += PMD_SIZE;
|
|
cur_pages += PMD_SIZE >> PAGE_SHIFT;
|
|
}
|
|
|
|
/*
|
|
* Map trailing 4K pages.
|
|
*/
|
|
if (start < end) {
|
|
pmd = pmd_offset(pud, start);
|
|
if (pmd_none(*pmd))
|
|
if (alloc_pte_page(pmd))
|
|
return -1;
|
|
|
|
populate_pte(cpa, start, end, num_pages - cur_pages,
|
|
pmd, pgprot);
|
|
}
|
|
return num_pages;
|
|
}
|
|
|
|
static int populate_pud(struct cpa_data *cpa, unsigned long start, pgd_t *pgd,
|
|
pgprot_t pgprot)
|
|
{
|
|
pud_t *pud;
|
|
unsigned long end;
|
|
int cur_pages = 0;
|
|
|
|
end = start + (cpa->numpages << PAGE_SHIFT);
|
|
|
|
/*
|
|
* Not on a Gb page boundary? => map everything up to it with
|
|
* smaller pages.
|
|
*/
|
|
if (start & (PUD_SIZE - 1)) {
|
|
unsigned long pre_end;
|
|
unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
|
|
|
|
pre_end = min_t(unsigned long, end, next_page);
|
|
cur_pages = (pre_end - start) >> PAGE_SHIFT;
|
|
cur_pages = min_t(int, (int)cpa->numpages, cur_pages);
|
|
|
|
pud = pud_offset(pgd, start);
|
|
|
|
/*
|
|
* Need a PMD page?
|
|
*/
|
|
if (pud_none(*pud))
|
|
if (alloc_pmd_page(pud))
|
|
return -1;
|
|
|
|
cur_pages = populate_pmd(cpa, start, pre_end, cur_pages,
|
|
pud, pgprot);
|
|
if (cur_pages < 0)
|
|
return cur_pages;
|
|
|
|
start = pre_end;
|
|
}
|
|
|
|
/* We mapped them all? */
|
|
if (cpa->numpages == cur_pages)
|
|
return cur_pages;
|
|
|
|
pud = pud_offset(pgd, start);
|
|
|
|
/*
|
|
* Map everything starting from the Gb boundary, possibly with 1G pages
|
|
*/
|
|
while (end - start >= PUD_SIZE) {
|
|
set_pud(pud, __pud(cpa->pfn | _PAGE_PSE | massage_pgprot(pgprot)));
|
|
|
|
start += PUD_SIZE;
|
|
cpa->pfn += PUD_SIZE;
|
|
cur_pages += PUD_SIZE >> PAGE_SHIFT;
|
|
pud++;
|
|
}
|
|
|
|
/* Map trailing leftover */
|
|
if (start < end) {
|
|
int tmp;
|
|
|
|
pud = pud_offset(pgd, start);
|
|
if (pud_none(*pud))
|
|
if (alloc_pmd_page(pud))
|
|
return -1;
|
|
|
|
tmp = populate_pmd(cpa, start, end, cpa->numpages - cur_pages,
|
|
pud, pgprot);
|
|
if (tmp < 0)
|
|
return cur_pages;
|
|
|
|
cur_pages += tmp;
|
|
}
|
|
return cur_pages;
|
|
}
|
|
|
|
/*
|
|
* Restrictions for kernel page table do not necessarily apply when mapping in
|
|
* an alternate PGD.
|
|
*/
|
|
static int populate_pgd(struct cpa_data *cpa, unsigned long addr)
|
|
{
|
|
pgprot_t pgprot = __pgprot(_KERNPG_TABLE);
|
|
bool allocd_pgd = false;
|
|
pgd_t *pgd_entry;
|
|
pud_t *pud = NULL; /* shut up gcc */
|
|
int ret;
|
|
|
|
pgd_entry = cpa->pgd + pgd_index(addr);
|
|
|
|
/*
|
|
* Allocate a PUD page and hand it down for mapping.
|
|
*/
|
|
if (pgd_none(*pgd_entry)) {
|
|
pud = (pud_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
|
|
if (!pud)
|
|
return -1;
|
|
|
|
set_pgd(pgd_entry, __pgd(__pa(pud) | _KERNPG_TABLE));
|
|
allocd_pgd = true;
|
|
}
|
|
|
|
pgprot_val(pgprot) &= ~pgprot_val(cpa->mask_clr);
|
|
pgprot_val(pgprot) |= pgprot_val(cpa->mask_set);
|
|
|
|
ret = populate_pud(cpa, addr, pgd_entry, pgprot);
|
|
if (ret < 0) {
|
|
unmap_pud_range(pgd_entry, addr,
|
|
addr + (cpa->numpages << PAGE_SHIFT));
|
|
|
|
if (allocd_pgd) {
|
|
/*
|
|
* If I allocated this PUD page, I can just as well
|
|
* free it in this error path.
|
|
*/
|
|
pgd_clear(pgd_entry);
|
|
free_page((unsigned long)pud);
|
|
}
|
|
return ret;
|
|
}
|
|
cpa->numpages = ret;
|
|
return 0;
|
|
}
|
|
|
|
static int __cpa_process_fault(struct cpa_data *cpa, unsigned long vaddr,
|
|
int primary)
|
|
{
|
|
if (cpa->pgd)
|
|
return populate_pgd(cpa, vaddr);
|
|
|
|
/*
|
|
* Ignore all non primary paths.
|
|
*/
|
|
if (!primary)
|
|
return 0;
|
|
|
|
/*
|
|
* Ignore the NULL PTE for kernel identity mapping, as it is expected
|
|
* to have holes.
|
|
* Also set numpages to '1' indicating that we processed cpa req for
|
|
* one virtual address page and its pfn. TBD: numpages can be set based
|
|
* on the initial value and the level returned by lookup_address().
|
|
*/
|
|
if (within(vaddr, PAGE_OFFSET,
|
|
PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))) {
|
|
cpa->numpages = 1;
|
|
cpa->pfn = __pa(vaddr) >> PAGE_SHIFT;
|
|
return 0;
|
|
} else {
|
|
WARN(1, KERN_WARNING "CPA: called for zero pte. "
|
|
"vaddr = %lx cpa->vaddr = %lx\n", vaddr,
|
|
*cpa->vaddr);
|
|
|
|
return -EFAULT;
|
|
}
|
|
}
|
|
|
|
static int __change_page_attr(struct cpa_data *cpa, int primary)
|
|
{
|
|
unsigned long address;
|
|
int do_split, err;
|
|
unsigned int level;
|
|
pte_t *kpte, old_pte;
|
|
|
|
if (cpa->flags & CPA_PAGES_ARRAY) {
|
|
struct page *page = cpa->pages[cpa->curpage];
|
|
if (unlikely(PageHighMem(page)))
|
|
return 0;
|
|
address = (unsigned long)page_address(page);
|
|
} else if (cpa->flags & CPA_ARRAY)
|
|
address = cpa->vaddr[cpa->curpage];
|
|
else
|
|
address = *cpa->vaddr;
|
|
repeat:
|
|
kpte = _lookup_address_cpa(cpa, address, &level);
|
|
if (!kpte)
|
|
return __cpa_process_fault(cpa, address, primary);
|
|
|
|
old_pte = *kpte;
|
|
if (!pte_val(old_pte))
|
|
return __cpa_process_fault(cpa, address, primary);
|
|
|
|
if (level == PG_LEVEL_4K) {
|
|
pte_t new_pte;
|
|
pgprot_t new_prot = pte_pgprot(old_pte);
|
|
unsigned long pfn = pte_pfn(old_pte);
|
|
|
|
pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
|
|
pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
|
|
|
|
new_prot = static_protections(new_prot, address, pfn);
|
|
|
|
/*
|
|
* Set the GLOBAL flags only if the PRESENT flag is
|
|
* set otherwise pte_present will return true even on
|
|
* a non present pte. The canon_pgprot will clear
|
|
* _PAGE_GLOBAL for the ancient hardware that doesn't
|
|
* support it.
|
|
*/
|
|
if (pgprot_val(new_prot) & _PAGE_PRESENT)
|
|
pgprot_val(new_prot) |= _PAGE_GLOBAL;
|
|
else
|
|
pgprot_val(new_prot) &= ~_PAGE_GLOBAL;
|
|
|
|
/*
|
|
* We need to keep the pfn from the existing PTE,
|
|
* after all we're only going to change it's attributes
|
|
* not the memory it points to
|
|
*/
|
|
new_pte = pfn_pte(pfn, canon_pgprot(new_prot));
|
|
cpa->pfn = pfn;
|
|
/*
|
|
* Do we really change anything ?
|
|
*/
|
|
if (pte_val(old_pte) != pte_val(new_pte)) {
|
|
set_pte_atomic(kpte, new_pte);
|
|
cpa->flags |= CPA_FLUSHTLB;
|
|
}
|
|
cpa->numpages = 1;
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Check, whether we can keep the large page intact
|
|
* and just change the pte:
|
|
*/
|
|
do_split = try_preserve_large_page(kpte, address, cpa);
|
|
/*
|
|
* When the range fits into the existing large page,
|
|
* return. cp->numpages and cpa->tlbflush have been updated in
|
|
* try_large_page:
|
|
*/
|
|
if (do_split <= 0)
|
|
return do_split;
|
|
|
|
/*
|
|
* We have to split the large page:
|
|
*/
|
|
err = split_large_page(cpa, kpte, address);
|
|
if (!err) {
|
|
/*
|
|
* Do a global flush tlb after splitting the large page
|
|
* and before we do the actual change page attribute in the PTE.
|
|
*
|
|
* With out this, we violate the TLB application note, that says
|
|
* "The TLBs may contain both ordinary and large-page
|
|
* translations for a 4-KByte range of linear addresses. This
|
|
* may occur if software modifies the paging structures so that
|
|
* the page size used for the address range changes. If the two
|
|
* translations differ with respect to page frame or attributes
|
|
* (e.g., permissions), processor behavior is undefined and may
|
|
* be implementation-specific."
|
|
*
|
|
* We do this global tlb flush inside the cpa_lock, so that we
|
|
* don't allow any other cpu, with stale tlb entries change the
|
|
* page attribute in parallel, that also falls into the
|
|
* just split large page entry.
|
|
*/
|
|
flush_tlb_all();
|
|
goto repeat;
|
|
}
|
|
|
|
return err;
|
|
}
|
|
|
|
static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias);
|
|
|
|
static int cpa_process_alias(struct cpa_data *cpa)
|
|
{
|
|
struct cpa_data alias_cpa;
|
|
unsigned long laddr = (unsigned long)__va(cpa->pfn << PAGE_SHIFT);
|
|
unsigned long vaddr;
|
|
int ret;
|
|
|
|
if (!pfn_range_is_mapped(cpa->pfn, cpa->pfn + 1))
|
|
return 0;
|
|
|
|
/*
|
|
* No need to redo, when the primary call touched the direct
|
|
* mapping already:
|
|
*/
|
|
if (cpa->flags & CPA_PAGES_ARRAY) {
|
|
struct page *page = cpa->pages[cpa->curpage];
|
|
if (unlikely(PageHighMem(page)))
|
|
return 0;
|
|
vaddr = (unsigned long)page_address(page);
|
|
} else if (cpa->flags & CPA_ARRAY)
|
|
vaddr = cpa->vaddr[cpa->curpage];
|
|
else
|
|
vaddr = *cpa->vaddr;
|
|
|
|
if (!(within(vaddr, PAGE_OFFSET,
|
|
PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT)))) {
|
|
|
|
alias_cpa = *cpa;
|
|
alias_cpa.vaddr = &laddr;
|
|
alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
|
|
|
|
ret = __change_page_attr_set_clr(&alias_cpa, 0);
|
|
if (ret)
|
|
return ret;
|
|
}
|
|
|
|
#ifdef CONFIG_X86_64
|
|
/*
|
|
* If the primary call didn't touch the high mapping already
|
|
* and the physical address is inside the kernel map, we need
|
|
* to touch the high mapped kernel as well:
|
|
*/
|
|
if (!within(vaddr, (unsigned long)_text, _brk_end) &&
|
|
within(cpa->pfn, highmap_start_pfn(), highmap_end_pfn())) {
|
|
unsigned long temp_cpa_vaddr = (cpa->pfn << PAGE_SHIFT) +
|
|
__START_KERNEL_map - phys_base;
|
|
alias_cpa = *cpa;
|
|
alias_cpa.vaddr = &temp_cpa_vaddr;
|
|
alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
|
|
|
|
/*
|
|
* The high mapping range is imprecise, so ignore the
|
|
* return value.
|
|
*/
|
|
__change_page_attr_set_clr(&alias_cpa, 0);
|
|
}
|
|
#endif
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias)
|
|
{
|
|
int ret, numpages = cpa->numpages;
|
|
|
|
while (numpages) {
|
|
/*
|
|
* Store the remaining nr of pages for the large page
|
|
* preservation check.
|
|
*/
|
|
cpa->numpages = numpages;
|
|
/* for array changes, we can't use large page */
|
|
if (cpa->flags & (CPA_ARRAY | CPA_PAGES_ARRAY))
|
|
cpa->numpages = 1;
|
|
|
|
if (!debug_pagealloc)
|
|
spin_lock(&cpa_lock);
|
|
ret = __change_page_attr(cpa, checkalias);
|
|
if (!debug_pagealloc)
|
|
spin_unlock(&cpa_lock);
|
|
if (ret)
|
|
return ret;
|
|
|
|
if (checkalias) {
|
|
ret = cpa_process_alias(cpa);
|
|
if (ret)
|
|
return ret;
|
|
}
|
|
|
|
/*
|
|
* Adjust the number of pages with the result of the
|
|
* CPA operation. Either a large page has been
|
|
* preserved or a single page update happened.
|
|
*/
|
|
BUG_ON(cpa->numpages > numpages);
|
|
numpages -= cpa->numpages;
|
|
if (cpa->flags & (CPA_PAGES_ARRAY | CPA_ARRAY))
|
|
cpa->curpage++;
|
|
else
|
|
*cpa->vaddr += cpa->numpages * PAGE_SIZE;
|
|
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static inline int cache_attr(pgprot_t attr)
|
|
{
|
|
return pgprot_val(attr) &
|
|
(_PAGE_PAT | _PAGE_PAT_LARGE | _PAGE_PWT | _PAGE_PCD);
|
|
}
|
|
|
|
static int change_page_attr_set_clr(unsigned long *addr, int numpages,
|
|
pgprot_t mask_set, pgprot_t mask_clr,
|
|
int force_split, int in_flag,
|
|
struct page **pages)
|
|
{
|
|
struct cpa_data cpa;
|
|
int ret, cache, checkalias;
|
|
unsigned long baddr = 0;
|
|
|
|
memset(&cpa, 0, sizeof(cpa));
|
|
|
|
/*
|
|
* Check, if we are requested to change a not supported
|
|
* feature:
|
|
*/
|
|
mask_set = canon_pgprot(mask_set);
|
|
mask_clr = canon_pgprot(mask_clr);
|
|
if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split)
|
|
return 0;
|
|
|
|
/* Ensure we are PAGE_SIZE aligned */
|
|
if (in_flag & CPA_ARRAY) {
|
|
int i;
|
|
for (i = 0; i < numpages; i++) {
|
|
if (addr[i] & ~PAGE_MASK) {
|
|
addr[i] &= PAGE_MASK;
|
|
WARN_ON_ONCE(1);
|
|
}
|
|
}
|
|
} else if (!(in_flag & CPA_PAGES_ARRAY)) {
|
|
/*
|
|
* in_flag of CPA_PAGES_ARRAY implies it is aligned.
|
|
* No need to cehck in that case
|
|
*/
|
|
if (*addr & ~PAGE_MASK) {
|
|
*addr &= PAGE_MASK;
|
|
/*
|
|
* People should not be passing in unaligned addresses:
|
|
*/
|
|
WARN_ON_ONCE(1);
|
|
}
|
|
/*
|
|
* Save address for cache flush. *addr is modified in the call
|
|
* to __change_page_attr_set_clr() below.
|
|
*/
|
|
baddr = *addr;
|
|
}
|
|
|
|
/* Must avoid aliasing mappings in the highmem code */
|
|
kmap_flush_unused();
|
|
|
|
vm_unmap_aliases();
|
|
|
|
cpa.vaddr = addr;
|
|
cpa.pages = pages;
|
|
cpa.numpages = numpages;
|
|
cpa.mask_set = mask_set;
|
|
cpa.mask_clr = mask_clr;
|
|
cpa.flags = 0;
|
|
cpa.curpage = 0;
|
|
cpa.force_split = force_split;
|
|
|
|
if (in_flag & (CPA_ARRAY | CPA_PAGES_ARRAY))
|
|
cpa.flags |= in_flag;
|
|
|
|
/* No alias checking for _NX bit modifications */
|
|
checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX;
|
|
|
|
ret = __change_page_attr_set_clr(&cpa, checkalias);
|
|
|
|
/*
|
|
* Check whether we really changed something:
|
|
*/
|
|
if (!(cpa.flags & CPA_FLUSHTLB))
|
|
goto out;
|
|
|
|
/*
|
|
* No need to flush, when we did not set any of the caching
|
|
* attributes:
|
|
*/
|
|
cache = cache_attr(mask_set);
|
|
|
|
/*
|
|
* On success we use clflush, when the CPU supports it to
|
|
* avoid the wbindv. If the CPU does not support it and in the
|
|
* error case we fall back to cpa_flush_all (which uses
|
|
* wbindv):
|
|
*/
|
|
if (!ret && cpu_has_clflush) {
|
|
if (cpa.flags & (CPA_PAGES_ARRAY | CPA_ARRAY)) {
|
|
cpa_flush_array(addr, numpages, cache,
|
|
cpa.flags, pages);
|
|
} else
|
|
cpa_flush_range(baddr, numpages, cache);
|
|
} else
|
|
cpa_flush_all(cache);
|
|
|
|
out:
|
|
return ret;
|
|
}
|
|
|
|
static inline int change_page_attr_set(unsigned long *addr, int numpages,
|
|
pgprot_t mask, int array)
|
|
{
|
|
return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0,
|
|
(array ? CPA_ARRAY : 0), NULL);
|
|
}
|
|
|
|
static inline int change_page_attr_clear(unsigned long *addr, int numpages,
|
|
pgprot_t mask, int array)
|
|
{
|
|
return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0,
|
|
(array ? CPA_ARRAY : 0), NULL);
|
|
}
|
|
|
|
static inline int cpa_set_pages_array(struct page **pages, int numpages,
|
|
pgprot_t mask)
|
|
{
|
|
return change_page_attr_set_clr(NULL, numpages, mask, __pgprot(0), 0,
|
|
CPA_PAGES_ARRAY, pages);
|
|
}
|
|
|
|
static inline int cpa_clear_pages_array(struct page **pages, int numpages,
|
|
pgprot_t mask)
|
|
{
|
|
return change_page_attr_set_clr(NULL, numpages, __pgprot(0), mask, 0,
|
|
CPA_PAGES_ARRAY, pages);
|
|
}
|
|
|
|
int _set_memory_uc(unsigned long addr, int numpages)
|
|
{
|
|
/*
|
|
* for now UC MINUS. see comments in ioremap_nocache()
|
|
*/
|
|
return change_page_attr_set(&addr, numpages,
|
|
__pgprot(_PAGE_CACHE_UC_MINUS), 0);
|
|
}
|
|
|
|
int set_memory_uc(unsigned long addr, int numpages)
|
|
{
|
|
int ret;
|
|
|
|
/*
|
|
* for now UC MINUS. see comments in ioremap_nocache()
|
|
*/
|
|
ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
|
|
_PAGE_CACHE_UC_MINUS, NULL);
|
|
if (ret)
|
|
goto out_err;
|
|
|
|
ret = _set_memory_uc(addr, numpages);
|
|
if (ret)
|
|
goto out_free;
|
|
|
|
return 0;
|
|
|
|
out_free:
|
|
free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
|
|
out_err:
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL(set_memory_uc);
|
|
|
|
static int _set_memory_array(unsigned long *addr, int addrinarray,
|
|
unsigned long new_type)
|
|
{
|
|
int i, j;
|
|
int ret;
|
|
|
|
/*
|
|
* for now UC MINUS. see comments in ioremap_nocache()
|
|
*/
|
|
for (i = 0; i < addrinarray; i++) {
|
|
ret = reserve_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE,
|
|
new_type, NULL);
|
|
if (ret)
|
|
goto out_free;
|
|
}
|
|
|
|
ret = change_page_attr_set(addr, addrinarray,
|
|
__pgprot(_PAGE_CACHE_UC_MINUS), 1);
|
|
|
|
if (!ret && new_type == _PAGE_CACHE_WC)
|
|
ret = change_page_attr_set_clr(addr, addrinarray,
|
|
__pgprot(_PAGE_CACHE_WC),
|
|
__pgprot(_PAGE_CACHE_MASK),
|
|
0, CPA_ARRAY, NULL);
|
|
if (ret)
|
|
goto out_free;
|
|
|
|
return 0;
|
|
|
|
out_free:
|
|
for (j = 0; j < i; j++)
|
|
free_memtype(__pa(addr[j]), __pa(addr[j]) + PAGE_SIZE);
|
|
|
|
return ret;
|
|
}
|
|
|
|
int set_memory_array_uc(unsigned long *addr, int addrinarray)
|
|
{
|
|
return _set_memory_array(addr, addrinarray, _PAGE_CACHE_UC_MINUS);
|
|
}
|
|
EXPORT_SYMBOL(set_memory_array_uc);
|
|
|
|
int set_memory_array_wc(unsigned long *addr, int addrinarray)
|
|
{
|
|
return _set_memory_array(addr, addrinarray, _PAGE_CACHE_WC);
|
|
}
|
|
EXPORT_SYMBOL(set_memory_array_wc);
|
|
|
|
int _set_memory_wc(unsigned long addr, int numpages)
|
|
{
|
|
int ret;
|
|
unsigned long addr_copy = addr;
|
|
|
|
ret = change_page_attr_set(&addr, numpages,
|
|
__pgprot(_PAGE_CACHE_UC_MINUS), 0);
|
|
if (!ret) {
|
|
ret = change_page_attr_set_clr(&addr_copy, numpages,
|
|
__pgprot(_PAGE_CACHE_WC),
|
|
__pgprot(_PAGE_CACHE_MASK),
|
|
0, 0, NULL);
|
|
}
|
|
return ret;
|
|
}
|
|
|
|
int set_memory_wc(unsigned long addr, int numpages)
|
|
{
|
|
int ret;
|
|
|
|
if (!pat_enabled)
|
|
return set_memory_uc(addr, numpages);
|
|
|
|
ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
|
|
_PAGE_CACHE_WC, NULL);
|
|
if (ret)
|
|
goto out_err;
|
|
|
|
ret = _set_memory_wc(addr, numpages);
|
|
if (ret)
|
|
goto out_free;
|
|
|
|
return 0;
|
|
|
|
out_free:
|
|
free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
|
|
out_err:
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL(set_memory_wc);
|
|
|
|
int _set_memory_wb(unsigned long addr, int numpages)
|
|
{
|
|
return change_page_attr_clear(&addr, numpages,
|
|
__pgprot(_PAGE_CACHE_MASK), 0);
|
|
}
|
|
|
|
int set_memory_wb(unsigned long addr, int numpages)
|
|
{
|
|
int ret;
|
|
|
|
ret = _set_memory_wb(addr, numpages);
|
|
if (ret)
|
|
return ret;
|
|
|
|
free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL(set_memory_wb);
|
|
|
|
int set_memory_array_wb(unsigned long *addr, int addrinarray)
|
|
{
|
|
int i;
|
|
int ret;
|
|
|
|
ret = change_page_attr_clear(addr, addrinarray,
|
|
__pgprot(_PAGE_CACHE_MASK), 1);
|
|
if (ret)
|
|
return ret;
|
|
|
|
for (i = 0; i < addrinarray; i++)
|
|
free_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE);
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL(set_memory_array_wb);
|
|
|
|
int set_memory_x(unsigned long addr, int numpages)
|
|
{
|
|
if (!(__supported_pte_mask & _PAGE_NX))
|
|
return 0;
|
|
|
|
return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_NX), 0);
|
|
}
|
|
EXPORT_SYMBOL(set_memory_x);
|
|
|
|
int set_memory_nx(unsigned long addr, int numpages)
|
|
{
|
|
if (!(__supported_pte_mask & _PAGE_NX))
|
|
return 0;
|
|
|
|
return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_NX), 0);
|
|
}
|
|
EXPORT_SYMBOL(set_memory_nx);
|
|
|
|
int set_memory_ro(unsigned long addr, int numpages)
|
|
{
|
|
return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_RW), 0);
|
|
}
|
|
EXPORT_SYMBOL_GPL(set_memory_ro);
|
|
|
|
int set_memory_rw(unsigned long addr, int numpages)
|
|
{
|
|
return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_RW), 0);
|
|
}
|
|
EXPORT_SYMBOL_GPL(set_memory_rw);
|
|
|
|
int set_memory_np(unsigned long addr, int numpages)
|
|
{
|
|
return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_PRESENT), 0);
|
|
}
|
|
|
|
int set_memory_4k(unsigned long addr, int numpages)
|
|
{
|
|
return change_page_attr_set_clr(&addr, numpages, __pgprot(0),
|
|
__pgprot(0), 1, 0, NULL);
|
|
}
|
|
|
|
int set_pages_uc(struct page *page, int numpages)
|
|
{
|
|
unsigned long addr = (unsigned long)page_address(page);
|
|
|
|
return set_memory_uc(addr, numpages);
|
|
}
|
|
EXPORT_SYMBOL(set_pages_uc);
|
|
|
|
static int _set_pages_array(struct page **pages, int addrinarray,
|
|
unsigned long new_type)
|
|
{
|
|
unsigned long start;
|
|
unsigned long end;
|
|
int i;
|
|
int free_idx;
|
|
int ret;
|
|
|
|
for (i = 0; i < addrinarray; i++) {
|
|
if (PageHighMem(pages[i]))
|
|
continue;
|
|
start = page_to_pfn(pages[i]) << PAGE_SHIFT;
|
|
end = start + PAGE_SIZE;
|
|
if (reserve_memtype(start, end, new_type, NULL))
|
|
goto err_out;
|
|
}
|
|
|
|
ret = cpa_set_pages_array(pages, addrinarray,
|
|
__pgprot(_PAGE_CACHE_UC_MINUS));
|
|
if (!ret && new_type == _PAGE_CACHE_WC)
|
|
ret = change_page_attr_set_clr(NULL, addrinarray,
|
|
__pgprot(_PAGE_CACHE_WC),
|
|
__pgprot(_PAGE_CACHE_MASK),
|
|
0, CPA_PAGES_ARRAY, pages);
|
|
if (ret)
|
|
goto err_out;
|
|
return 0; /* Success */
|
|
err_out:
|
|
free_idx = i;
|
|
for (i = 0; i < free_idx; i++) {
|
|
if (PageHighMem(pages[i]))
|
|
continue;
|
|
start = page_to_pfn(pages[i]) << PAGE_SHIFT;
|
|
end = start + PAGE_SIZE;
|
|
free_memtype(start, end);
|
|
}
|
|
return -EINVAL;
|
|
}
|
|
|
|
int set_pages_array_uc(struct page **pages, int addrinarray)
|
|
{
|
|
return _set_pages_array(pages, addrinarray, _PAGE_CACHE_UC_MINUS);
|
|
}
|
|
EXPORT_SYMBOL(set_pages_array_uc);
|
|
|
|
int set_pages_array_wc(struct page **pages, int addrinarray)
|
|
{
|
|
return _set_pages_array(pages, addrinarray, _PAGE_CACHE_WC);
|
|
}
|
|
EXPORT_SYMBOL(set_pages_array_wc);
|
|
|
|
int set_pages_wb(struct page *page, int numpages)
|
|
{
|
|
unsigned long addr = (unsigned long)page_address(page);
|
|
|
|
return set_memory_wb(addr, numpages);
|
|
}
|
|
EXPORT_SYMBOL(set_pages_wb);
|
|
|
|
int set_pages_array_wb(struct page **pages, int addrinarray)
|
|
{
|
|
int retval;
|
|
unsigned long start;
|
|
unsigned long end;
|
|
int i;
|
|
|
|
retval = cpa_clear_pages_array(pages, addrinarray,
|
|
__pgprot(_PAGE_CACHE_MASK));
|
|
if (retval)
|
|
return retval;
|
|
|
|
for (i = 0; i < addrinarray; i++) {
|
|
if (PageHighMem(pages[i]))
|
|
continue;
|
|
start = page_to_pfn(pages[i]) << PAGE_SHIFT;
|
|
end = start + PAGE_SIZE;
|
|
free_memtype(start, end);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL(set_pages_array_wb);
|
|
|
|
int set_pages_x(struct page *page, int numpages)
|
|
{
|
|
unsigned long addr = (unsigned long)page_address(page);
|
|
|
|
return set_memory_x(addr, numpages);
|
|
}
|
|
EXPORT_SYMBOL(set_pages_x);
|
|
|
|
int set_pages_nx(struct page *page, int numpages)
|
|
{
|
|
unsigned long addr = (unsigned long)page_address(page);
|
|
|
|
return set_memory_nx(addr, numpages);
|
|
}
|
|
EXPORT_SYMBOL(set_pages_nx);
|
|
|
|
int set_pages_ro(struct page *page, int numpages)
|
|
{
|
|
unsigned long addr = (unsigned long)page_address(page);
|
|
|
|
return set_memory_ro(addr, numpages);
|
|
}
|
|
|
|
int set_pages_rw(struct page *page, int numpages)
|
|
{
|
|
unsigned long addr = (unsigned long)page_address(page);
|
|
|
|
return set_memory_rw(addr, numpages);
|
|
}
|
|
|
|
#ifdef CONFIG_DEBUG_PAGEALLOC
|
|
|
|
static int __set_pages_p(struct page *page, int numpages)
|
|
{
|
|
unsigned long tempaddr = (unsigned long) page_address(page);
|
|
struct cpa_data cpa = { .vaddr = &tempaddr,
|
|
.pgd = NULL,
|
|
.numpages = numpages,
|
|
.mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
|
|
.mask_clr = __pgprot(0),
|
|
.flags = 0};
|
|
|
|
/*
|
|
* No alias checking needed for setting present flag. otherwise,
|
|
* we may need to break large pages for 64-bit kernel text
|
|
* mappings (this adds to complexity if we want to do this from
|
|
* atomic context especially). Let's keep it simple!
|
|
*/
|
|
return __change_page_attr_set_clr(&cpa, 0);
|
|
}
|
|
|
|
static int __set_pages_np(struct page *page, int numpages)
|
|
{
|
|
unsigned long tempaddr = (unsigned long) page_address(page);
|
|
struct cpa_data cpa = { .vaddr = &tempaddr,
|
|
.pgd = NULL,
|
|
.numpages = numpages,
|
|
.mask_set = __pgprot(0),
|
|
.mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW),
|
|
.flags = 0};
|
|
|
|
/*
|
|
* No alias checking needed for setting not present flag. otherwise,
|
|
* we may need to break large pages for 64-bit kernel text
|
|
* mappings (this adds to complexity if we want to do this from
|
|
* atomic context especially). Let's keep it simple!
|
|
*/
|
|
return __change_page_attr_set_clr(&cpa, 0);
|
|
}
|
|
|
|
void kernel_map_pages(struct page *page, int numpages, int enable)
|
|
{
|
|
if (PageHighMem(page))
|
|
return;
|
|
if (!enable) {
|
|
debug_check_no_locks_freed(page_address(page),
|
|
numpages * PAGE_SIZE);
|
|
}
|
|
|
|
/*
|
|
* The return value is ignored as the calls cannot fail.
|
|
* Large pages for identity mappings are not used at boot time
|
|
* and hence no memory allocations during large page split.
|
|
*/
|
|
if (enable)
|
|
__set_pages_p(page, numpages);
|
|
else
|
|
__set_pages_np(page, numpages);
|
|
|
|
/*
|
|
* We should perform an IPI and flush all tlbs,
|
|
* but that can deadlock->flush only current cpu:
|
|
*/
|
|
__flush_tlb_all();
|
|
|
|
arch_flush_lazy_mmu_mode();
|
|
}
|
|
|
|
#ifdef CONFIG_HIBERNATION
|
|
|
|
bool kernel_page_present(struct page *page)
|
|
{
|
|
unsigned int level;
|
|
pte_t *pte;
|
|
|
|
if (PageHighMem(page))
|
|
return false;
|
|
|
|
pte = lookup_address((unsigned long)page_address(page), &level);
|
|
return (pte_val(*pte) & _PAGE_PRESENT);
|
|
}
|
|
|
|
#endif /* CONFIG_HIBERNATION */
|
|
|
|
#endif /* CONFIG_DEBUG_PAGEALLOC */
|
|
|
|
int kernel_map_pages_in_pgd(pgd_t *pgd, u64 pfn, unsigned long address,
|
|
unsigned numpages, unsigned long page_flags)
|
|
{
|
|
int retval = -EINVAL;
|
|
|
|
struct cpa_data cpa = {
|
|
.vaddr = &address,
|
|
.pfn = pfn,
|
|
.pgd = pgd,
|
|
.numpages = numpages,
|
|
.mask_set = __pgprot(0),
|
|
.mask_clr = __pgprot(0),
|
|
.flags = 0,
|
|
};
|
|
|
|
if (!(__supported_pte_mask & _PAGE_NX))
|
|
goto out;
|
|
|
|
if (!(page_flags & _PAGE_NX))
|
|
cpa.mask_clr = __pgprot(_PAGE_NX);
|
|
|
|
cpa.mask_set = __pgprot(_PAGE_PRESENT | page_flags);
|
|
|
|
retval = __change_page_attr_set_clr(&cpa, 0);
|
|
__flush_tlb_all();
|
|
|
|
out:
|
|
return retval;
|
|
}
|
|
|
|
/*
|
|
* The testcases use internal knowledge of the implementation that shouldn't
|
|
* be exposed to the rest of the kernel. Include these directly here.
|
|
*/
|
|
#ifdef CONFIG_CPA_DEBUG
|
|
#include "pageattr-test.c"
|
|
#endif
|