287 lines
6.9 KiB
C
287 lines
6.9 KiB
C
/*
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* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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*/
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#include <linux/clk-provider.h>
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#include <linux/clkdev.h>
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#include <linux/clk/at91_pmc.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/io.h>
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#include <linux/wait.h>
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#include <linux/sched.h>
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#include "pmc.h"
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#define PROG_SOURCE_MAX 5
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#define PROG_ID_MAX 7
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#define PROG_STATUS_MASK(id) (1 << ((id) + 8))
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#define PROG_PRES_MASK 0x7
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#define PROG_MAX_RM9200_CSS 3
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struct clk_programmable_layout {
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u8 pres_shift;
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u8 css_mask;
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u8 have_slck_mck;
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};
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struct clk_programmable {
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struct clk_hw hw;
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struct at91_pmc *pmc;
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u8 id;
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const struct clk_programmable_layout *layout;
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};
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#define to_clk_programmable(hw) container_of(hw, struct clk_programmable, hw)
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static unsigned long clk_programmable_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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u32 pres;
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struct clk_programmable *prog = to_clk_programmable(hw);
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struct at91_pmc *pmc = prog->pmc;
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const struct clk_programmable_layout *layout = prog->layout;
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pres = (pmc_read(pmc, AT91_PMC_PCKR(prog->id)) >> layout->pres_shift) &
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PROG_PRES_MASK;
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return parent_rate >> pres;
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}
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static long clk_programmable_determine_rate(struct clk_hw *hw,
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unsigned long rate,
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unsigned long *best_parent_rate,
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struct clk **best_parent_clk)
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{
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struct clk *parent = NULL;
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long best_rate = -EINVAL;
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unsigned long parent_rate;
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unsigned long tmp_rate;
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int shift;
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int i;
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for (i = 0; i < __clk_get_num_parents(hw->clk); i++) {
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parent = clk_get_parent_by_index(hw->clk, i);
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if (!parent)
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continue;
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parent_rate = __clk_get_rate(parent);
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for (shift = 0; shift < PROG_PRES_MASK; shift++) {
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tmp_rate = parent_rate >> shift;
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if (tmp_rate <= rate)
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break;
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}
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if (tmp_rate > rate)
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continue;
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if (best_rate < 0 || (rate - tmp_rate) < (rate - best_rate)) {
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best_rate = tmp_rate;
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*best_parent_rate = parent_rate;
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*best_parent_clk = parent;
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}
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if (!best_rate)
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break;
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}
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return best_rate;
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}
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static int clk_programmable_set_parent(struct clk_hw *hw, u8 index)
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{
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struct clk_programmable *prog = to_clk_programmable(hw);
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const struct clk_programmable_layout *layout = prog->layout;
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struct at91_pmc *pmc = prog->pmc;
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u32 tmp = pmc_read(pmc, AT91_PMC_PCKR(prog->id)) & ~layout->css_mask;
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if (layout->have_slck_mck)
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tmp &= AT91_PMC_CSSMCK_MCK;
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if (index > layout->css_mask) {
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if (index > PROG_MAX_RM9200_CSS && layout->have_slck_mck) {
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tmp |= AT91_PMC_CSSMCK_MCK;
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return 0;
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} else {
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return -EINVAL;
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}
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}
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pmc_write(pmc, AT91_PMC_PCKR(prog->id), tmp | index);
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return 0;
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}
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static u8 clk_programmable_get_parent(struct clk_hw *hw)
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{
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u32 tmp;
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u8 ret;
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struct clk_programmable *prog = to_clk_programmable(hw);
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struct at91_pmc *pmc = prog->pmc;
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const struct clk_programmable_layout *layout = prog->layout;
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tmp = pmc_read(pmc, AT91_PMC_PCKR(prog->id));
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ret = tmp & layout->css_mask;
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if (layout->have_slck_mck && (tmp & AT91_PMC_CSSMCK_MCK) && !ret)
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ret = PROG_MAX_RM9200_CSS + 1;
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return ret;
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}
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static int clk_programmable_set_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long parent_rate)
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{
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struct clk_programmable *prog = to_clk_programmable(hw);
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struct at91_pmc *pmc = prog->pmc;
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const struct clk_programmable_layout *layout = prog->layout;
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unsigned long div = parent_rate / rate;
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int shift = 0;
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u32 tmp = pmc_read(pmc, AT91_PMC_PCKR(prog->id)) &
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~(PROG_PRES_MASK << layout->pres_shift);
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if (!div)
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return -EINVAL;
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shift = fls(div) - 1;
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if (div != (1<<shift))
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return -EINVAL;
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if (shift >= PROG_PRES_MASK)
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return -EINVAL;
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pmc_write(pmc, AT91_PMC_PCKR(prog->id),
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tmp | (shift << layout->pres_shift));
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return 0;
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}
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static const struct clk_ops programmable_ops = {
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.recalc_rate = clk_programmable_recalc_rate,
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.determine_rate = clk_programmable_determine_rate,
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.get_parent = clk_programmable_get_parent,
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.set_parent = clk_programmable_set_parent,
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.set_rate = clk_programmable_set_rate,
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};
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static struct clk * __init
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at91_clk_register_programmable(struct at91_pmc *pmc,
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const char *name, const char **parent_names,
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u8 num_parents, u8 id,
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const struct clk_programmable_layout *layout)
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{
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struct clk_programmable *prog;
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struct clk *clk = NULL;
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struct clk_init_data init;
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if (id > PROG_ID_MAX)
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return ERR_PTR(-EINVAL);
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prog = kzalloc(sizeof(*prog), GFP_KERNEL);
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if (!prog)
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return ERR_PTR(-ENOMEM);
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init.name = name;
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init.ops = &programmable_ops;
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init.parent_names = parent_names;
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init.num_parents = num_parents;
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init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE;
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prog->id = id;
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prog->layout = layout;
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prog->hw.init = &init;
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prog->pmc = pmc;
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clk = clk_register(NULL, &prog->hw);
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if (IS_ERR(clk))
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kfree(prog);
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return clk;
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}
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static const struct clk_programmable_layout at91rm9200_programmable_layout = {
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.pres_shift = 2,
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.css_mask = 0x3,
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.have_slck_mck = 0,
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};
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static const struct clk_programmable_layout at91sam9g45_programmable_layout = {
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.pres_shift = 2,
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.css_mask = 0x3,
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.have_slck_mck = 1,
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};
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static const struct clk_programmable_layout at91sam9x5_programmable_layout = {
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.pres_shift = 4,
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.css_mask = 0x7,
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.have_slck_mck = 0,
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};
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static void __init
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of_at91_clk_prog_setup(struct device_node *np, struct at91_pmc *pmc,
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const struct clk_programmable_layout *layout)
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{
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int num;
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u32 id;
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int i;
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struct clk *clk;
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int num_parents;
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const char *parent_names[PROG_SOURCE_MAX];
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const char *name;
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struct device_node *progclknp;
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num_parents = of_count_phandle_with_args(np, "clocks", "#clock-cells");
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if (num_parents <= 0 || num_parents > PROG_SOURCE_MAX)
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return;
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for (i = 0; i < num_parents; ++i) {
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parent_names[i] = of_clk_get_parent_name(np, i);
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if (!parent_names[i])
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return;
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}
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num = of_get_child_count(np);
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if (!num || num > (PROG_ID_MAX + 1))
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return;
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for_each_child_of_node(np, progclknp) {
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if (of_property_read_u32(progclknp, "reg", &id))
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continue;
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if (of_property_read_string(np, "clock-output-names", &name))
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name = progclknp->name;
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clk = at91_clk_register_programmable(pmc, name,
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parent_names, num_parents,
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id, layout);
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if (IS_ERR(clk))
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continue;
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of_clk_add_provider(progclknp, of_clk_src_simple_get, clk);
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}
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}
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void __init of_at91rm9200_clk_prog_setup(struct device_node *np,
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struct at91_pmc *pmc)
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{
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of_at91_clk_prog_setup(np, pmc, &at91rm9200_programmable_layout);
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}
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void __init of_at91sam9g45_clk_prog_setup(struct device_node *np,
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struct at91_pmc *pmc)
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{
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of_at91_clk_prog_setup(np, pmc, &at91sam9g45_programmable_layout);
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}
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void __init of_at91sam9x5_clk_prog_setup(struct device_node *np,
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struct at91_pmc *pmc)
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{
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of_at91_clk_prog_setup(np, pmc, &at91sam9x5_programmable_layout);
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}
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