60 lines
1.9 KiB
Plaintext
60 lines
1.9 KiB
Plaintext
Freescale's NAND flash controller (NFC)
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This variant of the Freescale NAND flash controller (NFC) can be found on
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Vybrid (vf610), MPC5125, MCF54418 and Kinetis K70.
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Required properties:
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- compatible: Should be set to "fsl,vf610-nfc".
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- reg: address range of the NFC.
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- interrupts: interrupt of the NFC.
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- #address-cells: shall be set to 1. Encode the nand CS.
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- #size-cells : shall be set to 0.
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- assigned-clocks: main clock from the SoC, for Vybrid <&clks VF610_CLK_NFC>;
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- assigned-clock-rates: The NAND bus timing is derived from this clock
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rate and should not exceed maximum timing for any NAND memory chip
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in a board stuffing. Typical NAND memory timings derived from this
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clock are found in the SoC hardware reference manual. Furthermore,
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there might be restrictions on maximum rates when using hardware ECC.
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- #address-cells, #size-cells : Must be present if the device has sub-nodes
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representing partitions.
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Required children nodes:
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Children nodes represent the available nand chips. Currently the driver can
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only handle one NAND chip.
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Required properties:
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- compatible: Should be set to "fsl,vf610-nfc-cs".
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- nand-bus-width: see nand.txt
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- nand-ecc-mode: see nand.txt
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Required properties for hardware ECC:
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- nand-ecc-strength: supported strengths are 24 and 32 bit (see nand.txt)
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- nand-ecc-step-size: step size equals page size, currently only 2k pages are
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supported
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- nand-on-flash-bbt: see nand.txt
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Example:
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nfc: nand@400e0000 {
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compatible = "fsl,vf610-nfc";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x400e0000 0x4000>;
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interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks VF610_CLK_NFC>;
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clock-names = "nfc";
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assigned-clocks = <&clks VF610_CLK_NFC>;
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assigned-clock-rates = <33000000>;
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nand@0 {
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compatible = "fsl,vf610-nfc-nandcs";
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reg = <0>;
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nand-bus-width = <8>;
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nand-ecc-mode = "hw";
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nand-ecc-strength = <32>;
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nand-ecc-step-size = <2048>;
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nand-on-flash-bbt;
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};
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};
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