96 lines
3.4 KiB
Plaintext
96 lines
3.4 KiB
Plaintext
* Atmel Universal Synchronous Asynchronous Receiver/Transmitter (USART)
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Required properties for USART:
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- compatible: Should be "atmel,<chip>-usart" or "atmel,<chip>-dbgu"
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The compatible <chip> indicated will be the first SoC to support an
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additional mode or an USART new feature.
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For the dbgu UART, use "atmel,<chip>-dbgu", "atmel,<chip>-usart"
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- reg: Should contain registers location and length
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- interrupts: Should contain interrupt
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- clock-names: tuple listing input clock names.
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Required elements: "usart"
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- clocks: phandles to input clocks.
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Required properties for USART in SPI mode:
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- #size-cells : Must be <0>
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- #address-cells : Must be <1>
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- cs-gpios: chipselects (internal cs not supported)
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- atmel,usart-mode : Must be <AT91_USART_MODE_SPI> (found in dt-bindings/mfd/at91-usart.h)
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Optional properties in serial and SPI mode:
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- dma bindings for dma transfer:
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- dmas: DMA specifier, consisting of a phandle to DMA controller node,
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memory peripheral interface and USART DMA channel ID, FIFO configuration.
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The order of DMA channels is fixed. The first DMA channel must be TX
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associated channel and the second one must be RX associated channel.
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Refer to dma.txt and atmel-dma.txt for details.
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- dma-names: "tx" for TX channel.
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"rx" for RX channel.
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The order of dma-names is also fixed. The first name must be "tx"
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and the second one must be "rx" as in the examples below.
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Optional properties in serial mode:
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- atmel,use-dma-rx: use of PDC or DMA for receiving data
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- atmel,use-dma-tx: use of PDC or DMA for transmitting data
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- {rts,cts,dtr,dsr,rng,dcd}-gpios: specify a GPIO for RTS/CTS/DTR/DSR/RI/DCD line respectively.
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It will use specified PIO instead of the peripheral function pin for the USART feature.
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If unsure, don't specify this property.
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- atmel,fifo-size: maximum number of data the RX and TX FIFOs can store for FIFO
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capable USARTs.
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- rs485-rts-delay, rs485-rx-during-tx, linux,rs485-enabled-at-boot-time: see rs485.txt
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<chip> compatible description:
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- at91rm9200: legacy USART support
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- at91sam9260: generic USART implementation for SAM9 SoCs
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Example:
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- use PDC:
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usart0: serial@fff8c000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xfff8c000 0x4000>;
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interrupts = <7>;
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clocks = <&usart0_clk>;
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clock-names = "usart";
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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rts-gpios = <&pioD 15 GPIO_ACTIVE_LOW>;
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cts-gpios = <&pioD 16 GPIO_ACTIVE_LOW>;
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dtr-gpios = <&pioD 17 GPIO_ACTIVE_LOW>;
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dsr-gpios = <&pioD 18 GPIO_ACTIVE_LOW>;
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dcd-gpios = <&pioD 20 GPIO_ACTIVE_LOW>;
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rng-gpios = <&pioD 19 GPIO_ACTIVE_LOW>;
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};
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- use DMA:
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usart0: serial@f001c000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xf001c000 0x100>;
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interrupts = <12 4 5>;
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clocks = <&usart0_clk>;
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clock-names = "usart";
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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dmas = <&dma0 2 0x3>,
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<&dma0 2 0x204>;
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dma-names = "tx", "rx";
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atmel,fifo-size = <32>;
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};
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- SPI mode:
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#include <dt-bindings/mfd/at91-usart.h>
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spi0: spi@f001c000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "atmel,at91rm9200-usart", "atmel,at91sam9260-usart";
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atmel,usart-mode = <AT91_USART_MODE_SPI>;
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reg = <0xf001c000 0x100>;
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interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
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clocks = <&usart0_clk>;
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clock-names = "usart";
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dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>,
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<&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
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dma-names = "tx", "rx";
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cs-gpios = <&pioB 3 0>;
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};
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