278 lines
7.4 KiB
C
278 lines
7.4 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Ricoh RP5C01 RTC Driver
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*
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* Copyright 2009 Geert Uytterhoeven
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*
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* Based on the A3000 TOD code in arch/m68k/amiga/config.c
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* Copyright (C) 1993 Hamish Macdonald
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*/
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/rtc.h>
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#include <linux/slab.h>
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enum {
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RP5C01_1_SECOND = 0x0, /* MODE 00 */
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RP5C01_10_SECOND = 0x1, /* MODE 00 */
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RP5C01_1_MINUTE = 0x2, /* MODE 00 and MODE 01 */
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RP5C01_10_MINUTE = 0x3, /* MODE 00 and MODE 01 */
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RP5C01_1_HOUR = 0x4, /* MODE 00 and MODE 01 */
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RP5C01_10_HOUR = 0x5, /* MODE 00 and MODE 01 */
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RP5C01_DAY_OF_WEEK = 0x6, /* MODE 00 and MODE 01 */
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RP5C01_1_DAY = 0x7, /* MODE 00 and MODE 01 */
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RP5C01_10_DAY = 0x8, /* MODE 00 and MODE 01 */
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RP5C01_1_MONTH = 0x9, /* MODE 00 */
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RP5C01_10_MONTH = 0xa, /* MODE 00 */
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RP5C01_1_YEAR = 0xb, /* MODE 00 */
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RP5C01_10_YEAR = 0xc, /* MODE 00 */
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RP5C01_12_24_SELECT = 0xa, /* MODE 01 */
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RP5C01_LEAP_YEAR = 0xb, /* MODE 01 */
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RP5C01_MODE = 0xd, /* all modes */
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RP5C01_TEST = 0xe, /* all modes */
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RP5C01_RESET = 0xf, /* all modes */
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};
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#define RP5C01_12_24_SELECT_12 (0 << 0)
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#define RP5C01_12_24_SELECT_24 (1 << 0)
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#define RP5C01_10_HOUR_AM (0 << 1)
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#define RP5C01_10_HOUR_PM (1 << 1)
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#define RP5C01_MODE_TIMER_EN (1 << 3) /* timer enable */
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#define RP5C01_MODE_ALARM_EN (1 << 2) /* alarm enable */
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#define RP5C01_MODE_MODE_MASK (3 << 0)
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#define RP5C01_MODE_MODE00 (0 << 0) /* time */
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#define RP5C01_MODE_MODE01 (1 << 0) /* alarm, 12h/24h, leap year */
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#define RP5C01_MODE_RAM_BLOCK10 (2 << 0) /* RAM 4 bits x 13 */
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#define RP5C01_MODE_RAM_BLOCK11 (3 << 0) /* RAM 4 bits x 13 */
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#define RP5C01_RESET_1HZ_PULSE (1 << 3)
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#define RP5C01_RESET_16HZ_PULSE (1 << 2)
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#define RP5C01_RESET_SECOND (1 << 1) /* reset divider stages for */
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/* seconds or smaller units */
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#define RP5C01_RESET_ALARM (1 << 0) /* reset all alarm registers */
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struct rp5c01_priv {
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u32 __iomem *regs;
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struct rtc_device *rtc;
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spinlock_t lock; /* against concurrent RTC/NVRAM access */
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};
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static inline unsigned int rp5c01_read(struct rp5c01_priv *priv,
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unsigned int reg)
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{
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return __raw_readl(&priv->regs[reg]) & 0xf;
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}
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static inline void rp5c01_write(struct rp5c01_priv *priv, unsigned int val,
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unsigned int reg)
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{
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__raw_writel(val, &priv->regs[reg]);
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}
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static void rp5c01_lock(struct rp5c01_priv *priv)
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{
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rp5c01_write(priv, RP5C01_MODE_MODE00, RP5C01_MODE);
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}
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static void rp5c01_unlock(struct rp5c01_priv *priv)
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{
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rp5c01_write(priv, RP5C01_MODE_TIMER_EN | RP5C01_MODE_MODE01,
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RP5C01_MODE);
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}
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static int rp5c01_read_time(struct device *dev, struct rtc_time *tm)
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{
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struct rp5c01_priv *priv = dev_get_drvdata(dev);
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spin_lock_irq(&priv->lock);
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rp5c01_lock(priv);
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tm->tm_sec = rp5c01_read(priv, RP5C01_10_SECOND) * 10 +
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rp5c01_read(priv, RP5C01_1_SECOND);
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tm->tm_min = rp5c01_read(priv, RP5C01_10_MINUTE) * 10 +
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rp5c01_read(priv, RP5C01_1_MINUTE);
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tm->tm_hour = rp5c01_read(priv, RP5C01_10_HOUR) * 10 +
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rp5c01_read(priv, RP5C01_1_HOUR);
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tm->tm_mday = rp5c01_read(priv, RP5C01_10_DAY) * 10 +
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rp5c01_read(priv, RP5C01_1_DAY);
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tm->tm_wday = rp5c01_read(priv, RP5C01_DAY_OF_WEEK);
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tm->tm_mon = rp5c01_read(priv, RP5C01_10_MONTH) * 10 +
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rp5c01_read(priv, RP5C01_1_MONTH) - 1;
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tm->tm_year = rp5c01_read(priv, RP5C01_10_YEAR) * 10 +
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rp5c01_read(priv, RP5C01_1_YEAR);
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if (tm->tm_year <= 69)
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tm->tm_year += 100;
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rp5c01_unlock(priv);
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spin_unlock_irq(&priv->lock);
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return 0;
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}
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static int rp5c01_set_time(struct device *dev, struct rtc_time *tm)
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{
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struct rp5c01_priv *priv = dev_get_drvdata(dev);
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spin_lock_irq(&priv->lock);
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rp5c01_lock(priv);
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rp5c01_write(priv, tm->tm_sec / 10, RP5C01_10_SECOND);
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rp5c01_write(priv, tm->tm_sec % 10, RP5C01_1_SECOND);
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rp5c01_write(priv, tm->tm_min / 10, RP5C01_10_MINUTE);
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rp5c01_write(priv, tm->tm_min % 10, RP5C01_1_MINUTE);
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rp5c01_write(priv, tm->tm_hour / 10, RP5C01_10_HOUR);
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rp5c01_write(priv, tm->tm_hour % 10, RP5C01_1_HOUR);
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rp5c01_write(priv, tm->tm_mday / 10, RP5C01_10_DAY);
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rp5c01_write(priv, tm->tm_mday % 10, RP5C01_1_DAY);
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if (tm->tm_wday != -1)
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rp5c01_write(priv, tm->tm_wday, RP5C01_DAY_OF_WEEK);
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rp5c01_write(priv, (tm->tm_mon + 1) / 10, RP5C01_10_MONTH);
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rp5c01_write(priv, (tm->tm_mon + 1) % 10, RP5C01_1_MONTH);
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if (tm->tm_year >= 100)
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tm->tm_year -= 100;
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rp5c01_write(priv, tm->tm_year / 10, RP5C01_10_YEAR);
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rp5c01_write(priv, tm->tm_year % 10, RP5C01_1_YEAR);
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rp5c01_unlock(priv);
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spin_unlock_irq(&priv->lock);
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return 0;
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}
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static const struct rtc_class_ops rp5c01_rtc_ops = {
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.read_time = rp5c01_read_time,
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.set_time = rp5c01_set_time,
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};
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/*
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* The NVRAM is organized as 2 blocks of 13 nibbles of 4 bits.
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* We provide access to them like AmigaOS does: the high nibble of each 8-bit
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* byte is stored in BLOCK10, the low nibble in BLOCK11.
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*/
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static int rp5c01_nvram_read(void *_priv, unsigned int pos, void *val,
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size_t bytes)
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{
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struct rp5c01_priv *priv = _priv;
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u8 *buf = val;
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spin_lock_irq(&priv->lock);
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for (; bytes; bytes--) {
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u8 data;
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rp5c01_write(priv,
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RP5C01_MODE_TIMER_EN | RP5C01_MODE_RAM_BLOCK10,
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RP5C01_MODE);
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data = rp5c01_read(priv, pos) << 4;
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rp5c01_write(priv,
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RP5C01_MODE_TIMER_EN | RP5C01_MODE_RAM_BLOCK11,
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RP5C01_MODE);
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data |= rp5c01_read(priv, pos++);
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rp5c01_write(priv, RP5C01_MODE_TIMER_EN | RP5C01_MODE_MODE01,
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RP5C01_MODE);
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*buf++ = data;
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}
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spin_unlock_irq(&priv->lock);
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return 0;
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}
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static int rp5c01_nvram_write(void *_priv, unsigned int pos, void *val,
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size_t bytes)
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{
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struct rp5c01_priv *priv = _priv;
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u8 *buf = val;
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spin_lock_irq(&priv->lock);
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for (; bytes; bytes--) {
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u8 data = *buf++;
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rp5c01_write(priv,
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RP5C01_MODE_TIMER_EN | RP5C01_MODE_RAM_BLOCK10,
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RP5C01_MODE);
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rp5c01_write(priv, data >> 4, pos);
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rp5c01_write(priv,
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RP5C01_MODE_TIMER_EN | RP5C01_MODE_RAM_BLOCK11,
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RP5C01_MODE);
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rp5c01_write(priv, data & 0xf, pos++);
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rp5c01_write(priv, RP5C01_MODE_TIMER_EN | RP5C01_MODE_MODE01,
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RP5C01_MODE);
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}
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spin_unlock_irq(&priv->lock);
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return 0;
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}
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static int __init rp5c01_rtc_probe(struct platform_device *dev)
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{
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struct resource *res;
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struct rp5c01_priv *priv;
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struct rtc_device *rtc;
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int error;
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struct nvmem_config nvmem_cfg = {
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.name = "rp5c01_nvram",
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.word_size = 1,
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.stride = 1,
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.size = RP5C01_MODE,
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.reg_read = rp5c01_nvram_read,
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.reg_write = rp5c01_nvram_write,
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};
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res = platform_get_resource(dev, IORESOURCE_MEM, 0);
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if (!res)
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return -ENODEV;
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priv = devm_kzalloc(&dev->dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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priv->regs = devm_ioremap(&dev->dev, res->start, resource_size(res));
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if (!priv->regs)
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return -ENOMEM;
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spin_lock_init(&priv->lock);
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platform_set_drvdata(dev, priv);
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rtc = devm_rtc_allocate_device(&dev->dev);
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if (IS_ERR(rtc))
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return PTR_ERR(rtc);
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rtc->ops = &rp5c01_rtc_ops;
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rtc->nvram_old_abi = true;
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priv->rtc = rtc;
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nvmem_cfg.priv = priv;
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error = rtc_nvmem_register(rtc, &nvmem_cfg);
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if (error)
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return error;
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return rtc_register_device(rtc);
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}
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static struct platform_driver rp5c01_rtc_driver = {
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.driver = {
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.name = "rtc-rp5c01",
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},
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};
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module_platform_driver_probe(rp5c01_rtc_driver, rp5c01_rtc_probe);
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MODULE_AUTHOR("Geert Uytterhoeven <geert@linux-m68k.org>");
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MODULE_LICENSE("GPL");
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MODULE_DESCRIPTION("Ricoh RP5C01 RTC driver");
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MODULE_ALIAS("platform:rtc-rp5c01");
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