181 lines
3.8 KiB
C
181 lines
3.8 KiB
C
/*
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* Copyright (c) 2013 Samsung Electronics Co., Ltd
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* http://www.samsung.com
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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*/
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#ifndef __LINUX_MFD_S2MPA01_H
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#define __LINUX_MFD_S2MPA01_H
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/* S2MPA01 registers */
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enum s2mpa01_reg {
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S2MPA01_REG_ID,
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S2MPA01_REG_INT1,
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S2MPA01_REG_INT2,
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S2MPA01_REG_INT3,
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S2MPA01_REG_INT1M,
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S2MPA01_REG_INT2M,
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S2MPA01_REG_INT3M,
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S2MPA01_REG_ST1,
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S2MPA01_REG_ST2,
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S2MPA01_REG_PWRONSRC,
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S2MPA01_REG_OFFSRC,
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S2MPA01_REG_RTC_BUF,
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S2MPA01_REG_CTRL1,
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S2MPA01_REG_ETC_TEST,
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S2MPA01_REG_RSVD1,
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S2MPA01_REG_BU_CHG,
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S2MPA01_REG_RAMP1,
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S2MPA01_REG_RAMP2,
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S2MPA01_REG_LDO_DSCH1,
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S2MPA01_REG_LDO_DSCH2,
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S2MPA01_REG_LDO_DSCH3,
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S2MPA01_REG_LDO_DSCH4,
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S2MPA01_REG_OTP_ADRL,
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S2MPA01_REG_OTP_ADRH,
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S2MPA01_REG_OTP_DATA,
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S2MPA01_REG_MON1SEL,
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S2MPA01_REG_MON2SEL,
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S2MPA01_REG_LEE,
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S2MPA01_REG_RSVD2,
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S2MPA01_REG_RSVD3,
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S2MPA01_REG_RSVD4,
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S2MPA01_REG_RSVD5,
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S2MPA01_REG_RSVD6,
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S2MPA01_REG_TOP_RSVD,
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S2MPA01_REG_DVS_SEL,
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S2MPA01_REG_DVS_PTR,
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S2MPA01_REG_DVS_DATA,
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S2MPA01_REG_RSVD_NO,
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S2MPA01_REG_UVLO,
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S2MPA01_REG_LEE_NO,
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S2MPA01_REG_B1CTRL1,
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S2MPA01_REG_B1CTRL2,
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S2MPA01_REG_B2CTRL1,
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S2MPA01_REG_B2CTRL2,
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S2MPA01_REG_B3CTRL1,
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S2MPA01_REG_B3CTRL2,
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S2MPA01_REG_B4CTRL1,
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S2MPA01_REG_B4CTRL2,
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S2MPA01_REG_B5CTRL1,
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S2MPA01_REG_B5CTRL2,
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S2MPA01_REG_B5CTRL3,
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S2MPA01_REG_B5CTRL4,
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S2MPA01_REG_B5CTRL5,
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S2MPA01_REG_B5CTRL6,
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S2MPA01_REG_B6CTRL1,
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S2MPA01_REG_B6CTRL2,
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S2MPA01_REG_B7CTRL1,
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S2MPA01_REG_B7CTRL2,
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S2MPA01_REG_B8CTRL1,
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S2MPA01_REG_B8CTRL2,
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S2MPA01_REG_B9CTRL1,
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S2MPA01_REG_B9CTRL2,
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S2MPA01_REG_B10CTRL1,
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S2MPA01_REG_B10CTRL2,
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S2MPA01_REG_L1CTRL,
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S2MPA01_REG_L2CTRL,
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S2MPA01_REG_L3CTRL,
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S2MPA01_REG_L4CTRL,
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S2MPA01_REG_L5CTRL,
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S2MPA01_REG_L6CTRL,
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S2MPA01_REG_L7CTRL,
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S2MPA01_REG_L8CTRL,
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S2MPA01_REG_L9CTRL,
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S2MPA01_REG_L10CTRL,
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S2MPA01_REG_L11CTRL,
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S2MPA01_REG_L12CTRL,
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S2MPA01_REG_L13CTRL,
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S2MPA01_REG_L14CTRL,
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S2MPA01_REG_L15CTRL,
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S2MPA01_REG_L16CTRL,
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S2MPA01_REG_L17CTRL,
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S2MPA01_REG_L18CTRL,
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S2MPA01_REG_L19CTRL,
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S2MPA01_REG_L20CTRL,
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S2MPA01_REG_L21CTRL,
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S2MPA01_REG_L22CTRL,
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S2MPA01_REG_L23CTRL,
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S2MPA01_REG_L24CTRL,
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S2MPA01_REG_L25CTRL,
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S2MPA01_REG_L26CTRL,
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S2MPA01_REG_LDO_OVCB1,
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S2MPA01_REG_LDO_OVCB2,
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S2MPA01_REG_LDO_OVCB3,
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S2MPA01_REG_LDO_OVCB4,
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};
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/* S2MPA01 regulator ids */
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enum s2mpa01_regulators {
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S2MPA01_LDO1,
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S2MPA01_LDO2,
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S2MPA01_LDO3,
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S2MPA01_LDO4,
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S2MPA01_LDO5,
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S2MPA01_LDO6,
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S2MPA01_LDO7,
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S2MPA01_LDO8,
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S2MPA01_LDO9,
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S2MPA01_LDO10,
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S2MPA01_LDO11,
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S2MPA01_LDO12,
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S2MPA01_LDO13,
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S2MPA01_LDO14,
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S2MPA01_LDO15,
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S2MPA01_LDO16,
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S2MPA01_LDO17,
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S2MPA01_LDO18,
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S2MPA01_LDO19,
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S2MPA01_LDO20,
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S2MPA01_LDO21,
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S2MPA01_LDO22,
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S2MPA01_LDO23,
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S2MPA01_LDO24,
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S2MPA01_LDO25,
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S2MPA01_LDO26,
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S2MPA01_BUCK1,
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S2MPA01_BUCK2,
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S2MPA01_BUCK3,
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S2MPA01_BUCK4,
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S2MPA01_BUCK5,
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S2MPA01_BUCK6,
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S2MPA01_BUCK7,
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S2MPA01_BUCK8,
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S2MPA01_BUCK9,
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S2MPA01_BUCK10,
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S2MPA01_REGULATOR_MAX,
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};
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#define S2MPA01_LDO_VSEL_MASK 0x3F
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#define S2MPA01_BUCK_VSEL_MASK 0xFF
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#define S2MPA01_ENABLE_MASK (0x03 << S2MPA01_ENABLE_SHIFT)
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#define S2MPA01_ENABLE_SHIFT 0x06
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#define S2MPA01_LDO_N_VOLTAGES (S2MPA01_LDO_VSEL_MASK + 1)
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#define S2MPA01_BUCK_N_VOLTAGES (S2MPA01_BUCK_VSEL_MASK + 1)
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#define S2MPA01_RAMP_DELAY 12500 /* uV/us */
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#define S2MPA01_BUCK16_RAMP_SHIFT 4
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#define S2MPA01_BUCK24_RAMP_SHIFT 6
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#define S2MPA01_BUCK3_RAMP_SHIFT 4
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#define S2MPA01_BUCK5_RAMP_SHIFT 6
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#define S2MPA01_BUCK7_RAMP_SHIFT 2
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#define S2MPA01_BUCK8910_RAMP_SHIFT 0
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#define S2MPA01_BUCK1_RAMP_EN_SHIFT 3
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#define S2MPA01_BUCK2_RAMP_EN_SHIFT 2
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#define S2MPA01_BUCK3_RAMP_EN_SHIFT 1
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#define S2MPA01_BUCK4_RAMP_EN_SHIFT 0
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#define S2MPA01_PMIC_EN_SHIFT 6
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#endif /*__LINUX_MFD_S2MPA01_H */
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