122 lines
2.7 KiB
C
122 lines
2.7 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2017 HiSilicon Technologies Co., Ltd.
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*
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* Simple HiSilicon phase clock implementation.
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*/
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include "clk.h"
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struct clk_hisi_phase {
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struct clk_hw hw;
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void __iomem *reg;
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u32 *phase_degrees;
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u32 *phase_regvals;
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u8 phase_num;
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u32 mask;
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u8 shift;
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u8 flags;
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spinlock_t *lock;
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};
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#define to_clk_hisi_phase(_hw) container_of(_hw, struct clk_hisi_phase, hw)
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static int hisi_phase_regval_to_degrees(struct clk_hisi_phase *phase,
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u32 regval)
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{
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int i;
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for (i = 0; i < phase->phase_num; i++)
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if (phase->phase_regvals[i] == regval)
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return phase->phase_degrees[i];
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return -EINVAL;
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}
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static int hisi_clk_get_phase(struct clk_hw *hw)
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{
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struct clk_hisi_phase *phase = to_clk_hisi_phase(hw);
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u32 regval;
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regval = readl(phase->reg);
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regval = (regval & phase->mask) >> phase->shift;
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return hisi_phase_regval_to_degrees(phase, regval);
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}
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static int hisi_phase_degrees_to_regval(struct clk_hisi_phase *phase,
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int degrees)
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{
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int i;
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for (i = 0; i < phase->phase_num; i++)
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if (phase->phase_degrees[i] == degrees)
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return phase->phase_regvals[i];
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return -EINVAL;
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}
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static int hisi_clk_set_phase(struct clk_hw *hw, int degrees)
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{
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struct clk_hisi_phase *phase = to_clk_hisi_phase(hw);
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unsigned long flags = 0;
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int regval;
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u32 val;
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regval = hisi_phase_degrees_to_regval(phase, degrees);
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if (regval < 0)
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return regval;
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spin_lock_irqsave(phase->lock, flags);
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val = clk_readl(phase->reg);
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val &= ~phase->mask;
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val |= regval << phase->shift;
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clk_writel(val, phase->reg);
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spin_unlock_irqrestore(phase->lock, flags);
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return 0;
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}
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static const struct clk_ops clk_phase_ops = {
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.get_phase = hisi_clk_get_phase,
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.set_phase = hisi_clk_set_phase,
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};
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struct clk *clk_register_hisi_phase(struct device *dev,
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const struct hisi_phase_clock *clks,
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void __iomem *base, spinlock_t *lock)
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{
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struct clk_hisi_phase *phase;
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struct clk_init_data init;
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phase = devm_kzalloc(dev, sizeof(struct clk_hisi_phase), GFP_KERNEL);
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if (!phase)
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return ERR_PTR(-ENOMEM);
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init.name = clks->name;
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init.ops = &clk_phase_ops;
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init.flags = clks->flags | CLK_IS_BASIC;
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init.parent_names = clks->parent_names ? &clks->parent_names : NULL;
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init.num_parents = clks->parent_names ? 1 : 0;
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phase->reg = base + clks->offset;
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phase->shift = clks->shift;
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phase->mask = (BIT(clks->width) - 1) << clks->shift;
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phase->lock = lock;
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phase->phase_degrees = clks->phase_degrees;
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phase->phase_regvals = clks->phase_regvals;
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phase->phase_num = clks->phase_num;
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phase->hw.init = &init;
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return devm_clk_register(dev, &phase->hw);
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}
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EXPORT_SYMBOL_GPL(clk_register_hisi_phase);
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