115 lines
5.0 KiB
Plaintext
115 lines
5.0 KiB
Plaintext
Broadcom Starfighter 2 Ethernet switch driver
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=============================================
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Broadcom's Starfighter 2 Ethernet switch hardware block is commonly found and
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deployed in the following products:
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- xDSL gateways such as BCM63138
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- streaming/multimedia Set Top Box such as BCM7445
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- Cable Modem/residential gateways such as BCM7145/BCM3390
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The switch is typically deployed in a configuration involving between 5 to 13
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ports, offering a range of built-in and customizable interfaces:
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- single integrated Gigabit PHY
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- quad integrated Gigabit PHY
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- quad external Gigabit PHY w/ MDIO multiplexer
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- integrated MoCA PHY
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- several external MII/RevMII/GMII/RGMII interfaces
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The switch also supports specific congestion control features which allow MoCA
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fail-over not to lose packets during a MoCA role re-election, as well as out of
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band back-pressure to the host CPU network interface when downstream interfaces
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are connected at a lower speed.
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The switch hardware block is typically interfaced using MMIO accesses and
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contains a bunch of sub-blocks/registers:
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* SWITCH_CORE: common switch registers
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* SWITCH_REG: external interfaces switch register
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* SWITCH_MDIO: external MDIO bus controller (there is another one in SWITCH_CORE,
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which is used for indirect PHY accesses)
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* SWITCH_INDIR_RW: 64-bits wide register helper block
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* SWITCH_INTRL2_0/1: Level-2 interrupt controllers
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* SWITCH_ACB: Admission control block
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* SWITCH_FCB: Fail-over control block
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Implementation details
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======================
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The driver is located in drivers/net/dsa/bcm_sf2.c and is implemented as a DSA
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driver; see Documentation/networking/dsa/dsa.txt for details on the subsystem
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and what it provides.
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The SF2 switch is configured to enable a Broadcom specific 4-bytes switch tag
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which gets inserted by the switch for every packet forwarded to the CPU
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interface, conversely, the CPU network interface should insert a similar tag for
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packets entering the CPU port. The tag format is described in
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net/dsa/tag_brcm.c.
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Overall, the SF2 driver is a fairly regular DSA driver; there are a few
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specifics covered below.
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Device Tree probing
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-------------------
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The DSA platform device driver is probed using a specific compatible string
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provided in net/dsa/dsa.c. The reason for that is because the DSA subsystem gets
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registered as a platform device driver currently. DSA will provide the needed
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device_node pointers which are then accessible by the switch driver setup
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function to setup resources such as register ranges and interrupts. This
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currently works very well because none of the of_* functions utilized by the
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driver require a struct device to be bound to a struct device_node, but things
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may change in the future.
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MDIO indirect accesses
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----------------------
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Due to a limitation in how Broadcom switches have been designed, external
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Broadcom switches connected to a SF2 require the use of the DSA slave MDIO bus
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in order to properly configure them. By default, the SF2 pseudo-PHY address, and
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an external switch pseudo-PHY address will both be snooping for incoming MDIO
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transactions, since they are at the same address (30), resulting in some kind of
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"double" programming. Using DSA, and setting ds->phys_mii_mask accordingly, we
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selectively divert reads and writes towards external Broadcom switches
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pseudo-PHY addresses. Newer revisions of the SF2 hardware have introduced a
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configurable pseudo-PHY address which circumvents the initial design limitation.
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Multimedia over CoAxial (MoCA) interfaces
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-----------------------------------------
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MoCA interfaces are fairly specific and require the use of a firmware blob which
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gets loaded onto the MoCA processor(s) for packet processing. The switch
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hardware contains logic which will assert/de-assert link states accordingly for
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the MoCA interface whenever the MoCA coaxial cable gets disconnected or the
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firmware gets reloaded. The SF2 driver relies on such events to properly set its
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MoCA interface carrier state and properly report this to the networking stack.
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The MoCA interfaces are supported using the PHY library's fixed PHY/emulated PHY
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device and the switch driver registers a fixed_link_update callback for such
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PHYs which reflects the link state obtained from the interrupt handler.
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Power Management
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----------------
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Whenever possible, the SF2 driver tries to minimize the overall switch power
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consumption by applying a combination of:
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- turning off internal buffers/memories
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- disabling packet processing logic
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- putting integrated PHYs in IDDQ/low-power
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- reducing the switch core clock based on the active port count
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- enabling and advertising EEE
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- turning off RGMII data processing logic when the link goes down
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Wake-on-LAN
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-----------
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Wake-on-LAN is currently implemented by utilizing the host processor Ethernet
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MAC controller wake-on logic. Whenever Wake-on-LAN is requested, an intersection
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between the user request and the supported host Ethernet interface WoL
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capabilities is done and the intersection result gets configured. During
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system-wide suspend/resume, only ports not participating in Wake-on-LAN are
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disabled.
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