79 lines
2.1 KiB
C
79 lines
2.1 KiB
C
/***************************************************************************/
|
|
|
|
/*
|
|
* m5307.c -- platform support for ColdFire 5307 based boards
|
|
*
|
|
* Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
|
|
* Copyright (C) 2000, Lineo (www.lineo.com)
|
|
*/
|
|
|
|
/***************************************************************************/
|
|
|
|
#include <linux/kernel.h>
|
|
#include <linux/param.h>
|
|
#include <linux/init.h>
|
|
#include <linux/io.h>
|
|
#include <asm/machdep.h>
|
|
#include <asm/coldfire.h>
|
|
#include <asm/mcfsim.h>
|
|
#include <asm/mcfwdebug.h>
|
|
#include <asm/mcfclk.h>
|
|
|
|
/***************************************************************************/
|
|
|
|
/*
|
|
* Some platforms need software versions of the GPIO data registers.
|
|
*/
|
|
unsigned short ppdata;
|
|
unsigned char ledbank = 0xff;
|
|
|
|
/***************************************************************************/
|
|
|
|
DEFINE_CLK(pll, "pll.0", MCF_CLK);
|
|
DEFINE_CLK(sys, "sys.0", MCF_BUSCLK);
|
|
DEFINE_CLK(mcftmr0, "mcftmr.0", MCF_BUSCLK);
|
|
DEFINE_CLK(mcftmr1, "mcftmr.1", MCF_BUSCLK);
|
|
DEFINE_CLK(mcfuart0, "mcfuart.0", MCF_BUSCLK);
|
|
DEFINE_CLK(mcfuart1, "mcfuart.1", MCF_BUSCLK);
|
|
|
|
struct clk *mcf_clks[] = {
|
|
&clk_pll,
|
|
&clk_sys,
|
|
&clk_mcftmr0,
|
|
&clk_mcftmr1,
|
|
&clk_mcfuart0,
|
|
&clk_mcfuart1,
|
|
NULL
|
|
};
|
|
|
|
/***************************************************************************/
|
|
|
|
void __init config_BSP(char *commandp, int size)
|
|
{
|
|
#if defined(CONFIG_NETtel) || \
|
|
defined(CONFIG_SECUREEDGEMP3) || defined(CONFIG_CLEOPATRA)
|
|
/* Copy command line from FLASH to local buffer... */
|
|
memcpy(commandp, (char *) 0xf0004000, size);
|
|
commandp[size-1] = 0;
|
|
#endif
|
|
|
|
mach_sched_init = hw_timer_init;
|
|
|
|
/* Only support the external interrupts on their primary level */
|
|
mcf_mapirq2imr(25, MCFINTC_EINT1);
|
|
mcf_mapirq2imr(27, MCFINTC_EINT3);
|
|
mcf_mapirq2imr(29, MCFINTC_EINT5);
|
|
mcf_mapirq2imr(31, MCFINTC_EINT7);
|
|
|
|
#ifdef CONFIG_BDM_DISABLE
|
|
/*
|
|
* Disable the BDM clocking. This also turns off most of the rest of
|
|
* the BDM device. This is good for EMC reasons. This option is not
|
|
* incompatible with the memory protection option.
|
|
*/
|
|
wdebug(MCFDEBUG_CSR, MCFDEBUG_CSR_PSTCLK);
|
|
#endif
|
|
}
|
|
|
|
/***************************************************************************/
|