360 lines
8.9 KiB
C
360 lines
8.9 KiB
C
/*
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* Machine check handler
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*
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* Copyright IBM Corp. 2000, 2009
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* Author(s): Ingo Adlung <adlung@de.ibm.com>,
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* Martin Schwidefsky <schwidefsky@de.ibm.com>,
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* Cornelia Huck <cornelia.huck@de.ibm.com>,
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* Heiko Carstens <heiko.carstens@de.ibm.com>,
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*/
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#include <linux/kernel_stat.h>
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/hardirq.h>
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#include <linux/time.h>
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#include <linux/module.h>
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#include <asm/lowcore.h>
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#include <asm/smp.h>
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#include <asm/stp.h>
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#include <asm/cputime.h>
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#include <asm/nmi.h>
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#include <asm/crw.h>
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#include <asm/switch_to.h>
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#include <asm/ctl_reg.h>
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struct mcck_struct {
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unsigned int kill_task : 1;
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unsigned int channel_report : 1;
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unsigned int warning : 1;
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unsigned int stp_queue : 1;
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unsigned long mcck_code;
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};
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static DEFINE_PER_CPU(struct mcck_struct, cpu_mcck);
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static void s390_handle_damage(void)
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{
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smp_send_stop();
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disabled_wait((unsigned long) __builtin_return_address(0));
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while (1);
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}
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/*
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* Main machine check handler function. Will be called with interrupts enabled
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* or disabled and machine checks enabled or disabled.
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*/
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void s390_handle_mcck(void)
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{
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unsigned long flags;
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struct mcck_struct mcck;
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/*
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* Disable machine checks and get the current state of accumulated
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* machine checks. Afterwards delete the old state and enable machine
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* checks again.
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*/
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local_irq_save(flags);
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local_mcck_disable();
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mcck = *this_cpu_ptr(&cpu_mcck);
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memset(this_cpu_ptr(&cpu_mcck), 0, sizeof(mcck));
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clear_cpu_flag(CIF_MCCK_PENDING);
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local_mcck_enable();
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local_irq_restore(flags);
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if (mcck.channel_report)
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crw_handle_channel_report();
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/*
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* A warning may remain for a prolonged period on the bare iron.
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* (actually until the machine is powered off, or the problem is gone)
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* So we just stop listening for the WARNING MCH and avoid continuously
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* being interrupted. One caveat is however, that we must do this per
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* processor and cannot use the smp version of ctl_clear_bit().
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* On VM we only get one interrupt per virtally presented machinecheck.
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* Though one suffices, we may get one interrupt per (virtual) cpu.
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*/
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if (mcck.warning) { /* WARNING pending ? */
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static int mchchk_wng_posted = 0;
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/* Use single cpu clear, as we cannot handle smp here. */
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__ctl_clear_bit(14, 24); /* Disable WARNING MCH */
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if (xchg(&mchchk_wng_posted, 1) == 0)
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kill_cad_pid(SIGPWR, 1);
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}
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if (mcck.stp_queue)
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stp_queue_work();
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if (mcck.kill_task) {
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local_irq_enable();
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printk(KERN_EMERG "mcck: Terminating task because of machine "
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"malfunction (code 0x%016lx).\n", mcck.mcck_code);
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printk(KERN_EMERG "mcck: task: %s, pid: %d.\n",
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current->comm, current->pid);
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do_exit(SIGSEGV);
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}
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}
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EXPORT_SYMBOL_GPL(s390_handle_mcck);
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/*
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* returns 0 if all registers could be validated
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* returns 1 otherwise
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*/
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static int notrace s390_validate_registers(union mci mci)
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{
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int kill_task;
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u64 zero;
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void *fpt_save_area, *fpt_creg_save_area;
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kill_task = 0;
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zero = 0;
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if (!mci.gr) {
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/*
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* General purpose registers couldn't be restored and have
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* unknown contents. Process needs to be terminated.
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*/
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kill_task = 1;
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}
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if (!mci.fp) {
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/*
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* Floating point registers can't be restored and
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* therefore the process needs to be terminated.
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*/
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kill_task = 1;
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}
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fpt_save_area = &S390_lowcore.floating_pt_save_area;
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fpt_creg_save_area = &S390_lowcore.fpt_creg_save_area;
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if (!mci.fc) {
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/*
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* Floating point control register can't be restored.
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* Task will be terminated.
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*/
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asm volatile("lfpc 0(%0)" : : "a" (&zero), "m" (zero));
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kill_task = 1;
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} else
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asm volatile("lfpc 0(%0)" : : "a" (fpt_creg_save_area));
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if (!MACHINE_HAS_VX) {
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/* Validate floating point registers */
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asm volatile(
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" ld 0,0(%0)\n"
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" ld 1,8(%0)\n"
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" ld 2,16(%0)\n"
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" ld 3,24(%0)\n"
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" ld 4,32(%0)\n"
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" ld 5,40(%0)\n"
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" ld 6,48(%0)\n"
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" ld 7,56(%0)\n"
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" ld 8,64(%0)\n"
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" ld 9,72(%0)\n"
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" ld 10,80(%0)\n"
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" ld 11,88(%0)\n"
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" ld 12,96(%0)\n"
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" ld 13,104(%0)\n"
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" ld 14,112(%0)\n"
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" ld 15,120(%0)\n"
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: : "a" (fpt_save_area));
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} else {
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/* Validate vector registers */
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union ctlreg0 cr0;
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if (!mci.vr) {
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/*
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* Vector registers can't be restored and therefore
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* the process needs to be terminated.
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*/
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kill_task = 1;
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}
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cr0.val = S390_lowcore.cregs_save_area[0];
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cr0.afp = cr0.vx = 1;
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__ctl_load(cr0.val, 0, 0);
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asm volatile(
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" la 1,%0\n"
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" .word 0xe70f,0x1000,0x0036\n" /* vlm 0,15,0(1) */
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" .word 0xe70f,0x1100,0x0c36\n" /* vlm 16,31,256(1) */
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: : "Q" (*(struct vx_array *)
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&S390_lowcore.vector_save_area) : "1");
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__ctl_load(S390_lowcore.cregs_save_area[0], 0, 0);
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}
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/* Validate access registers */
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asm volatile(
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" lam 0,15,0(%0)"
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: : "a" (&S390_lowcore.access_regs_save_area));
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if (!mci.ar) {
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/*
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* Access registers have unknown contents.
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* Terminating task.
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*/
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kill_task = 1;
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}
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/* Validate control registers */
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if (!mci.cr) {
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/*
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* Control registers have unknown contents.
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* Can't recover and therefore stopping machine.
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*/
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s390_handle_damage();
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} else {
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asm volatile(
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" lctlg 0,15,0(%0)"
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: : "a" (&S390_lowcore.cregs_save_area));
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}
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/*
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* We don't even try to validate the TOD register, since we simply
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* can't write something sensible into that register.
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*/
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/*
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* See if we can validate the TOD programmable register with its
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* old contents (should be zero) otherwise set it to zero.
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*/
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if (!mci.pr)
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asm volatile(
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" sr 0,0\n"
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" sckpf"
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: : : "0", "cc");
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else
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asm volatile(
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" l 0,0(%0)\n"
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" sckpf"
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: : "a" (&S390_lowcore.tod_progreg_save_area)
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: "0", "cc");
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/* Validate clock comparator register */
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set_clock_comparator(S390_lowcore.clock_comparator);
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/* Check if old PSW is valid */
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if (!mci.wp)
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/*
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* Can't tell if we come from user or kernel mode
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* -> stopping machine.
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*/
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s390_handle_damage();
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if (!mci.ms || !mci.pm || !mci.ia)
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kill_task = 1;
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return kill_task;
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}
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#define MAX_IPD_COUNT 29
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#define MAX_IPD_TIME (5 * 60 * USEC_PER_SEC) /* 5 minutes */
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#define ED_STP_ISLAND 6 /* External damage STP island check */
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#define ED_STP_SYNC 7 /* External damage STP sync check */
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/*
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* machine check handler.
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*/
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void notrace s390_do_machine_check(struct pt_regs *regs)
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{
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static int ipd_count;
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static DEFINE_SPINLOCK(ipd_lock);
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static unsigned long long last_ipd;
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struct mcck_struct *mcck;
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unsigned long long tmp;
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union mci mci;
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int umode;
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nmi_enter();
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inc_irq_stat(NMI_NMI);
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mci.val = S390_lowcore.mcck_interruption_code;
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mcck = this_cpu_ptr(&cpu_mcck);
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umode = user_mode(regs);
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if (mci.sd) {
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/* System damage -> stopping machine */
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s390_handle_damage();
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}
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if (mci.pd) {
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if (mci.b) {
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/* Processing backup -> verify if we can survive this */
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u64 z_mcic, o_mcic, t_mcic;
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z_mcic = (1ULL<<63 | 1ULL<<59 | 1ULL<<29);
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o_mcic = (1ULL<<43 | 1ULL<<42 | 1ULL<<41 | 1ULL<<40 |
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1ULL<<36 | 1ULL<<35 | 1ULL<<34 | 1ULL<<32 |
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1ULL<<30 | 1ULL<<21 | 1ULL<<20 | 1ULL<<17 |
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1ULL<<16);
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t_mcic = mci.val;
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if (((t_mcic & z_mcic) != 0) ||
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((t_mcic & o_mcic) != o_mcic)) {
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s390_handle_damage();
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}
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/*
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* Nullifying exigent condition, therefore we might
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* retry this instruction.
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*/
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spin_lock(&ipd_lock);
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tmp = get_tod_clock();
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if (((tmp - last_ipd) >> 12) < MAX_IPD_TIME)
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ipd_count++;
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else
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ipd_count = 1;
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last_ipd = tmp;
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if (ipd_count == MAX_IPD_COUNT)
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s390_handle_damage();
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spin_unlock(&ipd_lock);
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} else {
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/* Processing damage -> stopping machine */
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s390_handle_damage();
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}
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}
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if (s390_validate_registers(mci)) {
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if (umode) {
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/*
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* Couldn't restore all register contents while in
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* user mode -> mark task for termination.
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*/
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mcck->kill_task = 1;
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mcck->mcck_code = mci.val;
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set_cpu_flag(CIF_MCCK_PENDING);
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} else {
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/*
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* Couldn't restore all register contents while in
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* kernel mode -> stopping machine.
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*/
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s390_handle_damage();
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}
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}
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if (mci.cd) {
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/* Timing facility damage */
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s390_handle_damage();
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}
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if (mci.ed && mci.ec) {
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/* External damage */
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if (S390_lowcore.external_damage_code & (1U << ED_STP_SYNC))
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mcck->stp_queue |= stp_sync_check();
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if (S390_lowcore.external_damage_code & (1U << ED_STP_ISLAND))
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mcck->stp_queue |= stp_island_check();
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if (mcck->stp_queue)
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set_cpu_flag(CIF_MCCK_PENDING);
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}
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if (mci.se)
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/* Storage error uncorrected */
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s390_handle_damage();
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if (mci.ke)
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/* Storage key-error uncorrected */
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s390_handle_damage();
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if (mci.ds && mci.fa)
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/* Storage degradation */
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s390_handle_damage();
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if (mci.cp) {
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/* Channel report word pending */
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mcck->channel_report = 1;
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set_cpu_flag(CIF_MCCK_PENDING);
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}
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if (mci.w) {
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/* Warning pending */
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mcck->warning = 1;
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set_cpu_flag(CIF_MCCK_PENDING);
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}
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nmi_exit();
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}
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static int __init machine_check_init(void)
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{
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ctl_set_bit(14, 25); /* enable external damage MCH */
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ctl_set_bit(14, 27); /* enable system recovery MCH */
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ctl_set_bit(14, 24); /* enable warning MCH */
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return 0;
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}
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early_initcall(machine_check_init);
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