340 lines
9.4 KiB
C
340 lines
9.4 KiB
C
/*
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* Copyright (C) 2002,2003 Intrinsyc Software
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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* History:
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* 31-Jul-2002 : Initial version [FB]
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* 29-Jan-2003 : added PXA255 support [FB]
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* 20-Apr-2003 : ported to v2.5 (Dustin McIntire, Sensoria Corp.)
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*
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* Note:
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* This driver may change the memory bus clock rate, but will not do any
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* platform specific access timing changes... for example if you have flash
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* memory connected to CS0, you will need to register a platform specific
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* notifier which will adjust the memory access strobes to maintain a
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* minimum strobe width.
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*
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/sched.h>
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#include <linux/init.h>
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#include <linux/cpufreq.h>
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#include <linux/err.h>
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#include <linux/regulator/consumer.h>
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#include <linux/io.h>
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#include <mach/pxa2xx-regs.h>
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#include <mach/smemc.h>
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#ifdef DEBUG
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static unsigned int freq_debug;
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module_param(freq_debug, uint, 0);
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MODULE_PARM_DESC(freq_debug, "Set the debug messages to on=1/off=0");
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#else
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#define freq_debug 0
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#endif
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static struct regulator *vcc_core;
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static unsigned int pxa27x_maxfreq;
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module_param(pxa27x_maxfreq, uint, 0);
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MODULE_PARM_DESC(pxa27x_maxfreq, "Set the pxa27x maxfreq in MHz"
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"(typically 624=>pxa270, 416=>pxa271, 520=>pxa272)");
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struct pxa_cpufreq_data {
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struct clk *clk_core;
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};
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static struct pxa_cpufreq_data pxa_cpufreq_data;
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struct pxa_freqs {
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unsigned int khz;
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int vmin;
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int vmax;
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};
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/*
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* PXA255 definitions
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*/
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static const struct pxa_freqs pxa255_run_freqs[] =
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{
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/* CPU MEMBUS run turbo PXbus SDRAM */
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{ 99500, -1, -1}, /* 99, 99, 50, 50 */
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{132700, -1, -1}, /* 133, 133, 66, 66 */
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{199100, -1, -1}, /* 199, 199, 99, 99 */
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{265400, -1, -1}, /* 265, 265, 133, 66 */
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{331800, -1, -1}, /* 331, 331, 166, 83 */
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{398100, -1, -1}, /* 398, 398, 196, 99 */
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};
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/* Use the turbo mode frequencies for the CPUFREQ_POLICY_POWERSAVE policy */
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static const struct pxa_freqs pxa255_turbo_freqs[] =
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{
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/* CPU run turbo PXbus SDRAM */
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{ 99500, -1, -1}, /* 99, 99, 50, 50 */
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{199100, -1, -1}, /* 99, 199, 50, 99 */
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{298500, -1, -1}, /* 99, 287, 50, 99 */
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{298600, -1, -1}, /* 199, 287, 99, 99 */
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{398100, -1, -1}, /* 199, 398, 99, 99 */
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};
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#define NUM_PXA25x_RUN_FREQS ARRAY_SIZE(pxa255_run_freqs)
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#define NUM_PXA25x_TURBO_FREQS ARRAY_SIZE(pxa255_turbo_freqs)
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static struct cpufreq_frequency_table
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pxa255_run_freq_table[NUM_PXA25x_RUN_FREQS+1];
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static struct cpufreq_frequency_table
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pxa255_turbo_freq_table[NUM_PXA25x_TURBO_FREQS+1];
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static unsigned int pxa255_turbo_table;
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module_param(pxa255_turbo_table, uint, 0);
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MODULE_PARM_DESC(pxa255_turbo_table, "Selects the frequency table (0 = run table, !0 = turbo table)");
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static struct pxa_freqs pxa27x_freqs[] = {
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{104000, 900000, 1705000 },
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{156000, 1000000, 1705000 },
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{208000, 1180000, 1705000 },
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{312000, 1250000, 1705000 },
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{416000, 1350000, 1705000 },
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{520000, 1450000, 1705000 },
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{624000, 1550000, 1705000 }
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};
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#define NUM_PXA27x_FREQS ARRAY_SIZE(pxa27x_freqs)
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static struct cpufreq_frequency_table
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pxa27x_freq_table[NUM_PXA27x_FREQS+1];
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extern unsigned get_clk_frequency_khz(int info);
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#ifdef CONFIG_REGULATOR
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static int pxa_cpufreq_change_voltage(const struct pxa_freqs *pxa_freq)
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{
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int ret = 0;
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int vmin, vmax;
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if (!cpu_is_pxa27x())
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return 0;
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vmin = pxa_freq->vmin;
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vmax = pxa_freq->vmax;
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if ((vmin == -1) || (vmax == -1))
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return 0;
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ret = regulator_set_voltage(vcc_core, vmin, vmax);
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if (ret)
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pr_err("Failed to set vcc_core in [%dmV..%dmV]\n", vmin, vmax);
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return ret;
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}
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static void __init pxa_cpufreq_init_voltages(void)
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{
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vcc_core = regulator_get(NULL, "vcc_core");
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if (IS_ERR(vcc_core)) {
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pr_info("Didn't find vcc_core regulator\n");
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vcc_core = NULL;
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} else {
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pr_info("Found vcc_core regulator\n");
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}
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}
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#else
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static int pxa_cpufreq_change_voltage(const struct pxa_freqs *pxa_freq)
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{
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return 0;
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}
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static void __init pxa_cpufreq_init_voltages(void) { }
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#endif
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static void find_freq_tables(struct cpufreq_frequency_table **freq_table,
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const struct pxa_freqs **pxa_freqs)
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{
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if (cpu_is_pxa25x()) {
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if (!pxa255_turbo_table) {
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*pxa_freqs = pxa255_run_freqs;
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*freq_table = pxa255_run_freq_table;
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} else {
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*pxa_freqs = pxa255_turbo_freqs;
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*freq_table = pxa255_turbo_freq_table;
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}
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} else if (cpu_is_pxa27x()) {
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*pxa_freqs = pxa27x_freqs;
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*freq_table = pxa27x_freq_table;
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} else {
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BUG();
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}
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}
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static void pxa27x_guess_max_freq(void)
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{
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if (!pxa27x_maxfreq) {
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pxa27x_maxfreq = 416000;
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pr_info("PXA CPU 27x max frequency not defined (pxa27x_maxfreq), assuming pxa271 with %dkHz maxfreq\n",
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pxa27x_maxfreq);
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} else {
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pxa27x_maxfreq *= 1000;
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}
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}
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static unsigned int pxa_cpufreq_get(unsigned int cpu)
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{
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struct pxa_cpufreq_data *data = cpufreq_get_driver_data();
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return (unsigned int) clk_get_rate(data->clk_core) / 1000;
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}
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static int pxa_set_target(struct cpufreq_policy *policy, unsigned int idx)
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{
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struct cpufreq_frequency_table *pxa_freqs_table;
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const struct pxa_freqs *pxa_freq_settings;
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struct pxa_cpufreq_data *data = cpufreq_get_driver_data();
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unsigned int new_freq_cpu;
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int ret = 0;
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/* Get the current policy */
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find_freq_tables(&pxa_freqs_table, &pxa_freq_settings);
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new_freq_cpu = pxa_freq_settings[idx].khz;
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if (freq_debug)
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pr_debug("Changing CPU frequency from %d Mhz to %d Mhz\n",
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policy->cur / 1000, new_freq_cpu / 1000);
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if (vcc_core && new_freq_cpu > policy->cur) {
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ret = pxa_cpufreq_change_voltage(&pxa_freq_settings[idx]);
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if (ret)
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return ret;
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}
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clk_set_rate(data->clk_core, new_freq_cpu * 1000);
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/*
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* Even if voltage setting fails, we don't report it, as the frequency
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* change succeeded. The voltage reduction is not a critical failure,
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* only power savings will suffer from this.
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*
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* Note: if the voltage change fails, and a return value is returned, a
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* bug is triggered (seems a deadlock). Should anybody find out where,
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* the "return 0" should become a "return ret".
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*/
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if (vcc_core && new_freq_cpu < policy->cur)
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ret = pxa_cpufreq_change_voltage(&pxa_freq_settings[idx]);
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return 0;
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}
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static int pxa_cpufreq_init(struct cpufreq_policy *policy)
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{
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int i;
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unsigned int freq;
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struct cpufreq_frequency_table *pxa255_freq_table;
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const struct pxa_freqs *pxa255_freqs;
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/* try to guess pxa27x cpu */
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if (cpu_is_pxa27x())
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pxa27x_guess_max_freq();
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pxa_cpufreq_init_voltages();
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/* set default policy and cpuinfo */
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policy->cpuinfo.transition_latency = 1000; /* FIXME: 1 ms, assumed */
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/* Generate pxa25x the run cpufreq_frequency_table struct */
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for (i = 0; i < NUM_PXA25x_RUN_FREQS; i++) {
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pxa255_run_freq_table[i].frequency = pxa255_run_freqs[i].khz;
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pxa255_run_freq_table[i].driver_data = i;
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}
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pxa255_run_freq_table[i].frequency = CPUFREQ_TABLE_END;
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/* Generate pxa25x the turbo cpufreq_frequency_table struct */
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for (i = 0; i < NUM_PXA25x_TURBO_FREQS; i++) {
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pxa255_turbo_freq_table[i].frequency =
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pxa255_turbo_freqs[i].khz;
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pxa255_turbo_freq_table[i].driver_data = i;
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}
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pxa255_turbo_freq_table[i].frequency = CPUFREQ_TABLE_END;
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pxa255_turbo_table = !!pxa255_turbo_table;
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/* Generate the pxa27x cpufreq_frequency_table struct */
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for (i = 0; i < NUM_PXA27x_FREQS; i++) {
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freq = pxa27x_freqs[i].khz;
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if (freq > pxa27x_maxfreq)
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break;
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pxa27x_freq_table[i].frequency = freq;
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pxa27x_freq_table[i].driver_data = i;
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}
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pxa27x_freq_table[i].driver_data = i;
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pxa27x_freq_table[i].frequency = CPUFREQ_TABLE_END;
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/*
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* Set the policy's minimum and maximum frequencies from the tables
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* just constructed. This sets cpuinfo.mxx_freq, min and max.
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*/
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if (cpu_is_pxa25x()) {
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find_freq_tables(&pxa255_freq_table, &pxa255_freqs);
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pr_info("using %s frequency table\n",
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pxa255_turbo_table ? "turbo" : "run");
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policy->freq_table = pxa255_freq_table;
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}
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else if (cpu_is_pxa27x()) {
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policy->freq_table = pxa27x_freq_table;
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}
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pr_info("frequency change support initialized\n");
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return 0;
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}
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static struct cpufreq_driver pxa_cpufreq_driver = {
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.flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK,
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.verify = cpufreq_generic_frequency_table_verify,
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.target_index = pxa_set_target,
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.init = pxa_cpufreq_init,
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.get = pxa_cpufreq_get,
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.name = "PXA2xx",
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.driver_data = &pxa_cpufreq_data,
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};
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static int __init pxa_cpu_init(void)
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{
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int ret = -ENODEV;
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pxa_cpufreq_data.clk_core = clk_get_sys(NULL, "core");
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if (IS_ERR(pxa_cpufreq_data.clk_core))
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return PTR_ERR(pxa_cpufreq_data.clk_core);
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if (cpu_is_pxa25x() || cpu_is_pxa27x())
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ret = cpufreq_register_driver(&pxa_cpufreq_driver);
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return ret;
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}
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static void __exit pxa_cpu_exit(void)
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{
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cpufreq_unregister_driver(&pxa_cpufreq_driver);
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}
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MODULE_AUTHOR("Intrinsyc Software Inc.");
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MODULE_DESCRIPTION("CPU frequency changing driver for the PXA architecture");
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MODULE_LICENSE("GPL");
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module_init(pxa_cpu_init);
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module_exit(pxa_cpu_exit);
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