612 lines
16 KiB
C
612 lines
16 KiB
C
/*
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* Renesas R0P7757LC0012RL Support.
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*
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* Copyright (C) 2009 - 2010 Renesas Solutions Corp.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/gpio.h>
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#include <linux/irq.h>
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#include <linux/regulator/fixed.h>
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#include <linux/regulator/machine.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/flash.h>
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#include <linux/io.h>
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#include <linux/mfd/tmio.h>
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#include <linux/mmc/host.h>
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#include <linux/mmc/sh_mmcif.h>
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#include <linux/sh_eth.h>
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#include <linux/sh_intc.h>
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#include <linux/usb/renesas_usbhs.h>
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#include <cpu/sh7757.h>
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#include <asm/heartbeat.h>
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static struct resource heartbeat_resource = {
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.start = 0xffec005c, /* PUDR */
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.end = 0xffec005c,
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.flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
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};
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static unsigned char heartbeat_bit_pos[] = { 0, 1, 2, 3 };
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static struct heartbeat_data heartbeat_data = {
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.bit_pos = heartbeat_bit_pos,
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.nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
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.flags = HEARTBEAT_INVERTED,
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};
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static struct platform_device heartbeat_device = {
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.name = "heartbeat",
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.id = -1,
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.dev = {
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.platform_data = &heartbeat_data,
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},
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.num_resources = 1,
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.resource = &heartbeat_resource,
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};
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/* Fast Ethernet */
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#define GBECONT 0xffc10100
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#define GBECONT_RMII1 BIT(17)
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#define GBECONT_RMII0 BIT(16)
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static void sh7757_eth_set_mdio_gate(void *addr)
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{
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if (((unsigned long)addr & 0x00000fff) < 0x0800)
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writel(readl(GBECONT) | GBECONT_RMII0, GBECONT);
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else
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writel(readl(GBECONT) | GBECONT_RMII1, GBECONT);
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}
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static struct resource sh_eth0_resources[] = {
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{
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.start = 0xfef00000,
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.end = 0xfef001ff,
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.flags = IORESOURCE_MEM,
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}, {
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.start = evt2irq(0xc80),
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.end = evt2irq(0xc80),
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct sh_eth_plat_data sh7757_eth0_pdata = {
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.phy = 1,
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.edmac_endian = EDMAC_LITTLE_ENDIAN,
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.set_mdio_gate = sh7757_eth_set_mdio_gate,
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};
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static struct platform_device sh7757_eth0_device = {
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.name = "sh7757-ether",
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.resource = sh_eth0_resources,
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.id = 0,
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.num_resources = ARRAY_SIZE(sh_eth0_resources),
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.dev = {
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.platform_data = &sh7757_eth0_pdata,
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},
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};
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static struct resource sh_eth1_resources[] = {
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{
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.start = 0xfef00800,
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.end = 0xfef009ff,
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.flags = IORESOURCE_MEM,
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}, {
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.start = evt2irq(0xc80),
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.end = evt2irq(0xc80),
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct sh_eth_plat_data sh7757_eth1_pdata = {
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.phy = 1,
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.edmac_endian = EDMAC_LITTLE_ENDIAN,
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.set_mdio_gate = sh7757_eth_set_mdio_gate,
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};
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static struct platform_device sh7757_eth1_device = {
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.name = "sh7757-ether",
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.resource = sh_eth1_resources,
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.id = 1,
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.num_resources = ARRAY_SIZE(sh_eth1_resources),
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.dev = {
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.platform_data = &sh7757_eth1_pdata,
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},
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};
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static void sh7757_eth_giga_set_mdio_gate(void *addr)
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{
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if (((unsigned long)addr & 0x00000fff) < 0x0800) {
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gpio_set_value(GPIO_PTT4, 1);
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writel(readl(GBECONT) & ~GBECONT_RMII0, GBECONT);
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} else {
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gpio_set_value(GPIO_PTT4, 0);
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writel(readl(GBECONT) & ~GBECONT_RMII1, GBECONT);
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}
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}
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static struct resource sh_eth_giga0_resources[] = {
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{
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.start = 0xfee00000,
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.end = 0xfee007ff,
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.flags = IORESOURCE_MEM,
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}, {
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/* TSU */
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.start = 0xfee01800,
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.end = 0xfee01fff,
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.flags = IORESOURCE_MEM,
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}, {
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.start = evt2irq(0x2960),
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.end = evt2irq(0x2960),
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct sh_eth_plat_data sh7757_eth_giga0_pdata = {
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.phy = 18,
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.edmac_endian = EDMAC_LITTLE_ENDIAN,
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.set_mdio_gate = sh7757_eth_giga_set_mdio_gate,
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.phy_interface = PHY_INTERFACE_MODE_RGMII_ID,
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};
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static struct platform_device sh7757_eth_giga0_device = {
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.name = "sh7757-gether",
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.resource = sh_eth_giga0_resources,
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.id = 2,
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.num_resources = ARRAY_SIZE(sh_eth_giga0_resources),
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.dev = {
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.platform_data = &sh7757_eth_giga0_pdata,
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},
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};
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static struct resource sh_eth_giga1_resources[] = {
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{
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.start = 0xfee00800,
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.end = 0xfee00fff,
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.flags = IORESOURCE_MEM,
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}, {
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/* TSU */
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.start = 0xfee01800,
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.end = 0xfee01fff,
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.flags = IORESOURCE_MEM,
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}, {
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.start = evt2irq(0x2980),
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.end = evt2irq(0x2980),
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct sh_eth_plat_data sh7757_eth_giga1_pdata = {
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.phy = 19,
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.edmac_endian = EDMAC_LITTLE_ENDIAN,
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.set_mdio_gate = sh7757_eth_giga_set_mdio_gate,
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.phy_interface = PHY_INTERFACE_MODE_RGMII_ID,
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};
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static struct platform_device sh7757_eth_giga1_device = {
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.name = "sh7757-gether",
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.resource = sh_eth_giga1_resources,
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.id = 3,
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.num_resources = ARRAY_SIZE(sh_eth_giga1_resources),
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.dev = {
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.platform_data = &sh7757_eth_giga1_pdata,
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},
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};
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/* Fixed 3.3V regulator to be used by SDHI0, MMCIF */
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static struct regulator_consumer_supply fixed3v3_power_consumers[] =
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{
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REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
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REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
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REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"),
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REGULATOR_SUPPLY("vqmmc", "sh_mmcif.0"),
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};
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/* SH_MMCIF */
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static struct resource sh_mmcif_resources[] = {
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[0] = {
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.start = 0xffcb0000,
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.end = 0xffcb00ff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = evt2irq(0x1c60),
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.flags = IORESOURCE_IRQ,
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},
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[2] = {
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.start = evt2irq(0x1c80),
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct sh_mmcif_plat_data sh_mmcif_plat = {
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.sup_pclk = 0x0f,
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.caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA |
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MMC_CAP_NONREMOVABLE,
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.ocr = MMC_VDD_32_33 | MMC_VDD_33_34,
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.slave_id_tx = SHDMA_SLAVE_MMCIF_TX,
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.slave_id_rx = SHDMA_SLAVE_MMCIF_RX,
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};
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static struct platform_device sh_mmcif_device = {
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.name = "sh_mmcif",
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.id = 0,
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.dev = {
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.platform_data = &sh_mmcif_plat,
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},
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.num_resources = ARRAY_SIZE(sh_mmcif_resources),
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.resource = sh_mmcif_resources,
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};
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/* SDHI0 */
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static struct tmio_mmc_data sdhi_info = {
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.chan_priv_tx = (void *)SHDMA_SLAVE_SDHI_TX,
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.chan_priv_rx = (void *)SHDMA_SLAVE_SDHI_RX,
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.capabilities = MMC_CAP_SD_HIGHSPEED,
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};
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static struct resource sdhi_resources[] = {
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[0] = {
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.start = 0xffe50000,
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.end = 0xffe500ff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = evt2irq(0x480),
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device sdhi_device = {
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.name = "sh_mobile_sdhi",
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.num_resources = ARRAY_SIZE(sdhi_resources),
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.resource = sdhi_resources,
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.id = 0,
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.dev = {
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.platform_data = &sdhi_info,
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},
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};
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static int usbhs0_get_id(struct platform_device *pdev)
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{
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return USBHS_GADGET;
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}
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static struct renesas_usbhs_platform_info usb0_data = {
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.platform_callback = {
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.get_id = usbhs0_get_id,
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},
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.driver_param = {
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.buswait_bwait = 5,
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}
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};
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static struct resource usb0_resources[] = {
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[0] = {
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.start = 0xfe450000,
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.end = 0xfe4501ff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = evt2irq(0x840),
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.end = evt2irq(0x840),
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device usb0_device = {
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.name = "renesas_usbhs",
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.id = 0,
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.dev = {
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.platform_data = &usb0_data,
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},
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.num_resources = ARRAY_SIZE(usb0_resources),
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.resource = usb0_resources,
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};
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static struct platform_device *sh7757lcr_devices[] __initdata = {
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&heartbeat_device,
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&sh7757_eth0_device,
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&sh7757_eth1_device,
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&sh7757_eth_giga0_device,
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&sh7757_eth_giga1_device,
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&sh_mmcif_device,
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&sdhi_device,
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&usb0_device,
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};
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static struct flash_platform_data spi_flash_data = {
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.name = "m25p80",
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.type = "m25px64",
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};
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static struct spi_board_info spi_board_info[] = {
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{
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.modalias = "m25p80",
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.max_speed_hz = 25000000,
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.bus_num = 0,
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.chip_select = 1,
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.platform_data = &spi_flash_data,
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},
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};
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static int __init sh7757lcr_devices_setup(void)
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{
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regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers,
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ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
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/* RGMII (PTA) */
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gpio_request(GPIO_FN_ET0_MDC, NULL);
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gpio_request(GPIO_FN_ET0_MDIO, NULL);
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gpio_request(GPIO_FN_ET1_MDC, NULL);
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gpio_request(GPIO_FN_ET1_MDIO, NULL);
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/* ONFI (PTB, PTZ) */
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gpio_request(GPIO_FN_ON_NRE, NULL);
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gpio_request(GPIO_FN_ON_NWE, NULL);
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gpio_request(GPIO_FN_ON_NWP, NULL);
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gpio_request(GPIO_FN_ON_NCE0, NULL);
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gpio_request(GPIO_FN_ON_R_B0, NULL);
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gpio_request(GPIO_FN_ON_ALE, NULL);
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gpio_request(GPIO_FN_ON_CLE, NULL);
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gpio_request(GPIO_FN_ON_DQ7, NULL);
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gpio_request(GPIO_FN_ON_DQ6, NULL);
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gpio_request(GPIO_FN_ON_DQ5, NULL);
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gpio_request(GPIO_FN_ON_DQ4, NULL);
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gpio_request(GPIO_FN_ON_DQ3, NULL);
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gpio_request(GPIO_FN_ON_DQ2, NULL);
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gpio_request(GPIO_FN_ON_DQ1, NULL);
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gpio_request(GPIO_FN_ON_DQ0, NULL);
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/* IRQ8 to 0 (PTB, PTC) */
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gpio_request(GPIO_FN_IRQ8, NULL);
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gpio_request(GPIO_FN_IRQ7, NULL);
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gpio_request(GPIO_FN_IRQ6, NULL);
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gpio_request(GPIO_FN_IRQ5, NULL);
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gpio_request(GPIO_FN_IRQ4, NULL);
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gpio_request(GPIO_FN_IRQ3, NULL);
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gpio_request(GPIO_FN_IRQ2, NULL);
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gpio_request(GPIO_FN_IRQ1, NULL);
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gpio_request(GPIO_FN_IRQ0, NULL);
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/* SPI0 (PTD) */
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gpio_request(GPIO_FN_SP0_MOSI, NULL);
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gpio_request(GPIO_FN_SP0_MISO, NULL);
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gpio_request(GPIO_FN_SP0_SCK, NULL);
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gpio_request(GPIO_FN_SP0_SCK_FB, NULL);
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gpio_request(GPIO_FN_SP0_SS0, NULL);
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gpio_request(GPIO_FN_SP0_SS1, NULL);
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gpio_request(GPIO_FN_SP0_SS2, NULL);
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gpio_request(GPIO_FN_SP0_SS3, NULL);
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/* RMII 0/1 (PTE, PTF) */
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gpio_request(GPIO_FN_RMII0_CRS_DV, NULL);
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gpio_request(GPIO_FN_RMII0_TXD1, NULL);
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gpio_request(GPIO_FN_RMII0_TXD0, NULL);
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gpio_request(GPIO_FN_RMII0_TXEN, NULL);
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gpio_request(GPIO_FN_RMII0_REFCLK, NULL);
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gpio_request(GPIO_FN_RMII0_RXD1, NULL);
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gpio_request(GPIO_FN_RMII0_RXD0, NULL);
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gpio_request(GPIO_FN_RMII0_RX_ER, NULL);
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gpio_request(GPIO_FN_RMII1_CRS_DV, NULL);
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gpio_request(GPIO_FN_RMII1_TXD1, NULL);
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gpio_request(GPIO_FN_RMII1_TXD0, NULL);
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gpio_request(GPIO_FN_RMII1_TXEN, NULL);
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gpio_request(GPIO_FN_RMII1_REFCLK, NULL);
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gpio_request(GPIO_FN_RMII1_RXD1, NULL);
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gpio_request(GPIO_FN_RMII1_RXD0, NULL);
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gpio_request(GPIO_FN_RMII1_RX_ER, NULL);
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/* eMMC (PTG) */
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gpio_request(GPIO_FN_MMCCLK, NULL);
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gpio_request(GPIO_FN_MMCCMD, NULL);
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gpio_request(GPIO_FN_MMCDAT7, NULL);
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gpio_request(GPIO_FN_MMCDAT6, NULL);
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gpio_request(GPIO_FN_MMCDAT5, NULL);
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gpio_request(GPIO_FN_MMCDAT4, NULL);
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gpio_request(GPIO_FN_MMCDAT3, NULL);
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gpio_request(GPIO_FN_MMCDAT2, NULL);
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gpio_request(GPIO_FN_MMCDAT1, NULL);
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gpio_request(GPIO_FN_MMCDAT0, NULL);
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/* LPC (PTG, PTH, PTQ, PTU) */
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gpio_request(GPIO_FN_SERIRQ, NULL);
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gpio_request(GPIO_FN_LPCPD, NULL);
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gpio_request(GPIO_FN_LDRQ, NULL);
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gpio_request(GPIO_FN_WP, NULL);
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gpio_request(GPIO_FN_FMS0, NULL);
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gpio_request(GPIO_FN_LAD3, NULL);
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gpio_request(GPIO_FN_LAD2, NULL);
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gpio_request(GPIO_FN_LAD1, NULL);
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gpio_request(GPIO_FN_LAD0, NULL);
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gpio_request(GPIO_FN_LFRAME, NULL);
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gpio_request(GPIO_FN_LRESET, NULL);
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gpio_request(GPIO_FN_LCLK, NULL);
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gpio_request(GPIO_FN_LGPIO7, NULL);
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gpio_request(GPIO_FN_LGPIO6, NULL);
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gpio_request(GPIO_FN_LGPIO5, NULL);
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gpio_request(GPIO_FN_LGPIO4, NULL);
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/* SPI1 (PTH) */
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gpio_request(GPIO_FN_SP1_MOSI, NULL);
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gpio_request(GPIO_FN_SP1_MISO, NULL);
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gpio_request(GPIO_FN_SP1_SCK, NULL);
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gpio_request(GPIO_FN_SP1_SCK_FB, NULL);
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gpio_request(GPIO_FN_SP1_SS0, NULL);
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gpio_request(GPIO_FN_SP1_SS1, NULL);
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/* SDHI (PTI) */
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gpio_request(GPIO_FN_SD_WP, NULL);
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gpio_request(GPIO_FN_SD_CD, NULL);
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gpio_request(GPIO_FN_SD_CLK, NULL);
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gpio_request(GPIO_FN_SD_CMD, NULL);
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gpio_request(GPIO_FN_SD_D3, NULL);
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gpio_request(GPIO_FN_SD_D2, NULL);
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gpio_request(GPIO_FN_SD_D1, NULL);
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gpio_request(GPIO_FN_SD_D0, NULL);
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/* SCIF3/4 (PTJ, PTW) */
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gpio_request(GPIO_FN_RTS3, NULL);
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gpio_request(GPIO_FN_CTS3, NULL);
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gpio_request(GPIO_FN_TXD3, NULL);
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gpio_request(GPIO_FN_RXD3, NULL);
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gpio_request(GPIO_FN_RTS4, NULL);
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gpio_request(GPIO_FN_RXD4, NULL);
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gpio_request(GPIO_FN_TXD4, NULL);
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gpio_request(GPIO_FN_CTS4, NULL);
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/* SERMUX (PTK, PTL, PTO, PTV) */
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gpio_request(GPIO_FN_COM2_TXD, NULL);
|
|
gpio_request(GPIO_FN_COM2_RXD, NULL);
|
|
gpio_request(GPIO_FN_COM2_RTS, NULL);
|
|
gpio_request(GPIO_FN_COM2_CTS, NULL);
|
|
gpio_request(GPIO_FN_COM2_DTR, NULL);
|
|
gpio_request(GPIO_FN_COM2_DSR, NULL);
|
|
gpio_request(GPIO_FN_COM2_DCD, NULL);
|
|
gpio_request(GPIO_FN_COM2_RI, NULL);
|
|
gpio_request(GPIO_FN_RAC_RXD, NULL);
|
|
gpio_request(GPIO_FN_RAC_RTS, NULL);
|
|
gpio_request(GPIO_FN_RAC_CTS, NULL);
|
|
gpio_request(GPIO_FN_RAC_DTR, NULL);
|
|
gpio_request(GPIO_FN_RAC_DSR, NULL);
|
|
gpio_request(GPIO_FN_RAC_DCD, NULL);
|
|
gpio_request(GPIO_FN_RAC_TXD, NULL);
|
|
gpio_request(GPIO_FN_COM1_TXD, NULL);
|
|
gpio_request(GPIO_FN_COM1_RXD, NULL);
|
|
gpio_request(GPIO_FN_COM1_RTS, NULL);
|
|
gpio_request(GPIO_FN_COM1_CTS, NULL);
|
|
|
|
writeb(0x10, 0xfe470000); /* SMR0: SerMux mode 0 */
|
|
|
|
/* IIC (PTM, PTR, PTS) */
|
|
gpio_request(GPIO_FN_SDA7, NULL);
|
|
gpio_request(GPIO_FN_SCL7, NULL);
|
|
gpio_request(GPIO_FN_SDA6, NULL);
|
|
gpio_request(GPIO_FN_SCL6, NULL);
|
|
gpio_request(GPIO_FN_SDA5, NULL);
|
|
gpio_request(GPIO_FN_SCL5, NULL);
|
|
gpio_request(GPIO_FN_SDA4, NULL);
|
|
gpio_request(GPIO_FN_SCL4, NULL);
|
|
gpio_request(GPIO_FN_SDA3, NULL);
|
|
gpio_request(GPIO_FN_SCL3, NULL);
|
|
gpio_request(GPIO_FN_SDA2, NULL);
|
|
gpio_request(GPIO_FN_SCL2, NULL);
|
|
gpio_request(GPIO_FN_SDA1, NULL);
|
|
gpio_request(GPIO_FN_SCL1, NULL);
|
|
gpio_request(GPIO_FN_SDA0, NULL);
|
|
gpio_request(GPIO_FN_SCL0, NULL);
|
|
|
|
/* USB (PTN) */
|
|
gpio_request(GPIO_FN_VBUS_EN, NULL);
|
|
gpio_request(GPIO_FN_VBUS_OC, NULL);
|
|
|
|
/* SGPIO1/0 (PTN, PTO) */
|
|
gpio_request(GPIO_FN_SGPIO1_CLK, NULL);
|
|
gpio_request(GPIO_FN_SGPIO1_LOAD, NULL);
|
|
gpio_request(GPIO_FN_SGPIO1_DI, NULL);
|
|
gpio_request(GPIO_FN_SGPIO1_DO, NULL);
|
|
gpio_request(GPIO_FN_SGPIO0_CLK, NULL);
|
|
gpio_request(GPIO_FN_SGPIO0_LOAD, NULL);
|
|
gpio_request(GPIO_FN_SGPIO0_DI, NULL);
|
|
gpio_request(GPIO_FN_SGPIO0_DO, NULL);
|
|
|
|
/* WDT (PTN) */
|
|
gpio_request(GPIO_FN_SUB_CLKIN, NULL);
|
|
|
|
/* System (PTT) */
|
|
gpio_request(GPIO_FN_STATUS1, NULL);
|
|
gpio_request(GPIO_FN_STATUS0, NULL);
|
|
|
|
/* PWMX (PTT) */
|
|
gpio_request(GPIO_FN_PWMX1, NULL);
|
|
gpio_request(GPIO_FN_PWMX0, NULL);
|
|
|
|
/* R-SPI (PTV) */
|
|
gpio_request(GPIO_FN_R_SPI_MOSI, NULL);
|
|
gpio_request(GPIO_FN_R_SPI_MISO, NULL);
|
|
gpio_request(GPIO_FN_R_SPI_RSPCK, NULL);
|
|
gpio_request(GPIO_FN_R_SPI_SSL0, NULL);
|
|
gpio_request(GPIO_FN_R_SPI_SSL1, NULL);
|
|
|
|
/* EVC (PTV, PTW) */
|
|
gpio_request(GPIO_FN_EVENT7, NULL);
|
|
gpio_request(GPIO_FN_EVENT6, NULL);
|
|
gpio_request(GPIO_FN_EVENT5, NULL);
|
|
gpio_request(GPIO_FN_EVENT4, NULL);
|
|
gpio_request(GPIO_FN_EVENT3, NULL);
|
|
gpio_request(GPIO_FN_EVENT2, NULL);
|
|
gpio_request(GPIO_FN_EVENT1, NULL);
|
|
gpio_request(GPIO_FN_EVENT0, NULL);
|
|
|
|
/* LED for heartbeat */
|
|
gpio_request(GPIO_PTU3, NULL);
|
|
gpio_direction_output(GPIO_PTU3, 1);
|
|
gpio_request(GPIO_PTU2, NULL);
|
|
gpio_direction_output(GPIO_PTU2, 1);
|
|
gpio_request(GPIO_PTU1, NULL);
|
|
gpio_direction_output(GPIO_PTU1, 1);
|
|
gpio_request(GPIO_PTU0, NULL);
|
|
gpio_direction_output(GPIO_PTU0, 1);
|
|
|
|
/* control for MDIO of Gigabit Ethernet */
|
|
gpio_request(GPIO_PTT4, NULL);
|
|
gpio_direction_output(GPIO_PTT4, 1);
|
|
|
|
/* control for eMMC */
|
|
gpio_request(GPIO_PTT7, NULL); /* eMMC_RST# */
|
|
gpio_direction_output(GPIO_PTT7, 0);
|
|
gpio_request(GPIO_PTT6, NULL); /* eMMC_INDEX# */
|
|
gpio_direction_output(GPIO_PTT6, 0);
|
|
gpio_request(GPIO_PTT5, NULL); /* eMMC_PRST# */
|
|
gpio_direction_output(GPIO_PTT5, 1);
|
|
|
|
/* register SPI device information */
|
|
spi_register_board_info(spi_board_info,
|
|
ARRAY_SIZE(spi_board_info));
|
|
|
|
/* General platform */
|
|
return platform_add_devices(sh7757lcr_devices,
|
|
ARRAY_SIZE(sh7757lcr_devices));
|
|
}
|
|
arch_initcall(sh7757lcr_devices_setup);
|
|
|
|
/* Initialize IRQ setting */
|
|
void __init init_sh7757lcr_IRQ(void)
|
|
{
|
|
plat_irq_setup_pins(IRQ_MODE_IRQ7654);
|
|
plat_irq_setup_pins(IRQ_MODE_IRQ3210);
|
|
}
|
|
|
|
/* Initialize the board */
|
|
static void __init sh7757lcr_setup(char **cmdline_p)
|
|
{
|
|
printk(KERN_INFO "Renesas R0P7757LC0012RL support.\n");
|
|
}
|
|
|
|
static int sh7757lcr_mode_pins(void)
|
|
{
|
|
int value = 0;
|
|
|
|
/* These are the factory default settings of S3 (Low active).
|
|
* If you change these dip switches then you will need to
|
|
* adjust the values below as well.
|
|
*/
|
|
value |= MODE_PIN0; /* Clock Mode: 1 */
|
|
|
|
return value;
|
|
}
|
|
|
|
/* The Machine Vector */
|
|
static struct sh_machine_vector mv_sh7757lcr __initmv = {
|
|
.mv_name = "SH7757LCR",
|
|
.mv_setup = sh7757lcr_setup,
|
|
.mv_init_irq = init_sh7757lcr_IRQ,
|
|
.mv_mode_pins = sh7757lcr_mode_pins,
|
|
};
|
|
|