369 lines
5.8 KiB
ArmAsm
369 lines
5.8 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Blowfish Cipher Algorithm (x86_64)
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*
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* Copyright (C) 2011 Jussi Kivilinna <jussi.kivilinna@mbnet.fi>
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*/
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#include <linux/linkage.h>
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.file "blowfish-x86_64-asm.S"
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.text
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/* structure of crypto context */
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#define p 0
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#define s0 ((16 + 2) * 4)
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#define s1 ((16 + 2 + (1 * 256)) * 4)
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#define s2 ((16 + 2 + (2 * 256)) * 4)
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#define s3 ((16 + 2 + (3 * 256)) * 4)
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/* register macros */
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#define CTX %r12
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#define RIO %rsi
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#define RX0 %rax
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#define RX1 %rbx
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#define RX2 %rcx
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#define RX3 %rdx
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#define RX0d %eax
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#define RX1d %ebx
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#define RX2d %ecx
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#define RX3d %edx
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#define RX0bl %al
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#define RX1bl %bl
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#define RX2bl %cl
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#define RX3bl %dl
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#define RX0bh %ah
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#define RX1bh %bh
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#define RX2bh %ch
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#define RX3bh %dh
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#define RT0 %rdi
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#define RT1 %rsi
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#define RT2 %r8
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#define RT3 %r9
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#define RT0d %edi
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#define RT1d %esi
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#define RT2d %r8d
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#define RT3d %r9d
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#define RKEY %r10
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/***********************************************************************
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* 1-way blowfish
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***********************************************************************/
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#define F() \
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rorq $16, RX0; \
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movzbl RX0bh, RT0d; \
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movzbl RX0bl, RT1d; \
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rolq $16, RX0; \
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movl s0(CTX,RT0,4), RT0d; \
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addl s1(CTX,RT1,4), RT0d; \
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movzbl RX0bh, RT1d; \
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movzbl RX0bl, RT2d; \
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rolq $32, RX0; \
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xorl s2(CTX,RT1,4), RT0d; \
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addl s3(CTX,RT2,4), RT0d; \
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xorq RT0, RX0;
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#define add_roundkey_enc(n) \
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xorq p+4*(n)(CTX), RX0;
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#define round_enc(n) \
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add_roundkey_enc(n); \
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\
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F(); \
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F();
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#define add_roundkey_dec(n) \
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movq p+4*(n-1)(CTX), RT0; \
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rorq $32, RT0; \
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xorq RT0, RX0;
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#define round_dec(n) \
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add_roundkey_dec(n); \
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\
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F(); \
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F(); \
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#define read_block() \
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movq (RIO), RX0; \
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rorq $32, RX0; \
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bswapq RX0;
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#define write_block() \
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bswapq RX0; \
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movq RX0, (RIO);
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#define xor_block() \
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bswapq RX0; \
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xorq RX0, (RIO);
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ENTRY(__blowfish_enc_blk)
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/* input:
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* %rdi: ctx
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* %rsi: dst
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* %rdx: src
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* %rcx: bool, if true: xor output
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*/
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movq %r12, %r11;
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movq %rdi, CTX;
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movq %rsi, %r10;
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movq %rdx, RIO;
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read_block();
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round_enc(0);
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round_enc(2);
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round_enc(4);
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round_enc(6);
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round_enc(8);
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round_enc(10);
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round_enc(12);
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round_enc(14);
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add_roundkey_enc(16);
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movq %r11, %r12;
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movq %r10, RIO;
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test %cl, %cl;
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jnz .L__enc_xor;
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write_block();
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ret;
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.L__enc_xor:
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xor_block();
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ret;
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ENDPROC(__blowfish_enc_blk)
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ENTRY(blowfish_dec_blk)
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/* input:
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* %rdi: ctx
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* %rsi: dst
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* %rdx: src
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*/
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movq %r12, %r11;
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movq %rdi, CTX;
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movq %rsi, %r10;
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movq %rdx, RIO;
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read_block();
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round_dec(17);
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round_dec(15);
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round_dec(13);
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round_dec(11);
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round_dec(9);
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round_dec(7);
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round_dec(5);
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round_dec(3);
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add_roundkey_dec(1);
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movq %r10, RIO;
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write_block();
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movq %r11, %r12;
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ret;
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ENDPROC(blowfish_dec_blk)
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/**********************************************************************
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4-way blowfish, four blocks parallel
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**********************************************************************/
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/* F() for 4-way. Slower when used alone/1-way, but faster when used
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* parallel/4-way (tested on AMD Phenom II & Intel Xeon E7330).
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*/
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#define F4(x) \
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movzbl x ## bh, RT1d; \
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movzbl x ## bl, RT3d; \
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rorq $16, x; \
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movzbl x ## bh, RT0d; \
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movzbl x ## bl, RT2d; \
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rorq $16, x; \
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movl s0(CTX,RT0,4), RT0d; \
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addl s1(CTX,RT2,4), RT0d; \
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xorl s2(CTX,RT1,4), RT0d; \
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addl s3(CTX,RT3,4), RT0d; \
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xorq RT0, x;
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#define add_preloaded_roundkey4() \
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xorq RKEY, RX0; \
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xorq RKEY, RX1; \
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xorq RKEY, RX2; \
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xorq RKEY, RX3;
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#define preload_roundkey_enc(n) \
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movq p+4*(n)(CTX), RKEY;
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#define add_roundkey_enc4(n) \
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add_preloaded_roundkey4(); \
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preload_roundkey_enc(n + 2);
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#define round_enc4(n) \
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add_roundkey_enc4(n); \
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\
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F4(RX0); \
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F4(RX1); \
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F4(RX2); \
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F4(RX3); \
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\
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F4(RX0); \
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F4(RX1); \
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F4(RX2); \
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F4(RX3);
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#define preload_roundkey_dec(n) \
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movq p+4*((n)-1)(CTX), RKEY; \
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rorq $32, RKEY;
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#define add_roundkey_dec4(n) \
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add_preloaded_roundkey4(); \
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preload_roundkey_dec(n - 2);
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#define round_dec4(n) \
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add_roundkey_dec4(n); \
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\
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F4(RX0); \
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F4(RX1); \
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F4(RX2); \
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F4(RX3); \
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\
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F4(RX0); \
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F4(RX1); \
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F4(RX2); \
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F4(RX3);
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#define read_block4() \
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movq (RIO), RX0; \
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rorq $32, RX0; \
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bswapq RX0; \
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\
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movq 8(RIO), RX1; \
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rorq $32, RX1; \
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bswapq RX1; \
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\
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movq 16(RIO), RX2; \
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rorq $32, RX2; \
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bswapq RX2; \
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\
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movq 24(RIO), RX3; \
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rorq $32, RX3; \
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bswapq RX3;
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#define write_block4() \
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bswapq RX0; \
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movq RX0, (RIO); \
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\
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bswapq RX1; \
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movq RX1, 8(RIO); \
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\
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bswapq RX2; \
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movq RX2, 16(RIO); \
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\
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bswapq RX3; \
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movq RX3, 24(RIO);
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#define xor_block4() \
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bswapq RX0; \
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xorq RX0, (RIO); \
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\
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bswapq RX1; \
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xorq RX1, 8(RIO); \
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\
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bswapq RX2; \
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xorq RX2, 16(RIO); \
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\
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bswapq RX3; \
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xorq RX3, 24(RIO);
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ENTRY(__blowfish_enc_blk_4way)
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/* input:
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* %rdi: ctx
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* %rsi: dst
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* %rdx: src
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* %rcx: bool, if true: xor output
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*/
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pushq %r12;
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pushq %rbx;
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pushq %rcx;
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movq %rdi, CTX
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movq %rsi, %r11;
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movq %rdx, RIO;
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preload_roundkey_enc(0);
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read_block4();
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round_enc4(0);
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round_enc4(2);
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round_enc4(4);
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round_enc4(6);
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round_enc4(8);
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round_enc4(10);
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round_enc4(12);
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round_enc4(14);
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add_preloaded_roundkey4();
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popq %r12;
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movq %r11, RIO;
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test %r12b, %r12b;
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jnz .L__enc_xor4;
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write_block4();
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popq %rbx;
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popq %r12;
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ret;
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.L__enc_xor4:
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xor_block4();
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popq %rbx;
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popq %r12;
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ret;
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ENDPROC(__blowfish_enc_blk_4way)
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ENTRY(blowfish_dec_blk_4way)
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/* input:
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* %rdi: ctx
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* %rsi: dst
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* %rdx: src
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*/
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pushq %r12;
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pushq %rbx;
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movq %rdi, CTX;
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movq %rsi, %r11
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movq %rdx, RIO;
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preload_roundkey_dec(17);
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read_block4();
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round_dec4(17);
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round_dec4(15);
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round_dec4(13);
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round_dec4(11);
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round_dec4(9);
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round_dec4(7);
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round_dec4(5);
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round_dec4(3);
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add_preloaded_roundkey4();
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movq %r11, RIO;
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write_block4();
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popq %rbx;
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popq %r12;
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ret;
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ENDPROC(blowfish_dec_blk_4way)
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