285 lines
6.3 KiB
C
285 lines
6.3 KiB
C
/*
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*
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* BRIEF MODULE DESCRIPTION
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*
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* 2.6 port, Embedded Alley Solutions, Inc
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*
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* Based on:
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* Author: source@mvista.com
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*
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* This program is free software; you can distribute it and/or modify it
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* under the terms of the GNU General Public License (Version 2) as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
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*/
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#include <linux/types.h>
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#include <linux/pci.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/vmalloc.h>
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#include <linux/delay.h>
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#include <asm/mach-pnx8550/pci.h>
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#include <asm/mach-pnx8550/glb.h>
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#include <asm/debug.h>
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static inline void clear_status(void)
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{
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unsigned long pci_stat;
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pci_stat = inl(PCI_BASE | PCI_GPPM_STATUS);
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outl(pci_stat, PCI_BASE | PCI_GPPM_ICLR);
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}
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static inline unsigned int
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calc_cfg_addr(struct pci_bus *bus, unsigned int devfn, int where)
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{
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unsigned int addr;
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addr = ((bus->number > 0) ? (((bus->number & 0xff) << PCI_CFG_BUS_SHIFT) | 1) : 0);
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addr |= ((devfn & 0xff) << PCI_CFG_FUNC_SHIFT) | (where & 0xfc);
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return addr;
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}
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static int
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config_access(unsigned int pci_cmd, struct pci_bus *bus, unsigned int devfn, int where, unsigned int pci_mode, unsigned int *val)
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{
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unsigned int flags;
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unsigned long loops = 0;
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unsigned long ioaddr = calc_cfg_addr(bus, devfn, where);
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local_irq_save(flags);
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/*Clear pending interrupt status */
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if (inl(PCI_BASE | PCI_GPPM_STATUS)) {
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clear_status();
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while (!(inl(PCI_BASE | PCI_GPPM_STATUS) == 0)) ;
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}
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outl(ioaddr, PCI_BASE | PCI_GPPM_ADDR);
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if ((pci_cmd == PCI_CMD_IOW) || (pci_cmd == PCI_CMD_CONFIG_WRITE))
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outl(*val, PCI_BASE | PCI_GPPM_WDAT);
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outl(INIT_PCI_CYCLE | pci_cmd | (pci_mode & PCI_BYTE_ENABLE_MASK),
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PCI_BASE | PCI_GPPM_CTRL);
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loops =
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((loops_per_jiffy *
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PCI_IO_JIFFIES_TIMEOUT) >> (PCI_IO_JIFFIES_SHIFT));
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while (1) {
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if (inl(PCI_BASE | PCI_GPPM_STATUS) & GPPM_DONE) {
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if ((pci_cmd == PCI_CMD_IOR) ||
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(pci_cmd == PCI_CMD_CONFIG_READ))
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*val = inl(PCI_BASE | PCI_GPPM_RDAT);
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clear_status();
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local_irq_restore(flags);
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return PCIBIOS_SUCCESSFUL;
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} else if (inl(PCI_BASE | PCI_GPPM_STATUS) & GPPM_R_MABORT) {
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break;
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}
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loops--;
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if (loops == 0) {
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printk("%s : Arbiter Locked.\n", __FUNCTION__);
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}
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}
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clear_status();
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if ((pci_cmd == PCI_CMD_IOR) || (pci_cmd == PCI_CMD_IOW)) {
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printk("%s timeout (GPPM_CTRL=%X) ioaddr %lX pci_cmd %X\n",
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__FUNCTION__, inl(PCI_BASE | PCI_GPPM_CTRL), ioaddr,
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pci_cmd);
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}
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if ((pci_cmd == PCI_CMD_IOR) || (pci_cmd == PCI_CMD_CONFIG_READ))
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*val = 0xffffffff;
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local_irq_restore(flags);
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return PCIBIOS_DEVICE_NOT_FOUND;
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}
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/*
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* We can't address 8 and 16 bit words directly. Instead we have to
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* read/write a 32bit word and mask/modify the data we actually want.
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*/
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static int
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read_config_byte(struct pci_bus *bus, unsigned int devfn, int where, u8 * val)
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{
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unsigned int data = 0;
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int err;
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if (bus == NULL)
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return -1;
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err = config_access(PCI_CMD_CONFIG_READ, bus, devfn, where, ~(1 << (where & 3)), &data);
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switch (where & 0x03) {
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case 0:
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*val = (unsigned char)(data & 0x000000ff);
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break;
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case 1:
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*val = (unsigned char)((data & 0x0000ff00) >> 8);
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break;
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case 2:
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*val = (unsigned char)((data & 0x00ff0000) >> 16);
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break;
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case 3:
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*val = (unsigned char)((data & 0xff000000) >> 24);
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break;
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}
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return err;
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}
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static int
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read_config_word(struct pci_bus *bus, unsigned int devfn, int where, u16 * val)
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{
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unsigned int data = 0;
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int err;
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if (bus == NULL)
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return -1;
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if (where & 0x01)
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return PCIBIOS_BAD_REGISTER_NUMBER;
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err = config_access(PCI_CMD_CONFIG_READ, bus, devfn, where, ~(3 << (where & 3)), &data);
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switch (where & 0x02) {
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case 0:
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*val = (unsigned short)(data & 0x0000ffff);
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break;
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case 2:
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*val = (unsigned short)((data & 0xffff0000) >> 16);
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break;
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}
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return err;
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}
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static int
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read_config_dword(struct pci_bus *bus, unsigned int devfn, int where, u32 * val)
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{
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int err;
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if (bus == NULL)
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return -1;
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if (where & 0x03)
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return PCIBIOS_BAD_REGISTER_NUMBER;
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err = config_access(PCI_CMD_CONFIG_READ, bus, devfn, where, 0, val);
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return err;
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}
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static int
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write_config_byte(struct pci_bus *bus, unsigned int devfn, int where, u8 val)
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{
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unsigned int data = (unsigned int)val;
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int err;
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if (bus == NULL)
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return -1;
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switch (where & 0x03) {
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case 1:
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data = (data << 8);
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break;
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case 2:
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data = (data << 16);
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break;
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case 3:
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data = (data << 24);
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break;
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default:
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break;
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}
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err = config_access(PCI_CMD_CONFIG_WRITE, bus, devfn, where, ~(1 << (where & 3)), &data);
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return err;
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}
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static int
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write_config_word(struct pci_bus *bus, unsigned int devfn, int where, u16 val)
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{
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unsigned int data = (unsigned int)val;
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int err;
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if (bus == NULL)
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return -1;
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if (where & 0x01)
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return PCIBIOS_BAD_REGISTER_NUMBER;
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switch (where & 0x02) {
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case 2:
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data = (data << 16);
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break;
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default:
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break;
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}
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err = config_access(PCI_CMD_CONFIG_WRITE, bus, devfn, where, ~(3 << (where & 3)), &data);
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return err;
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}
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static int
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write_config_dword(struct pci_bus *bus, unsigned int devfn, int where, u32 val)
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{
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int err;
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if (bus == NULL)
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return -1;
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if (where & 0x03)
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return PCIBIOS_BAD_REGISTER_NUMBER;
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err = config_access(PCI_CMD_CONFIG_WRITE, bus, devfn, where, 0, &val);
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return err;
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}
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static int config_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 * val)
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{
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switch (size) {
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case 1: {
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u8 _val;
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int rc = read_config_byte(bus, devfn, where, &_val);
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*val = _val;
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return rc;
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}
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case 2: {
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u16 _val;
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int rc = read_config_word(bus, devfn, where, &_val);
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*val = _val;
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return rc;
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}
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default:
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return read_config_dword(bus, devfn, where, val);
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}
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}
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static int config_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val)
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{
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switch (size) {
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case 1:
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return write_config_byte(bus, devfn, where, (u8) val);
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case 2:
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return write_config_word(bus, devfn, where, (u16) val);
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default:
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return write_config_dword(bus, devfn, where, val);
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}
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}
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struct pci_ops pnx8550_pci_ops = {
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config_read,
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config_write
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};
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