linux_old1/Documentation/devicetree/bindings/mips
Antony Pavlov 5214cae77c MIPS: devicetree: fix cpu interrupt controller node-names
Here is the quote from [1]:

    The unit-address must match the first address specified
    in the reg property of the node. If the node has no reg property,
    the @ and unit-address must be omitted and the node-name alone
    differentiates the node from other nodes at the same level

This patch adjusts MIPS dts-files and devicetree binding
documentation in accordance with [1].

    [1] Power.org(tm) Standard for Embedded Power Architecture(tm)
        Platform Requirements (ePAPR). Version 1.1 – 08 April 2011.
        Chapter 2.2.1.1 Node Name Requirements

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/13345/
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-05-28 12:35:12 +02:00
..
brcm MIPS: BMIPS: Add support for BCM63268 2016-05-13 14:02:09 +02:00
cavium MIPS: OCTEON: Add support for OCTEON III interrupt controller. 2016-05-13 14:01:41 +02:00
img dt-bindings: MIPS: Document xilfpga bindings and boot style 2015-11-11 08:38:38 +01:00
pic32 dt/bindings: Add bindings for PIC32/MZDA platforms 2016-01-24 02:53:03 +01:00
ath79-soc.txt DEVICETREE: Add bindings for the SoC of the ATH79 family 2015-06-21 21:54:01 +02:00
cpu_irq.txt MIPS: devicetree: fix cpu interrupt controller node-names 2016-05-28 12:35:12 +02:00
ralink.txt DT: add documentation for the Ralink MIPS SoCs 2013-05-08 01:19:10 +02:00