476 lines
12 KiB
C
476 lines
12 KiB
C
/*
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* rtc-tps65910.c -- TPS65910 Real Time Clock interface
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*
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* Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved.
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* Author: Venu Byravarasu <vbyravarasu@nvidia.com>
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*
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* Based on original TI driver rtc-twl.c
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* Copyright (C) 2007 MontaVista Software, Inc
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* Author: Alexandre Rusev <source@mvista.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/rtc.h>
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#include <linux/bcd.h>
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#include <linux/math64.h>
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#include <linux/platform_device.h>
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#include <linux/interrupt.h>
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#include <linux/mfd/tps65910.h>
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struct tps65910_rtc {
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struct rtc_device *rtc;
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int irq;
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};
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/* Total number of RTC registers needed to set time*/
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#define NUM_TIME_REGS (TPS65910_YEARS - TPS65910_SECONDS + 1)
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/* Total number of RTC registers needed to set compensation registers */
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#define NUM_COMP_REGS (TPS65910_RTC_COMP_MSB - TPS65910_RTC_COMP_LSB + 1)
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/* Min and max values supported with 'offset' interface (swapped sign) */
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#define MIN_OFFSET (-277761)
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#define MAX_OFFSET (277778)
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/* Number of ticks per hour */
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#define TICKS_PER_HOUR (32768 * 3600)
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/* Multiplier for ppb conversions */
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#define PPB_MULT (1000000000LL)
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static int tps65910_rtc_alarm_irq_enable(struct device *dev,
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unsigned int enabled)
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{
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struct tps65910 *tps = dev_get_drvdata(dev->parent);
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u8 val = 0;
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if (enabled)
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val = TPS65910_RTC_INTERRUPTS_IT_ALARM;
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return regmap_write(tps->regmap, TPS65910_RTC_INTERRUPTS, val);
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}
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/*
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* Gets current tps65910 RTC time and date parameters.
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*
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* The RTC's time/alarm representation is not what gmtime(3) requires
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* Linux to use:
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*
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* - Months are 1..12 vs Linux 0-11
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* - Years are 0..99 vs Linux 1900..N (we assume 21st century)
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*/
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static int tps65910_rtc_read_time(struct device *dev, struct rtc_time *tm)
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{
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unsigned char rtc_data[NUM_TIME_REGS];
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struct tps65910 *tps = dev_get_drvdata(dev->parent);
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int ret;
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/* Copy RTC counting registers to static registers or latches */
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ret = regmap_update_bits(tps->regmap, TPS65910_RTC_CTRL,
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TPS65910_RTC_CTRL_GET_TIME, TPS65910_RTC_CTRL_GET_TIME);
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if (ret < 0) {
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dev_err(dev, "RTC CTRL reg update failed with err:%d\n", ret);
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return ret;
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}
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ret = regmap_bulk_read(tps->regmap, TPS65910_SECONDS, rtc_data,
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NUM_TIME_REGS);
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if (ret < 0) {
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dev_err(dev, "reading from RTC failed with err:%d\n", ret);
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return ret;
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}
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tm->tm_sec = bcd2bin(rtc_data[0]);
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tm->tm_min = bcd2bin(rtc_data[1]);
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tm->tm_hour = bcd2bin(rtc_data[2]);
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tm->tm_mday = bcd2bin(rtc_data[3]);
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tm->tm_mon = bcd2bin(rtc_data[4]) - 1;
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tm->tm_year = bcd2bin(rtc_data[5]) + 100;
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return ret;
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}
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static int tps65910_rtc_set_time(struct device *dev, struct rtc_time *tm)
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{
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unsigned char rtc_data[NUM_TIME_REGS];
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struct tps65910 *tps = dev_get_drvdata(dev->parent);
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int ret;
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rtc_data[0] = bin2bcd(tm->tm_sec);
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rtc_data[1] = bin2bcd(tm->tm_min);
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rtc_data[2] = bin2bcd(tm->tm_hour);
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rtc_data[3] = bin2bcd(tm->tm_mday);
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rtc_data[4] = bin2bcd(tm->tm_mon + 1);
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rtc_data[5] = bin2bcd(tm->tm_year - 100);
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/* Stop RTC while updating the RTC time registers */
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ret = regmap_update_bits(tps->regmap, TPS65910_RTC_CTRL,
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TPS65910_RTC_CTRL_STOP_RTC, 0);
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if (ret < 0) {
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dev_err(dev, "RTC stop failed with err:%d\n", ret);
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return ret;
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}
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/* update all the time registers in one shot */
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ret = regmap_bulk_write(tps->regmap, TPS65910_SECONDS, rtc_data,
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NUM_TIME_REGS);
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if (ret < 0) {
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dev_err(dev, "rtc_set_time error %d\n", ret);
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return ret;
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}
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/* Start back RTC */
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ret = regmap_update_bits(tps->regmap, TPS65910_RTC_CTRL,
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TPS65910_RTC_CTRL_STOP_RTC, 1);
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if (ret < 0)
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dev_err(dev, "RTC start failed with err:%d\n", ret);
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return ret;
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}
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/*
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* Gets current tps65910 RTC alarm time.
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*/
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static int tps65910_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
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{
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unsigned char alarm_data[NUM_TIME_REGS];
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u32 int_val;
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struct tps65910 *tps = dev_get_drvdata(dev->parent);
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int ret;
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ret = regmap_bulk_read(tps->regmap, TPS65910_SECONDS, alarm_data,
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NUM_TIME_REGS);
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if (ret < 0) {
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dev_err(dev, "rtc_read_alarm error %d\n", ret);
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return ret;
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}
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alm->time.tm_sec = bcd2bin(alarm_data[0]);
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alm->time.tm_min = bcd2bin(alarm_data[1]);
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alm->time.tm_hour = bcd2bin(alarm_data[2]);
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alm->time.tm_mday = bcd2bin(alarm_data[3]);
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alm->time.tm_mon = bcd2bin(alarm_data[4]) - 1;
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alm->time.tm_year = bcd2bin(alarm_data[5]) + 100;
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ret = regmap_read(tps->regmap, TPS65910_RTC_INTERRUPTS, &int_val);
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if (ret < 0)
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return ret;
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if (int_val & TPS65910_RTC_INTERRUPTS_IT_ALARM)
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alm->enabled = 1;
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return ret;
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}
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static int tps65910_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
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{
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unsigned char alarm_data[NUM_TIME_REGS];
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struct tps65910 *tps = dev_get_drvdata(dev->parent);
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int ret;
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ret = tps65910_rtc_alarm_irq_enable(dev, 0);
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if (ret)
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return ret;
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alarm_data[0] = bin2bcd(alm->time.tm_sec);
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alarm_data[1] = bin2bcd(alm->time.tm_min);
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alarm_data[2] = bin2bcd(alm->time.tm_hour);
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alarm_data[3] = bin2bcd(alm->time.tm_mday);
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alarm_data[4] = bin2bcd(alm->time.tm_mon + 1);
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alarm_data[5] = bin2bcd(alm->time.tm_year - 100);
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/* update all the alarm registers in one shot */
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ret = regmap_bulk_write(tps->regmap, TPS65910_ALARM_SECONDS,
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alarm_data, NUM_TIME_REGS);
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if (ret) {
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dev_err(dev, "rtc_set_alarm error %d\n", ret);
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return ret;
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}
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if (alm->enabled)
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ret = tps65910_rtc_alarm_irq_enable(dev, 1);
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return ret;
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}
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static int tps65910_rtc_set_calibration(struct device *dev, int calibration)
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{
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unsigned char comp_data[NUM_COMP_REGS];
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struct tps65910 *tps = dev_get_drvdata(dev->parent);
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s16 value;
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int ret;
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/*
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* TPS65910 uses two's complement 16 bit value for compensation for RTC
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* crystal inaccuracies. One time every hour when seconds counter
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* increments from 0 to 1 compensation value will be added to internal
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* RTC counter value.
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*
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* Compensation value 0x7FFF is prohibited value.
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*
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* Valid range for compensation value: [-32768 .. 32766]
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*/
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if ((calibration < -32768) || (calibration > 32766)) {
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dev_err(dev, "RTC calibration value out of range: %d\n",
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calibration);
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return -EINVAL;
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}
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value = (s16)calibration;
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comp_data[0] = (u16)value & 0xFF;
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comp_data[1] = ((u16)value >> 8) & 0xFF;
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/* Update all the compensation registers in one shot */
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ret = regmap_bulk_write(tps->regmap, TPS65910_RTC_COMP_LSB,
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comp_data, NUM_COMP_REGS);
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if (ret < 0) {
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dev_err(dev, "rtc_set_calibration error: %d\n", ret);
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return ret;
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}
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/* Enable automatic compensation */
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ret = regmap_update_bits(tps->regmap, TPS65910_RTC_CTRL,
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TPS65910_RTC_CTRL_AUTO_COMP, TPS65910_RTC_CTRL_AUTO_COMP);
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if (ret < 0)
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dev_err(dev, "auto_comp enable failed with error: %d\n", ret);
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return ret;
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}
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static int tps65910_rtc_get_calibration(struct device *dev, int *calibration)
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{
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unsigned char comp_data[NUM_COMP_REGS];
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struct tps65910 *tps = dev_get_drvdata(dev->parent);
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unsigned int ctrl;
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u16 value;
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int ret;
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ret = regmap_read(tps->regmap, TPS65910_RTC_CTRL, &ctrl);
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if (ret < 0)
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return ret;
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/* If automatic compensation is not enabled report back zero */
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if (!(ctrl & TPS65910_RTC_CTRL_AUTO_COMP)) {
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*calibration = 0;
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return 0;
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}
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ret = regmap_bulk_read(tps->regmap, TPS65910_RTC_COMP_LSB, comp_data,
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NUM_COMP_REGS);
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if (ret < 0) {
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dev_err(dev, "rtc_get_calibration error: %d\n", ret);
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return ret;
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}
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value = (u16)comp_data[0] | ((u16)comp_data[1] << 8);
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*calibration = (s16)value;
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return 0;
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}
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static int tps65910_read_offset(struct device *dev, long *offset)
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{
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int calibration;
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s64 tmp;
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int ret;
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ret = tps65910_rtc_get_calibration(dev, &calibration);
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if (ret < 0)
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return ret;
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/* Convert from RTC calibration register format to ppb format */
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tmp = calibration * (s64)PPB_MULT;
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if (tmp < 0)
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tmp -= TICKS_PER_HOUR / 2LL;
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else
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tmp += TICKS_PER_HOUR / 2LL;
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tmp = div_s64(tmp, TICKS_PER_HOUR);
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/* Offset value operates in negative way, so swap sign */
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*offset = (long)-tmp;
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return 0;
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}
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static int tps65910_set_offset(struct device *dev, long offset)
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{
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int calibration;
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s64 tmp;
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int ret;
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/* Make sure offset value is within supported range */
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if (offset < MIN_OFFSET || offset > MAX_OFFSET)
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return -ERANGE;
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/* Convert from ppb format to RTC calibration register format */
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tmp = offset * (s64)TICKS_PER_HOUR;
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if (tmp < 0)
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tmp -= PPB_MULT / 2LL;
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else
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tmp += PPB_MULT / 2LL;
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tmp = div_s64(tmp, PPB_MULT);
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/* Offset value operates in negative way, so swap sign */
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calibration = (int)-tmp;
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ret = tps65910_rtc_set_calibration(dev, calibration);
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return ret;
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}
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static irqreturn_t tps65910_rtc_interrupt(int irq, void *rtc)
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{
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struct device *dev = rtc;
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unsigned long events = 0;
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struct tps65910 *tps = dev_get_drvdata(dev->parent);
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struct tps65910_rtc *tps_rtc = dev_get_drvdata(dev);
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int ret;
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u32 rtc_reg;
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ret = regmap_read(tps->regmap, TPS65910_RTC_STATUS, &rtc_reg);
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if (ret)
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return IRQ_NONE;
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if (rtc_reg & TPS65910_RTC_STATUS_ALARM)
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events = RTC_IRQF | RTC_AF;
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ret = regmap_write(tps->regmap, TPS65910_RTC_STATUS, rtc_reg);
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if (ret)
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return IRQ_NONE;
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/* Notify RTC core on event */
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rtc_update_irq(tps_rtc->rtc, 1, events);
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return IRQ_HANDLED;
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}
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static const struct rtc_class_ops tps65910_rtc_ops = {
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.read_time = tps65910_rtc_read_time,
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.set_time = tps65910_rtc_set_time,
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.read_alarm = tps65910_rtc_read_alarm,
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.set_alarm = tps65910_rtc_set_alarm,
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.alarm_irq_enable = tps65910_rtc_alarm_irq_enable,
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.read_offset = tps65910_read_offset,
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.set_offset = tps65910_set_offset,
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};
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static int tps65910_rtc_probe(struct platform_device *pdev)
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{
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struct tps65910 *tps65910 = NULL;
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struct tps65910_rtc *tps_rtc = NULL;
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int ret;
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int irq;
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u32 rtc_reg;
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tps65910 = dev_get_drvdata(pdev->dev.parent);
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tps_rtc = devm_kzalloc(&pdev->dev, sizeof(struct tps65910_rtc),
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GFP_KERNEL);
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if (!tps_rtc)
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return -ENOMEM;
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tps_rtc->rtc = devm_rtc_allocate_device(&pdev->dev);
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if (IS_ERR(tps_rtc->rtc))
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return PTR_ERR(tps_rtc->rtc);
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/* Clear pending interrupts */
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ret = regmap_read(tps65910->regmap, TPS65910_RTC_STATUS, &rtc_reg);
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if (ret < 0)
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return ret;
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ret = regmap_write(tps65910->regmap, TPS65910_RTC_STATUS, rtc_reg);
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if (ret < 0)
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return ret;
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dev_dbg(&pdev->dev, "Enabling rtc-tps65910.\n");
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/* Enable RTC digital power domain */
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ret = regmap_update_bits(tps65910->regmap, TPS65910_DEVCTRL,
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DEVCTRL_RTC_PWDN_MASK, 0 << DEVCTRL_RTC_PWDN_SHIFT);
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if (ret < 0)
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return ret;
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rtc_reg = TPS65910_RTC_CTRL_STOP_RTC;
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ret = regmap_write(tps65910->regmap, TPS65910_RTC_CTRL, rtc_reg);
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if (ret < 0)
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return ret;
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platform_set_drvdata(pdev, tps_rtc);
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irq = platform_get_irq(pdev, 0);
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if (irq <= 0) {
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dev_warn(&pdev->dev, "Wake up is not possible as irq = %d\n",
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irq);
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return -ENXIO;
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}
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ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
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tps65910_rtc_interrupt, IRQF_TRIGGER_LOW,
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dev_name(&pdev->dev), &pdev->dev);
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if (ret < 0) {
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dev_err(&pdev->dev, "IRQ is not free.\n");
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return ret;
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}
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tps_rtc->irq = irq;
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device_set_wakeup_capable(&pdev->dev, 1);
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tps_rtc->rtc->ops = &tps65910_rtc_ops;
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tps_rtc->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
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tps_rtc->rtc->range_max = RTC_TIMESTAMP_END_2099;
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ret = rtc_register_device(tps_rtc->rtc);
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if (ret) {
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dev_err(&pdev->dev, "RTC device register: err %d\n", ret);
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return ret;
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}
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return 0;
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}
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#ifdef CONFIG_PM_SLEEP
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static int tps65910_rtc_suspend(struct device *dev)
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{
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struct tps65910_rtc *tps_rtc = dev_get_drvdata(dev);
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if (device_may_wakeup(dev))
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enable_irq_wake(tps_rtc->irq);
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return 0;
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}
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static int tps65910_rtc_resume(struct device *dev)
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{
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struct tps65910_rtc *tps_rtc = dev_get_drvdata(dev);
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if (device_may_wakeup(dev))
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disable_irq_wake(tps_rtc->irq);
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return 0;
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}
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#endif
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static SIMPLE_DEV_PM_OPS(tps65910_rtc_pm_ops, tps65910_rtc_suspend,
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tps65910_rtc_resume);
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static struct platform_driver tps65910_rtc_driver = {
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.probe = tps65910_rtc_probe,
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.driver = {
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.name = "tps65910-rtc",
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.pm = &tps65910_rtc_pm_ops,
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},
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};
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module_platform_driver(tps65910_rtc_driver);
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MODULE_ALIAS("platform:rtc-tps65910");
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MODULE_AUTHOR("Venu Byravarasu <vbyravarasu@nvidia.com>");
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MODULE_LICENSE("GPL");
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