159 lines
3.8 KiB
C
159 lines
3.8 KiB
C
/*
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* Copyright 2008 Advanced Micro Devices, Inc.
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* Copyright 2008 Red Hat Inc.
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* Copyright 2009 Jerome Glisse.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Dave Airlie
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* Alex Deucher
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* Jerome Glisse
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*/
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#include "drmP.h"
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#include "radeon_drm.h"
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#include "radeon_reg.h"
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#include "radeon_microcode.h"
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#include "radeon.h"
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#include "atom.h"
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static inline uint32_t r100_irq_ack(struct radeon_device *rdev)
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{
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uint32_t irqs = RREG32(RADEON_GEN_INT_STATUS);
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uint32_t irq_mask = RADEON_SW_INT_TEST;
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if (irqs) {
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WREG32(RADEON_GEN_INT_STATUS, irqs);
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}
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return irqs & irq_mask;
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}
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int r100_irq_set(struct radeon_device *rdev)
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{
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uint32_t tmp = 0;
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if (rdev->irq.sw_int) {
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tmp |= RADEON_SW_INT_ENABLE;
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}
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/* Todo go through CRTC and enable vblank int or not */
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WREG32(RADEON_GEN_INT_CNTL, tmp);
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return 0;
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}
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int r100_irq_process(struct radeon_device *rdev)
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{
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uint32_t status;
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status = r100_irq_ack(rdev);
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if (!status) {
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return IRQ_NONE;
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}
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while (status) {
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/* SW interrupt */
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if (status & RADEON_SW_INT_TEST) {
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radeon_fence_process(rdev);
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}
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status = r100_irq_ack(rdev);
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}
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return IRQ_HANDLED;
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}
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int rs600_irq_set(struct radeon_device *rdev)
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{
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uint32_t tmp = 0;
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if (rdev->irq.sw_int) {
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tmp |= RADEON_SW_INT_ENABLE;
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}
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WREG32(RADEON_GEN_INT_CNTL, tmp);
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/* Todo go through CRTC and enable vblank int or not */
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WREG32(R500_DxMODE_INT_MASK, 0);
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return 0;
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}
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irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS)
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{
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struct drm_device *dev = (struct drm_device *) arg;
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struct radeon_device *rdev = dev->dev_private;
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return radeon_irq_process(rdev);
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}
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void radeon_driver_irq_preinstall_kms(struct drm_device *dev)
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{
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struct radeon_device *rdev = dev->dev_private;
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unsigned i;
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/* Disable *all* interrupts */
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rdev->irq.sw_int = false;
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for (i = 0; i < 2; i++) {
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rdev->irq.crtc_vblank_int[i] = false;
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}
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radeon_irq_set(rdev);
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/* Clear bits */
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radeon_irq_process(rdev);
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}
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int radeon_driver_irq_postinstall_kms(struct drm_device *dev)
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{
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struct radeon_device *rdev = dev->dev_private;
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dev->max_vblank_count = 0x001fffff;
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rdev->irq.sw_int = true;
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radeon_irq_set(rdev);
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return 0;
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}
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void radeon_driver_irq_uninstall_kms(struct drm_device *dev)
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{
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struct radeon_device *rdev = dev->dev_private;
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unsigned i;
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if (rdev == NULL) {
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return;
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}
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/* Disable *all* interrupts */
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rdev->irq.sw_int = false;
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for (i = 0; i < 2; i++) {
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rdev->irq.crtc_vblank_int[i] = false;
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}
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radeon_irq_set(rdev);
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}
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int radeon_irq_kms_init(struct radeon_device *rdev)
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{
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int r = 0;
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r = drm_vblank_init(rdev->ddev, 2);
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if (r) {
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return r;
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}
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drm_irq_install(rdev->ddev);
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rdev->irq.installed = true;
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DRM_INFO("radeon: irq initialized.\n");
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return 0;
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}
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void radeon_irq_kms_fini(struct radeon_device *rdev)
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{
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if (rdev->irq.installed) {
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rdev->irq.installed = false;
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drm_irq_uninstall(rdev->ddev);
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}
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}
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