120 lines
2.7 KiB
C
120 lines
2.7 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Version from mach-generic modified to support PowerTV port
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* Portions Copyright (C) 2009 Cisco Systems, Inc.
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* Copyright (C) 2006 Ralf Baechle <ralf@linux-mips.org>
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*
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*/
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#ifndef __ASM_MACH_POWERTV_DMA_COHERENCE_H
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#define __ASM_MACH_POWERTV_DMA_COHERENCE_H
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#include <linux/sched.h>
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#include <linux/version.h>
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#include <linux/device.h>
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#include <asm/mach-powertv/asic.h>
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static inline bool is_kseg2(void *addr)
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{
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return (unsigned long)addr >= KSEG2;
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}
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static inline unsigned long virt_to_phys_from_pte(void *addr)
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{
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pgd_t *pgd;
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pud_t *pud;
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pmd_t *pmd;
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pte_t *ptep, pte;
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unsigned long virt_addr = (unsigned long)addr;
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unsigned long phys_addr = 0UL;
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/* get the page global directory. */
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pgd = pgd_offset_k(virt_addr);
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if (!pgd_none(*pgd)) {
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/* get the page upper directory */
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pud = pud_offset(pgd, virt_addr);
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if (!pud_none(*pud)) {
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/* get the page middle directory */
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pmd = pmd_offset(pud, virt_addr);
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if (!pmd_none(*pmd)) {
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/* get a pointer to the page table entry */
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ptep = pte_offset(pmd, virt_addr);
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pte = *ptep;
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/* check for a valid page */
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if (pte_present(pte)) {
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/* get the physical address the page is
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* refering to */
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phys_addr = (unsigned long)
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page_to_phys(pte_page(pte));
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/* add the offset within the page */
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phys_addr |= (virt_addr & ~PAGE_MASK);
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}
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}
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}
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}
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return phys_addr;
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}
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static inline dma_addr_t plat_map_dma_mem(struct device *dev, void *addr,
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size_t size)
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{
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if (is_kseg2(addr))
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return phys_to_dma(virt_to_phys_from_pte(addr));
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else
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return phys_to_dma(virt_to_phys(addr));
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}
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static inline dma_addr_t plat_map_dma_mem_page(struct device *dev,
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struct page *page)
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{
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return phys_to_dma(page_to_phys(page));
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}
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static inline unsigned long plat_dma_addr_to_phys(struct device *dev,
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dma_addr_t dma_addr)
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{
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return dma_to_phys(dma_addr);
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}
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static inline void plat_unmap_dma_mem(struct device *dev, dma_addr_t dma_addr,
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size_t size, enum dma_data_direction direction)
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{
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}
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static inline int plat_dma_supported(struct device *dev, u64 mask)
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{
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/*
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* we fall back to GFP_DMA when the mask isn't all 1s,
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* so we can't guarantee allocations that must be
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* within a tighter range than GFP_DMA..
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*/
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if (mask < DMA_BIT_MASK(24))
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return 0;
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return 1;
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}
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static inline void plat_extra_sync_for_device(struct device *dev)
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{
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return;
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}
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static inline int plat_dma_mapping_error(struct device *dev,
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dma_addr_t dma_addr)
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{
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return 0;
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}
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static inline int plat_device_is_coherent(struct device *dev)
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{
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return 0;
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}
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#endif /* __ASM_MACH_POWERTV_DMA_COHERENCE_H */
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