544 lines
12 KiB
C
544 lines
12 KiB
C
/*
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* Sharp VA3A5JZ921 One Seg Broadcast Module driver
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* This device is labeled as just S. 921 at the top of the frontend can
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*
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* Copyright (C) 2009-2010 Mauro Carvalho Chehab
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* Copyright (C) 2009-2010 Douglas Landgraf <dougsland@redhat.com>
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*
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* Developed for Leadership SBTVD 1seg device sold in Brazil
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*
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* Frontend module based on cx24123 driver, getting some info from
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* the old s921 driver.
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*
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* FIXME: Need to port to DVB v5.2 API
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*/
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#include <linux/kernel.h>
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#include <asm/div64.h>
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#include <media/dvb_frontend.h>
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#include "s921.h"
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static int debug = 1;
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module_param(debug, int, 0644);
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MODULE_PARM_DESC(debug, "Activates frontend debugging (default:0)");
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#define rc(args...) do { \
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printk(KERN_ERR "s921: " args); \
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} while (0)
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#define dprintk(args...) \
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do { \
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if (debug) { \
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printk(KERN_DEBUG "s921: %s: ", __func__); \
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printk(args); \
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} \
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} while (0)
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struct s921_state {
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struct i2c_adapter *i2c;
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const struct s921_config *config;
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struct dvb_frontend frontend;
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/* The Demod can't easily provide these, we cache them */
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u32 currentfreq;
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};
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/*
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* Various tuner defaults need to be established for a given frequency kHz.
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* fixme: The bounds on the bands do not match the doc in real life.
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* fixme: Some of them have been moved, other might need adjustment.
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*/
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static struct s921_bandselect_val {
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u32 freq_low;
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u8 band_reg;
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} s921_bandselect[] = {
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{ 0, 0x7b },
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{ 485140000, 0x5b },
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{ 515140000, 0x3b },
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{ 545140000, 0x1b },
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{ 599140000, 0xfb },
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{ 623140000, 0xdb },
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{ 659140000, 0xbb },
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{ 713140000, 0x9b },
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};
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struct regdata {
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u8 reg;
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u8 data;
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};
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static struct regdata s921_init[] = {
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{ 0x01, 0x80 }, /* Probably, a reset sequence */
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{ 0x01, 0x40 },
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{ 0x01, 0x80 },
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{ 0x01, 0x40 },
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{ 0x02, 0x00 },
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{ 0x03, 0x40 },
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{ 0x04, 0x01 },
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{ 0x05, 0x00 },
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{ 0x06, 0x00 },
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{ 0x07, 0x00 },
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{ 0x08, 0x00 },
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{ 0x09, 0x00 },
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{ 0x0a, 0x00 },
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{ 0x0b, 0x5a },
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{ 0x0c, 0x00 },
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{ 0x0d, 0x00 },
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{ 0x0f, 0x00 },
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{ 0x13, 0x1b },
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{ 0x14, 0x80 },
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{ 0x15, 0x40 },
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{ 0x17, 0x70 },
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{ 0x18, 0x01 },
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{ 0x19, 0x12 },
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{ 0x1a, 0x01 },
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{ 0x1b, 0x12 },
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{ 0x1c, 0xa0 },
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{ 0x1d, 0x00 },
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{ 0x1e, 0x0a },
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{ 0x1f, 0x08 },
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{ 0x20, 0x40 },
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{ 0x21, 0xff },
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{ 0x22, 0x4c },
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{ 0x23, 0x4e },
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{ 0x24, 0x4c },
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{ 0x25, 0x00 },
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{ 0x26, 0x00 },
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{ 0x27, 0xf4 },
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{ 0x28, 0x60 },
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{ 0x29, 0x88 },
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{ 0x2a, 0x40 },
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{ 0x2b, 0x40 },
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{ 0x2c, 0xff },
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{ 0x2d, 0x00 },
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{ 0x2e, 0xff },
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{ 0x2f, 0x00 },
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{ 0x30, 0x20 },
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{ 0x31, 0x06 },
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{ 0x32, 0x0c },
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{ 0x34, 0x0f },
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{ 0x37, 0xfe },
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{ 0x38, 0x00 },
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{ 0x39, 0x63 },
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{ 0x3a, 0x10 },
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{ 0x3b, 0x10 },
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{ 0x47, 0x00 },
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{ 0x49, 0xe5 },
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{ 0x4b, 0x00 },
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{ 0x50, 0xc0 },
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{ 0x52, 0x20 },
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{ 0x54, 0x5a },
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{ 0x55, 0x5b },
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{ 0x56, 0x40 },
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{ 0x57, 0x70 },
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{ 0x5c, 0x50 },
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{ 0x5d, 0x00 },
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{ 0x62, 0x17 },
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{ 0x63, 0x2f },
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{ 0x64, 0x6f },
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{ 0x68, 0x00 },
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{ 0x69, 0x89 },
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{ 0x6a, 0x00 },
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{ 0x6b, 0x00 },
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{ 0x6c, 0x00 },
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{ 0x6d, 0x00 },
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{ 0x6e, 0x00 },
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{ 0x70, 0x10 },
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{ 0x71, 0x00 },
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{ 0x75, 0x00 },
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{ 0x76, 0x30 },
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{ 0x77, 0x01 },
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{ 0xaf, 0x00 },
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{ 0xb0, 0xa0 },
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{ 0xb2, 0x3d },
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{ 0xb3, 0x25 },
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{ 0xb4, 0x8b },
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{ 0xb5, 0x4b },
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{ 0xb6, 0x3f },
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{ 0xb7, 0xff },
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{ 0xb8, 0xff },
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{ 0xb9, 0xfc },
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{ 0xba, 0x00 },
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{ 0xbb, 0x00 },
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{ 0xbc, 0x00 },
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{ 0xd0, 0x30 },
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{ 0xe4, 0x84 },
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{ 0xf0, 0x48 },
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{ 0xf1, 0x19 },
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{ 0xf2, 0x5a },
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{ 0xf3, 0x8e },
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{ 0xf4, 0x2d },
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{ 0xf5, 0x07 },
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{ 0xf6, 0x5a },
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{ 0xf7, 0xba },
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{ 0xf8, 0xd7 },
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};
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static struct regdata s921_prefreq[] = {
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{ 0x47, 0x60 },
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{ 0x68, 0x00 },
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{ 0x69, 0x89 },
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{ 0xf0, 0x48 },
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{ 0xf1, 0x19 },
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};
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static struct regdata s921_postfreq[] = {
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{ 0xf5, 0xae },
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{ 0xf6, 0xb7 },
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{ 0xf7, 0xba },
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{ 0xf8, 0xd7 },
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{ 0x68, 0x0a },
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{ 0x69, 0x09 },
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};
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static int s921_i2c_writereg(struct s921_state *state,
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u8 i2c_addr, int reg, int data)
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{
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u8 buf[] = { reg, data };
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struct i2c_msg msg = {
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.addr = i2c_addr, .flags = 0, .buf = buf, .len = 2
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};
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int rc;
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rc = i2c_transfer(state->i2c, &msg, 1);
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if (rc != 1) {
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printk("%s: writereg rcor(rc == %i, reg == 0x%02x, data == 0x%02x)\n",
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__func__, rc, reg, data);
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return rc;
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}
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return 0;
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}
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static int s921_i2c_writeregdata(struct s921_state *state, u8 i2c_addr,
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struct regdata *rd, int size)
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{
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int i, rc;
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for (i = 0; i < size; i++) {
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rc = s921_i2c_writereg(state, i2c_addr, rd[i].reg, rd[i].data);
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if (rc < 0)
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return rc;
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}
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return 0;
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}
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static int s921_i2c_readreg(struct s921_state *state, u8 i2c_addr, u8 reg)
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{
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u8 val;
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int rc;
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struct i2c_msg msg[] = {
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{ .addr = i2c_addr, .flags = 0, .buf = ®, .len = 1 },
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{ .addr = i2c_addr, .flags = I2C_M_RD, .buf = &val, .len = 1 }
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};
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rc = i2c_transfer(state->i2c, msg, 2);
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if (rc != 2) {
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rc("%s: reg=0x%x (rcor=%d)\n", __func__, reg, rc);
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return rc;
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}
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return val;
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}
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#define s921_readreg(state, reg) \
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s921_i2c_readreg(state, state->config->demod_address, reg)
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#define s921_writereg(state, reg, val) \
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s921_i2c_writereg(state, state->config->demod_address, reg, val)
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#define s921_writeregdata(state, regdata) \
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s921_i2c_writeregdata(state, state->config->demod_address, \
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regdata, ARRAY_SIZE(regdata))
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static int s921_pll_tune(struct dvb_frontend *fe)
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{
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struct dtv_frontend_properties *p = &fe->dtv_property_cache;
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struct s921_state *state = fe->demodulator_priv;
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int band, rc, i;
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unsigned long f_offset;
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u8 f_switch;
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u64 offset;
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dprintk("frequency=%i\n", p->frequency);
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for (band = 0; band < ARRAY_SIZE(s921_bandselect); band++)
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if (p->frequency < s921_bandselect[band].freq_low)
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break;
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band--;
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if (band < 0) {
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rc("%s: frequency out of range\n", __func__);
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return -EINVAL;
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}
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f_switch = s921_bandselect[band].band_reg;
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offset = ((u64)p->frequency) * 258;
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do_div(offset, 6000000);
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f_offset = ((unsigned long)offset) + 2321;
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rc = s921_writeregdata(state, s921_prefreq);
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if (rc < 0)
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return rc;
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rc = s921_writereg(state, 0xf2, (f_offset >> 8) & 0xff);
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if (rc < 0)
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return rc;
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rc = s921_writereg(state, 0xf3, f_offset & 0xff);
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if (rc < 0)
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return rc;
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rc = s921_writereg(state, 0xf4, f_switch);
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if (rc < 0)
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return rc;
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rc = s921_writeregdata(state, s921_postfreq);
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if (rc < 0)
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return rc;
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for (i = 0 ; i < 6; i++) {
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rc = s921_readreg(state, 0x80);
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dprintk("status 0x80: %02x\n", rc);
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}
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rc = s921_writereg(state, 0x01, 0x40);
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if (rc < 0)
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return rc;
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rc = s921_readreg(state, 0x01);
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dprintk("status 0x01: %02x\n", rc);
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rc = s921_readreg(state, 0x80);
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dprintk("status 0x80: %02x\n", rc);
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rc = s921_readreg(state, 0x80);
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dprintk("status 0x80: %02x\n", rc);
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rc = s921_readreg(state, 0x32);
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dprintk("status 0x32: %02x\n", rc);
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dprintk("pll tune band=%d, pll=%d\n", f_switch, (int)f_offset);
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return 0;
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}
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static int s921_initfe(struct dvb_frontend *fe)
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{
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struct s921_state *state = fe->demodulator_priv;
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int rc;
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dprintk("\n");
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rc = s921_writeregdata(state, s921_init);
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if (rc < 0)
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return rc;
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return 0;
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}
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static int s921_read_status(struct dvb_frontend *fe, enum fe_status *status)
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{
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struct s921_state *state = fe->demodulator_priv;
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int regstatus, rc;
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*status = 0;
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rc = s921_readreg(state, 0x81);
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if (rc < 0)
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return rc;
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regstatus = rc << 8;
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rc = s921_readreg(state, 0x82);
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if (rc < 0)
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return rc;
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regstatus |= rc;
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dprintk("status = %04x\n", regstatus);
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/* Full Sync - We don't know what each bit means on regs 0x81/0x82 */
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if ((regstatus & 0xff) == 0x40) {
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*status = FE_HAS_SIGNAL |
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FE_HAS_CARRIER |
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FE_HAS_VITERBI |
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FE_HAS_SYNC |
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FE_HAS_LOCK;
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} else if (regstatus & 0x40) {
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/* This is close to Full Sync, but not enough to get useful info */
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*status = FE_HAS_SIGNAL |
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FE_HAS_CARRIER |
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FE_HAS_VITERBI |
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FE_HAS_SYNC;
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}
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return 0;
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}
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static int s921_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
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{
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enum fe_status status;
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struct s921_state *state = fe->demodulator_priv;
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int rc;
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/* FIXME: Use the proper register for it... 0x80? */
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rc = s921_read_status(fe, &status);
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if (rc < 0)
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return rc;
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*strength = (status & FE_HAS_LOCK) ? 0xffff : 0;
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dprintk("strength = 0x%04x\n", *strength);
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rc = s921_readreg(state, 0x01);
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dprintk("status 0x01: %02x\n", rc);
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rc = s921_readreg(state, 0x80);
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dprintk("status 0x80: %02x\n", rc);
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rc = s921_readreg(state, 0x32);
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dprintk("status 0x32: %02x\n", rc);
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return 0;
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}
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static int s921_set_frontend(struct dvb_frontend *fe)
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{
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struct dtv_frontend_properties *p = &fe->dtv_property_cache;
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struct s921_state *state = fe->demodulator_priv;
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int rc;
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dprintk("\n");
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/* FIXME: We don't know how to use non-auto mode */
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rc = s921_pll_tune(fe);
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if (rc < 0)
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return rc;
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state->currentfreq = p->frequency;
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return 0;
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}
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static int s921_get_frontend(struct dvb_frontend *fe,
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struct dtv_frontend_properties *p)
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{
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struct s921_state *state = fe->demodulator_priv;
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/* FIXME: Probably it is possible to get it from regs f1 and f2 */
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p->frequency = state->currentfreq;
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p->delivery_system = SYS_ISDBT;
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return 0;
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}
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static int s921_tune(struct dvb_frontend *fe,
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bool re_tune,
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unsigned int mode_flags,
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unsigned int *delay,
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enum fe_status *status)
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{
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int rc = 0;
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dprintk("\n");
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if (re_tune)
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rc = s921_set_frontend(fe);
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if (!(mode_flags & FE_TUNE_MODE_ONESHOT))
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s921_read_status(fe, status);
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return rc;
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}
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static enum dvbfe_algo s921_get_algo(struct dvb_frontend *fe)
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{
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return DVBFE_ALGO_HW;
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}
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static void s921_release(struct dvb_frontend *fe)
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{
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struct s921_state *state = fe->demodulator_priv;
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dprintk("\n");
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kfree(state);
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}
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static const struct dvb_frontend_ops s921_ops;
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struct dvb_frontend *s921_attach(const struct s921_config *config,
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struct i2c_adapter *i2c)
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{
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/* allocate memory for the internal state */
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struct s921_state *state =
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kzalloc(sizeof(struct s921_state), GFP_KERNEL);
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dprintk("\n");
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if (!state) {
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rc("Unable to kzalloc\n");
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return NULL;
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}
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/* setup the state */
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state->config = config;
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state->i2c = i2c;
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/* create dvb_frontend */
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memcpy(&state->frontend.ops, &s921_ops,
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sizeof(struct dvb_frontend_ops));
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state->frontend.demodulator_priv = state;
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return &state->frontend;
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}
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EXPORT_SYMBOL(s921_attach);
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static const struct dvb_frontend_ops s921_ops = {
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.delsys = { SYS_ISDBT },
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/* Use dib8000 values per default */
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.info = {
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.name = "Sharp S921",
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.frequency_min_hz = 470 * MHz,
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/*
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* Max should be 770MHz instead, according with Sharp docs,
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* but Leadership doc says it works up to 806 MHz. This is
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* required to get channel 69, used in Brazil
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*/
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.frequency_max_hz = 806 * MHz,
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.caps = FE_CAN_INVERSION_AUTO |
|
|
FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
|
|
FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
|
|
FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 |
|
|
FE_CAN_QAM_AUTO | FE_CAN_TRANSMISSION_MODE_AUTO |
|
|
FE_CAN_GUARD_INTERVAL_AUTO | FE_CAN_RECOVER |
|
|
FE_CAN_HIERARCHY_AUTO,
|
|
},
|
|
|
|
.release = s921_release,
|
|
|
|
.init = s921_initfe,
|
|
.set_frontend = s921_set_frontend,
|
|
.get_frontend = s921_get_frontend,
|
|
.read_status = s921_read_status,
|
|
.read_signal_strength = s921_read_signal_strength,
|
|
.tune = s921_tune,
|
|
.get_frontend_algo = s921_get_algo,
|
|
};
|
|
|
|
MODULE_DESCRIPTION("DVB Frontend module for Sharp S921 hardware");
|
|
MODULE_AUTHOR("Mauro Carvalho Chehab");
|
|
MODULE_AUTHOR("Douglas Landgraf <dougsland@redhat.com>");
|
|
MODULE_LICENSE("GPL");
|