753 lines
21 KiB
C
753 lines
21 KiB
C
/*
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* xHCI host controller driver
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*
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* Copyright (C) 2008 Intel Corp.
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*
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* Author: Sarah Sharp
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* Some code borrowed from the Linux EHCI driver.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software Foundation,
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* Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <asm/unaligned.h>
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#include "xhci.h"
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#define PORT_WAKE_BITS (PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E)
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#define PORT_RWC_BITS (PORT_CSC | PORT_PEC | PORT_WRC | PORT_OCC | \
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PORT_RC | PORT_PLC | PORT_PE)
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static void xhci_hub_descriptor(struct xhci_hcd *xhci,
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struct usb_hub_descriptor *desc)
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{
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int ports;
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u16 temp;
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ports = HCS_MAX_PORTS(xhci->hcs_params1);
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/* USB 3.0 hubs have a different descriptor, but we fake this for now */
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desc->bDescriptorType = 0x29;
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desc->bPwrOn2PwrGood = 10; /* xhci section 5.4.9 says 20ms max */
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desc->bHubContrCurrent = 0;
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desc->bNbrPorts = ports;
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temp = 1 + (ports / 8);
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desc->bDescLength = 7 + 2 * temp;
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/* Why does core/hcd.h define bitmap? It's just confusing. */
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memset(&desc->DeviceRemovable[0], 0, temp);
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memset(&desc->DeviceRemovable[temp], 0xff, temp);
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/* Ugh, these should be #defines, FIXME */
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/* Using table 11-13 in USB 2.0 spec. */
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temp = 0;
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/* Bits 1:0 - support port power switching, or power always on */
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if (HCC_PPC(xhci->hcc_params))
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temp |= 0x0001;
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else
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temp |= 0x0002;
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/* Bit 2 - root hubs are not part of a compound device */
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/* Bits 4:3 - individual port over current protection */
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temp |= 0x0008;
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/* Bits 6:5 - no TTs in root ports */
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/* Bit 7 - no port indicators */
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desc->wHubCharacteristics = (__force __u16) cpu_to_le16(temp);
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}
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static unsigned int xhci_port_speed(unsigned int port_status)
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{
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if (DEV_LOWSPEED(port_status))
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return USB_PORT_STAT_LOW_SPEED;
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if (DEV_HIGHSPEED(port_status))
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return USB_PORT_STAT_HIGH_SPEED;
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if (DEV_SUPERSPEED(port_status))
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return USB_PORT_STAT_SUPER_SPEED;
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/*
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* FIXME: Yes, we should check for full speed, but the core uses that as
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* a default in portspeed() in usb/core/hub.c (which is the only place
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* USB_PORT_STAT_*_SPEED is used).
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*/
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return 0;
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}
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/*
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* These bits are Read Only (RO) and should be saved and written to the
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* registers: 0, 3, 10:13, 30
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* connect status, over-current status, port speed, and device removable.
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* connect status and port speed are also sticky - meaning they're in
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* the AUX well and they aren't changed by a hot, warm, or cold reset.
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*/
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#define XHCI_PORT_RO ((1<<0) | (1<<3) | (0xf<<10) | (1<<30))
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/*
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* These bits are RW; writing a 0 clears the bit, writing a 1 sets the bit:
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* bits 5:8, 9, 14:15, 25:27
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* link state, port power, port indicator state, "wake on" enable state
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*/
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#define XHCI_PORT_RWS ((0xf<<5) | (1<<9) | (0x3<<14) | (0x7<<25))
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/*
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* These bits are RW; writing a 1 sets the bit, writing a 0 has no effect:
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* bit 4 (port reset)
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*/
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#define XHCI_PORT_RW1S ((1<<4))
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/*
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* These bits are RW; writing a 1 clears the bit, writing a 0 has no effect:
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* bits 1, 17, 18, 19, 20, 21, 22, 23
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* port enable/disable, and
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* change bits: connect, PED, warm port reset changed (reserved zero for USB 2.0 ports),
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* over-current, reset, link state, and L1 change
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*/
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#define XHCI_PORT_RW1CS ((1<<1) | (0x7f<<17))
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/*
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* Bit 16 is RW, and writing a '1' to it causes the link state control to be
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* latched in
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*/
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#define XHCI_PORT_RW ((1<<16))
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/*
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* These bits are Reserved Zero (RsvdZ) and zero should be written to them:
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* bits 2, 24, 28:31
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*/
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#define XHCI_PORT_RZ ((1<<2) | (1<<24) | (0xf<<28))
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/*
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* Given a port state, this function returns a value that would result in the
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* port being in the same state, if the value was written to the port status
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* control register.
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* Save Read Only (RO) bits and save read/write bits where
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* writing a 0 clears the bit and writing a 1 sets the bit (RWS).
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* For all other types (RW1S, RW1CS, RW, and RZ), writing a '0' has no effect.
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*/
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u32 xhci_port_state_to_neutral(u32 state)
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{
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/* Save read-only status and port state */
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return (state & XHCI_PORT_RO) | (state & XHCI_PORT_RWS);
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}
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/*
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* find slot id based on port number.
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*/
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int xhci_find_slot_id_by_port(struct xhci_hcd *xhci, u16 port)
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{
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int slot_id;
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int i;
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slot_id = 0;
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for (i = 0; i < MAX_HC_SLOTS; i++) {
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if (!xhci->devs[i])
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continue;
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if (xhci->devs[i]->port == port) {
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slot_id = i;
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break;
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}
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}
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return slot_id;
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}
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/*
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* Stop device
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* It issues stop endpoint command for EP 0 to 30. And wait the last command
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* to complete.
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* suspend will set to 1, if suspend bit need to set in command.
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*/
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static int xhci_stop_device(struct xhci_hcd *xhci, int slot_id, int suspend)
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{
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struct xhci_virt_device *virt_dev;
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struct xhci_command *cmd;
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unsigned long flags;
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int timeleft;
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int ret;
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int i;
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ret = 0;
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virt_dev = xhci->devs[slot_id];
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cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
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if (!cmd) {
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xhci_dbg(xhci, "Couldn't allocate command structure.\n");
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return -ENOMEM;
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}
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spin_lock_irqsave(&xhci->lock, flags);
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for (i = LAST_EP_INDEX; i > 0; i--) {
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if (virt_dev->eps[i].ring && virt_dev->eps[i].ring->dequeue)
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xhci_queue_stop_endpoint(xhci, slot_id, i, suspend);
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}
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cmd->command_trb = xhci->cmd_ring->enqueue;
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list_add_tail(&cmd->cmd_list, &virt_dev->cmd_list);
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xhci_queue_stop_endpoint(xhci, slot_id, 0, suspend);
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xhci_ring_cmd_db(xhci);
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spin_unlock_irqrestore(&xhci->lock, flags);
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/* Wait for last stop endpoint command to finish */
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timeleft = wait_for_completion_interruptible_timeout(
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cmd->completion,
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USB_CTRL_SET_TIMEOUT);
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if (timeleft <= 0) {
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xhci_warn(xhci, "%s while waiting for stop endpoint command\n",
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timeleft == 0 ? "Timeout" : "Signal");
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spin_lock_irqsave(&xhci->lock, flags);
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/* The timeout might have raced with the event ring handler, so
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* only delete from the list if the item isn't poisoned.
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*/
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if (cmd->cmd_list.next != LIST_POISON1)
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list_del(&cmd->cmd_list);
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spin_unlock_irqrestore(&xhci->lock, flags);
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ret = -ETIME;
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goto command_cleanup;
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}
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command_cleanup:
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xhci_free_command(xhci, cmd);
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return ret;
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}
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/*
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* Ring device, it rings the all doorbells unconditionally.
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*/
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void xhci_ring_device(struct xhci_hcd *xhci, int slot_id)
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{
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int i;
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for (i = 0; i < LAST_EP_INDEX + 1; i++)
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if (xhci->devs[slot_id]->eps[i].ring &&
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xhci->devs[slot_id]->eps[i].ring->dequeue)
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xhci_ring_ep_doorbell(xhci, slot_id, i, 0);
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return;
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}
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static void xhci_disable_port(struct xhci_hcd *xhci, u16 wIndex,
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u32 __iomem *addr, u32 port_status)
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{
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/* Don't allow the USB core to disable SuperSpeed ports. */
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if (xhci->port_array[wIndex] == 0x03) {
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xhci_dbg(xhci, "Ignoring request to disable "
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"SuperSpeed port.\n");
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return;
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}
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/* Write 1 to disable the port */
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xhci_writel(xhci, port_status | PORT_PE, addr);
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port_status = xhci_readl(xhci, addr);
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xhci_dbg(xhci, "disable port, actual port %d status = 0x%x\n",
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wIndex, port_status);
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}
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static void xhci_clear_port_change_bit(struct xhci_hcd *xhci, u16 wValue,
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u16 wIndex, u32 __iomem *addr, u32 port_status)
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{
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char *port_change_bit;
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u32 status;
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switch (wValue) {
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case USB_PORT_FEAT_C_RESET:
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status = PORT_RC;
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port_change_bit = "reset";
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break;
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case USB_PORT_FEAT_C_CONNECTION:
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status = PORT_CSC;
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port_change_bit = "connect";
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break;
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case USB_PORT_FEAT_C_OVER_CURRENT:
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status = PORT_OCC;
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port_change_bit = "over-current";
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break;
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case USB_PORT_FEAT_C_ENABLE:
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status = PORT_PEC;
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port_change_bit = "enable/disable";
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break;
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case USB_PORT_FEAT_C_SUSPEND:
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status = PORT_PLC;
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port_change_bit = "suspend/resume";
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break;
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default:
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/* Should never happen */
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return;
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}
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/* Change bits are all write 1 to clear */
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xhci_writel(xhci, port_status | status, addr);
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port_status = xhci_readl(xhci, addr);
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xhci_dbg(xhci, "clear port %s change, actual port %d status = 0x%x\n",
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port_change_bit, wIndex, port_status);
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}
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int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
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u16 wIndex, char *buf, u16 wLength)
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{
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struct xhci_hcd *xhci = hcd_to_xhci(hcd);
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int ports;
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unsigned long flags;
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u32 temp, temp1, status;
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int retval = 0;
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u32 __iomem *addr;
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int slot_id;
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ports = HCS_MAX_PORTS(xhci->hcs_params1);
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spin_lock_irqsave(&xhci->lock, flags);
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switch (typeReq) {
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case GetHubStatus:
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/* No power source, over-current reported per port */
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memset(buf, 0, 4);
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break;
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case GetHubDescriptor:
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xhci_hub_descriptor(xhci, (struct usb_hub_descriptor *) buf);
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break;
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case GetPortStatus:
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if (!wIndex || wIndex > ports)
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goto error;
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wIndex--;
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status = 0;
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addr = &xhci->op_regs->port_status_base + NUM_PORT_REGS*(wIndex & 0xff);
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temp = xhci_readl(xhci, addr);
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xhci_dbg(xhci, "get port status, actual port %d status = 0x%x\n", wIndex, temp);
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/* wPortChange bits */
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if (temp & PORT_CSC)
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status |= USB_PORT_STAT_C_CONNECTION << 16;
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if (temp & PORT_PEC)
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status |= USB_PORT_STAT_C_ENABLE << 16;
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if ((temp & PORT_OCC))
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status |= USB_PORT_STAT_C_OVERCURRENT << 16;
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/*
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* FIXME ignoring reset and USB 2.1/3.0 specific
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* changes
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*/
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if ((temp & PORT_PLS_MASK) == XDEV_U3
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&& (temp & PORT_POWER))
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status |= 1 << USB_PORT_FEAT_SUSPEND;
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if ((temp & PORT_PLS_MASK) == XDEV_RESUME) {
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if ((temp & PORT_RESET) || !(temp & PORT_PE))
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goto error;
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if (!DEV_SUPERSPEED(temp) && time_after_eq(jiffies,
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xhci->resume_done[wIndex])) {
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xhci_dbg(xhci, "Resume USB2 port %d\n",
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wIndex + 1);
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xhci->resume_done[wIndex] = 0;
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temp1 = xhci_port_state_to_neutral(temp);
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temp1 &= ~PORT_PLS_MASK;
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temp1 |= PORT_LINK_STROBE | XDEV_U0;
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xhci_writel(xhci, temp1, addr);
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xhci_dbg(xhci, "set port %d resume\n",
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wIndex + 1);
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slot_id = xhci_find_slot_id_by_port(xhci,
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wIndex + 1);
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if (!slot_id) {
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xhci_dbg(xhci, "slot_id is zero\n");
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goto error;
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}
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xhci_ring_device(xhci, slot_id);
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xhci->port_c_suspend[wIndex >> 5] |=
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1 << (wIndex & 31);
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xhci->suspended_ports[wIndex >> 5] &=
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~(1 << (wIndex & 31));
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}
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}
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if ((temp & PORT_PLS_MASK) == XDEV_U0
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&& (temp & PORT_POWER)
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&& (xhci->suspended_ports[wIndex >> 5] &
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(1 << (wIndex & 31)))) {
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xhci->suspended_ports[wIndex >> 5] &=
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~(1 << (wIndex & 31));
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xhci->port_c_suspend[wIndex >> 5] |=
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1 << (wIndex & 31);
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}
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if (temp & PORT_CONNECT) {
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status |= USB_PORT_STAT_CONNECTION;
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status |= xhci_port_speed(temp);
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}
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if (temp & PORT_PE)
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status |= USB_PORT_STAT_ENABLE;
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if (temp & PORT_OC)
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status |= USB_PORT_STAT_OVERCURRENT;
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if (temp & PORT_RESET)
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status |= USB_PORT_STAT_RESET;
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if (temp & PORT_POWER)
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status |= USB_PORT_STAT_POWER;
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if (xhci->port_c_suspend[wIndex >> 5] & (1 << (wIndex & 31)))
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status |= 1 << USB_PORT_FEAT_C_SUSPEND;
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xhci_dbg(xhci, "Get port status returned 0x%x\n", status);
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put_unaligned(cpu_to_le32(status), (__le32 *) buf);
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break;
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case SetPortFeature:
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wIndex &= 0xff;
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if (!wIndex || wIndex > ports)
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goto error;
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wIndex--;
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addr = &xhci->op_regs->port_status_base + NUM_PORT_REGS*(wIndex & 0xff);
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temp = xhci_readl(xhci, addr);
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temp = xhci_port_state_to_neutral(temp);
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switch (wValue) {
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case USB_PORT_FEAT_SUSPEND:
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temp = xhci_readl(xhci, addr);
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/* In spec software should not attempt to suspend
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* a port unless the port reports that it is in the
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* enabled (PED = ‘1’,PLS < ‘3’) state.
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*/
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if ((temp & PORT_PE) == 0 || (temp & PORT_RESET)
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|| (temp & PORT_PLS_MASK) >= XDEV_U3) {
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xhci_warn(xhci, "USB core suspending device "
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"not in U0/U1/U2.\n");
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goto error;
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}
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slot_id = xhci_find_slot_id_by_port(xhci, wIndex + 1);
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if (!slot_id) {
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xhci_warn(xhci, "slot_id is zero\n");
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goto error;
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}
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/* unlock to execute stop endpoint commands */
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spin_unlock_irqrestore(&xhci->lock, flags);
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xhci_stop_device(xhci, slot_id, 1);
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spin_lock_irqsave(&xhci->lock, flags);
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temp = xhci_port_state_to_neutral(temp);
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temp &= ~PORT_PLS_MASK;
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temp |= PORT_LINK_STROBE | XDEV_U3;
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xhci_writel(xhci, temp, addr);
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spin_unlock_irqrestore(&xhci->lock, flags);
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msleep(10); /* wait device to enter */
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spin_lock_irqsave(&xhci->lock, flags);
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temp = xhci_readl(xhci, addr);
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xhci->suspended_ports[wIndex >> 5] |=
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1 << (wIndex & (31));
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break;
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case USB_PORT_FEAT_POWER:
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/*
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* Turn on ports, even if there isn't per-port switching.
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* HC will report connect events even before this is set.
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* However, khubd will ignore the roothub events until
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* the roothub is registered.
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*/
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xhci_writel(xhci, temp | PORT_POWER, addr);
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temp = xhci_readl(xhci, addr);
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xhci_dbg(xhci, "set port power, actual port %d status = 0x%x\n", wIndex, temp);
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break;
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case USB_PORT_FEAT_RESET:
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temp = (temp | PORT_RESET);
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xhci_writel(xhci, temp, addr);
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temp = xhci_readl(xhci, addr);
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xhci_dbg(xhci, "set port reset, actual port %d status = 0x%x\n", wIndex, temp);
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break;
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default:
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goto error;
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}
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temp = xhci_readl(xhci, addr); /* unblock any posted writes */
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break;
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case ClearPortFeature:
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if (!wIndex || wIndex > ports)
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goto error;
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wIndex--;
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addr = &xhci->op_regs->port_status_base +
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NUM_PORT_REGS*(wIndex & 0xff);
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||
temp = xhci_readl(xhci, addr);
|
||
temp = xhci_port_state_to_neutral(temp);
|
||
switch (wValue) {
|
||
case USB_PORT_FEAT_SUSPEND:
|
||
temp = xhci_readl(xhci, addr);
|
||
xhci_dbg(xhci, "clear USB_PORT_FEAT_SUSPEND\n");
|
||
xhci_dbg(xhci, "PORTSC %04x\n", temp);
|
||
if (temp & PORT_RESET)
|
||
goto error;
|
||
if (temp & XDEV_U3) {
|
||
if ((temp & PORT_PE) == 0)
|
||
goto error;
|
||
if (DEV_SUPERSPEED(temp)) {
|
||
temp = xhci_port_state_to_neutral(temp);
|
||
temp &= ~PORT_PLS_MASK;
|
||
temp |= PORT_LINK_STROBE | XDEV_U0;
|
||
xhci_writel(xhci, temp, addr);
|
||
xhci_readl(xhci, addr);
|
||
} else {
|
||
temp = xhci_port_state_to_neutral(temp);
|
||
temp &= ~PORT_PLS_MASK;
|
||
temp |= PORT_LINK_STROBE | XDEV_RESUME;
|
||
xhci_writel(xhci, temp, addr);
|
||
|
||
spin_unlock_irqrestore(&xhci->lock,
|
||
flags);
|
||
msleep(20);
|
||
spin_lock_irqsave(&xhci->lock, flags);
|
||
|
||
temp = xhci_readl(xhci, addr);
|
||
temp = xhci_port_state_to_neutral(temp);
|
||
temp &= ~PORT_PLS_MASK;
|
||
temp |= PORT_LINK_STROBE | XDEV_U0;
|
||
xhci_writel(xhci, temp, addr);
|
||
}
|
||
xhci->port_c_suspend[wIndex >> 5] |=
|
||
1 << (wIndex & 31);
|
||
}
|
||
|
||
slot_id = xhci_find_slot_id_by_port(xhci, wIndex + 1);
|
||
if (!slot_id) {
|
||
xhci_dbg(xhci, "slot_id is zero\n");
|
||
goto error;
|
||
}
|
||
xhci_ring_device(xhci, slot_id);
|
||
break;
|
||
case USB_PORT_FEAT_C_SUSPEND:
|
||
xhci->port_c_suspend[wIndex >> 5] &=
|
||
~(1 << (wIndex & 31));
|
||
case USB_PORT_FEAT_C_RESET:
|
||
case USB_PORT_FEAT_C_CONNECTION:
|
||
case USB_PORT_FEAT_C_OVER_CURRENT:
|
||
case USB_PORT_FEAT_C_ENABLE:
|
||
xhci_clear_port_change_bit(xhci, wValue, wIndex,
|
||
addr, temp);
|
||
break;
|
||
case USB_PORT_FEAT_ENABLE:
|
||
xhci_disable_port(xhci, wIndex, addr, temp);
|
||
break;
|
||
default:
|
||
goto error;
|
||
}
|
||
break;
|
||
default:
|
||
error:
|
||
/* "stall" on error */
|
||
retval = -EPIPE;
|
||
}
|
||
spin_unlock_irqrestore(&xhci->lock, flags);
|
||
return retval;
|
||
}
|
||
|
||
/*
|
||
* Returns 0 if the status hasn't changed, or the number of bytes in buf.
|
||
* Ports are 0-indexed from the HCD point of view,
|
||
* and 1-indexed from the USB core pointer of view.
|
||
*
|
||
* Note that the status change bits will be cleared as soon as a port status
|
||
* change event is generated, so we use the saved status from that event.
|
||
*/
|
||
int xhci_hub_status_data(struct usb_hcd *hcd, char *buf)
|
||
{
|
||
unsigned long flags;
|
||
u32 temp, status;
|
||
u32 mask;
|
||
int i, retval;
|
||
struct xhci_hcd *xhci = hcd_to_xhci(hcd);
|
||
int ports;
|
||
u32 __iomem *addr;
|
||
|
||
ports = HCS_MAX_PORTS(xhci->hcs_params1);
|
||
|
||
/* Initial status is no changes */
|
||
retval = (ports + 8) / 8;
|
||
memset(buf, 0, retval);
|
||
status = 0;
|
||
|
||
mask = PORT_CSC | PORT_PEC | PORT_OCC;
|
||
|
||
spin_lock_irqsave(&xhci->lock, flags);
|
||
/* For each port, did anything change? If so, set that bit in buf. */
|
||
for (i = 0; i < ports; i++) {
|
||
addr = &xhci->op_regs->port_status_base +
|
||
NUM_PORT_REGS*i;
|
||
temp = xhci_readl(xhci, addr);
|
||
if ((temp & mask) != 0 ||
|
||
(xhci->port_c_suspend[i >> 5] & 1 << (i & 31)) ||
|
||
(xhci->resume_done[i] && time_after_eq(
|
||
jiffies, xhci->resume_done[i]))) {
|
||
buf[(i + 1) / 8] |= 1 << (i + 1) % 8;
|
||
status = 1;
|
||
}
|
||
}
|
||
spin_unlock_irqrestore(&xhci->lock, flags);
|
||
return status ? retval : 0;
|
||
}
|
||
|
||
#ifdef CONFIG_PM
|
||
|
||
int xhci_bus_suspend(struct usb_hcd *hcd)
|
||
{
|
||
struct xhci_hcd *xhci = hcd_to_xhci(hcd);
|
||
int port;
|
||
unsigned long flags;
|
||
|
||
xhci_dbg(xhci, "suspend root hub\n");
|
||
|
||
spin_lock_irqsave(&xhci->lock, flags);
|
||
|
||
if (hcd->self.root_hub->do_remote_wakeup) {
|
||
port = HCS_MAX_PORTS(xhci->hcs_params1);
|
||
while (port--) {
|
||
if (xhci->resume_done[port] != 0) {
|
||
spin_unlock_irqrestore(&xhci->lock, flags);
|
||
xhci_dbg(xhci, "suspend failed because "
|
||
"port %d is resuming\n",
|
||
port + 1);
|
||
return -EBUSY;
|
||
}
|
||
}
|
||
}
|
||
|
||
port = HCS_MAX_PORTS(xhci->hcs_params1);
|
||
xhci->bus_suspended = 0;
|
||
while (port--) {
|
||
/* suspend the port if the port is not suspended */
|
||
u32 __iomem *addr;
|
||
u32 t1, t2;
|
||
int slot_id;
|
||
|
||
addr = &xhci->op_regs->port_status_base +
|
||
NUM_PORT_REGS * (port & 0xff);
|
||
t1 = xhci_readl(xhci, addr);
|
||
t2 = xhci_port_state_to_neutral(t1);
|
||
|
||
if ((t1 & PORT_PE) && !(t1 & PORT_PLS_MASK)) {
|
||
xhci_dbg(xhci, "port %d not suspended\n", port);
|
||
slot_id = xhci_find_slot_id_by_port(xhci, port + 1);
|
||
if (slot_id) {
|
||
spin_unlock_irqrestore(&xhci->lock, flags);
|
||
xhci_stop_device(xhci, slot_id, 1);
|
||
spin_lock_irqsave(&xhci->lock, flags);
|
||
}
|
||
t2 &= ~PORT_PLS_MASK;
|
||
t2 |= PORT_LINK_STROBE | XDEV_U3;
|
||
set_bit(port, &xhci->bus_suspended);
|
||
}
|
||
if (hcd->self.root_hub->do_remote_wakeup) {
|
||
if (t1 & PORT_CONNECT) {
|
||
t2 |= PORT_WKOC_E | PORT_WKDISC_E;
|
||
t2 &= ~PORT_WKCONN_E;
|
||
} else {
|
||
t2 |= PORT_WKOC_E | PORT_WKCONN_E;
|
||
t2 &= ~PORT_WKDISC_E;
|
||
}
|
||
} else
|
||
t2 &= ~PORT_WAKE_BITS;
|
||
|
||
t1 = xhci_port_state_to_neutral(t1);
|
||
if (t1 != t2)
|
||
xhci_writel(xhci, t2, addr);
|
||
|
||
if (DEV_HIGHSPEED(t1)) {
|
||
/* enable remote wake up for USB 2.0 */
|
||
u32 __iomem *addr;
|
||
u32 tmp;
|
||
|
||
addr = &xhci->op_regs->port_power_base +
|
||
NUM_PORT_REGS * (port & 0xff);
|
||
tmp = xhci_readl(xhci, addr);
|
||
tmp |= PORT_RWE;
|
||
xhci_writel(xhci, tmp, addr);
|
||
}
|
||
}
|
||
hcd->state = HC_STATE_SUSPENDED;
|
||
xhci->next_statechange = jiffies + msecs_to_jiffies(10);
|
||
spin_unlock_irqrestore(&xhci->lock, flags);
|
||
return 0;
|
||
}
|
||
|
||
int xhci_bus_resume(struct usb_hcd *hcd)
|
||
{
|
||
struct xhci_hcd *xhci = hcd_to_xhci(hcd);
|
||
int port;
|
||
u32 temp;
|
||
unsigned long flags;
|
||
|
||
xhci_dbg(xhci, "resume root hub\n");
|
||
|
||
if (time_before(jiffies, xhci->next_statechange))
|
||
msleep(5);
|
||
|
||
spin_lock_irqsave(&xhci->lock, flags);
|
||
if (!HCD_HW_ACCESSIBLE(hcd)) {
|
||
spin_unlock_irqrestore(&xhci->lock, flags);
|
||
return -ESHUTDOWN;
|
||
}
|
||
|
||
/* delay the irqs */
|
||
temp = xhci_readl(xhci, &xhci->op_regs->command);
|
||
temp &= ~CMD_EIE;
|
||
xhci_writel(xhci, temp, &xhci->op_regs->command);
|
||
|
||
port = HCS_MAX_PORTS(xhci->hcs_params1);
|
||
while (port--) {
|
||
/* Check whether need resume ports. If needed
|
||
resume port and disable remote wakeup */
|
||
u32 __iomem *addr;
|
||
u32 temp;
|
||
int slot_id;
|
||
|
||
addr = &xhci->op_regs->port_status_base +
|
||
NUM_PORT_REGS * (port & 0xff);
|
||
temp = xhci_readl(xhci, addr);
|
||
if (DEV_SUPERSPEED(temp))
|
||
temp &= ~(PORT_RWC_BITS | PORT_CEC | PORT_WAKE_BITS);
|
||
else
|
||
temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
|
||
if (test_bit(port, &xhci->bus_suspended) &&
|
||
(temp & PORT_PLS_MASK)) {
|
||
if (DEV_SUPERSPEED(temp)) {
|
||
temp = xhci_port_state_to_neutral(temp);
|
||
temp &= ~PORT_PLS_MASK;
|
||
temp |= PORT_LINK_STROBE | XDEV_U0;
|
||
xhci_writel(xhci, temp, addr);
|
||
} else {
|
||
temp = xhci_port_state_to_neutral(temp);
|
||
temp &= ~PORT_PLS_MASK;
|
||
temp |= PORT_LINK_STROBE | XDEV_RESUME;
|
||
xhci_writel(xhci, temp, addr);
|
||
|
||
spin_unlock_irqrestore(&xhci->lock, flags);
|
||
msleep(20);
|
||
spin_lock_irqsave(&xhci->lock, flags);
|
||
|
||
temp = xhci_readl(xhci, addr);
|
||
temp = xhci_port_state_to_neutral(temp);
|
||
temp &= ~PORT_PLS_MASK;
|
||
temp |= PORT_LINK_STROBE | XDEV_U0;
|
||
xhci_writel(xhci, temp, addr);
|
||
}
|
||
slot_id = xhci_find_slot_id_by_port(xhci, port + 1);
|
||
if (slot_id)
|
||
xhci_ring_device(xhci, slot_id);
|
||
} else
|
||
xhci_writel(xhci, temp, addr);
|
||
|
||
if (DEV_HIGHSPEED(temp)) {
|
||
/* disable remote wake up for USB 2.0 */
|
||
u32 __iomem *addr;
|
||
u32 tmp;
|
||
|
||
addr = &xhci->op_regs->port_power_base +
|
||
NUM_PORT_REGS * (port & 0xff);
|
||
tmp = xhci_readl(xhci, addr);
|
||
tmp &= ~PORT_RWE;
|
||
xhci_writel(xhci, tmp, addr);
|
||
}
|
||
}
|
||
|
||
(void) xhci_readl(xhci, &xhci->op_regs->command);
|
||
|
||
xhci->next_statechange = jiffies + msecs_to_jiffies(5);
|
||
hcd->state = HC_STATE_RUNNING;
|
||
/* re-enable irqs */
|
||
temp = xhci_readl(xhci, &xhci->op_regs->command);
|
||
temp |= CMD_EIE;
|
||
xhci_writel(xhci, temp, &xhci->op_regs->command);
|
||
temp = xhci_readl(xhci, &xhci->op_regs->command);
|
||
|
||
spin_unlock_irqrestore(&xhci->lock, flags);
|
||
return 0;
|
||
}
|
||
|
||
#endif /* CONFIG_PM */
|