253 lines
6.2 KiB
C
253 lines
6.2 KiB
C
/*
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* cardbus.c -- 16-bit PCMCIA core support
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* The initial developer of the original code is David A. Hinds
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* <dahinds@users.sourceforge.net>. Portions created by David A. Hinds
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* are Copyright (C) 1999 David A. Hinds. All Rights Reserved.
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*
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* (C) 1999 David A. Hinds
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*/
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/*
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* Cardbus handling has been re-written to be more of a PCI bridge thing,
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* and the PCI code basically does all the resource handling.
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*
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* Linus, Jan 2000
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/string.h>
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#include <linux/slab.h>
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#include <linux/mm.h>
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#include <linux/pci.h>
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#include <linux/ioport.h>
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#include <asm/irq.h>
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#include <asm/io.h>
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#include <pcmcia/cs_types.h>
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#include <pcmcia/ss.h>
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#include <pcmcia/cs.h>
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#include <pcmcia/cistpl.h>
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#include "cs_internal.h"
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/*====================================================================*/
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/* Offsets in the Expansion ROM Image Header */
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#define ROM_SIGNATURE 0x0000 /* 2 bytes */
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#define ROM_DATA_PTR 0x0018 /* 2 bytes */
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/* Offsets in the CardBus PC Card Data Structure */
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#define PCDATA_SIGNATURE 0x0000 /* 4 bytes */
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#define PCDATA_VPD_PTR 0x0008 /* 2 bytes */
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#define PCDATA_LENGTH 0x000a /* 2 bytes */
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#define PCDATA_REVISION 0x000c
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#define PCDATA_IMAGE_SZ 0x0010 /* 2 bytes */
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#define PCDATA_ROM_LEVEL 0x0012 /* 2 bytes */
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#define PCDATA_CODE_TYPE 0x0014
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#define PCDATA_INDICATOR 0x0015
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/*=====================================================================
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Expansion ROM's have a special layout, and pointers specify an
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image number and an offset within that image. xlate_rom_addr()
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converts an image/offset address to an absolute offset from the
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ROM's base address.
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=====================================================================*/
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static u_int xlate_rom_addr(void __iomem *b, u_int addr)
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{
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u_int img = 0, ofs = 0, sz;
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u_short data;
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while ((readb(b) == 0x55) && (readb(b + 1) == 0xaa)) {
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if (img == (addr >> 28))
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return (addr & 0x0fffffff) + ofs;
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data = readb(b + ROM_DATA_PTR) + (readb(b + ROM_DATA_PTR + 1) << 8);
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sz = 512 * (readb(b + data + PCDATA_IMAGE_SZ) +
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(readb(b + data + PCDATA_IMAGE_SZ + 1) << 8));
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if ((sz == 0) || (readb(b + data + PCDATA_INDICATOR) & 0x80))
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break;
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b += sz;
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ofs += sz;
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img++;
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}
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return 0;
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}
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/*=====================================================================
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These are similar to setup_cis_mem and release_cis_mem for 16-bit
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cards. The "result" that is used externally is the cb_cis_virt
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pointer in the struct pcmcia_socket structure.
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=====================================================================*/
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static void cb_release_cis_mem(struct pcmcia_socket * s)
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{
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if (s->cb_cis_virt) {
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cs_dbg(s, 1, "cb_release_cis_mem()\n");
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iounmap(s->cb_cis_virt);
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s->cb_cis_virt = NULL;
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s->cb_cis_res = NULL;
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}
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}
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static int cb_setup_cis_mem(struct pcmcia_socket * s, struct resource *res)
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{
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unsigned int start, size;
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if (res == s->cb_cis_res)
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return 0;
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if (s->cb_cis_res)
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cb_release_cis_mem(s);
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start = res->start;
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size = res->end - start + 1;
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s->cb_cis_virt = ioremap(start, size);
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if (!s->cb_cis_virt)
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return -1;
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s->cb_cis_res = res;
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return 0;
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}
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/*=====================================================================
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This is used by the CIS processing code to read CIS information
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from a CardBus device.
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=====================================================================*/
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int read_cb_mem(struct pcmcia_socket * s, int space, u_int addr, u_int len, void *ptr)
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{
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struct pci_dev *dev;
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struct resource *res;
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cs_dbg(s, 3, "read_cb_mem(%d, %#x, %u)\n", space, addr, len);
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dev = pci_get_slot(s->cb_dev->subordinate, 0);
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if (!dev)
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goto fail;
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/* Config space? */
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if (space == 0) {
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if (addr + len > 0x100)
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goto failput;
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for (; len; addr++, ptr++, len--)
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pci_read_config_byte(dev, addr, ptr);
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return 0;
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}
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res = dev->resource + space - 1;
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pci_dev_put(dev);
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if (!res->flags)
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goto fail;
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if (cb_setup_cis_mem(s, res) != 0)
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goto fail;
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if (space == 7) {
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addr = xlate_rom_addr(s->cb_cis_virt, addr);
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if (addr == 0)
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goto fail;
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}
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if (addr + len > res->end - res->start)
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goto fail;
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memcpy_fromio(ptr, s->cb_cis_virt + addr, len);
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return 0;
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failput:
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pci_dev_put(dev);
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fail:
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memset(ptr, 0xff, len);
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return -1;
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}
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/*=====================================================================
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cb_alloc() and cb_free() allocate and free the kernel data
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structures for a Cardbus device, and handle the lowest level PCI
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device setup issues.
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=====================================================================*/
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/*
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* Since there is only one interrupt available to CardBus
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* devices, all devices downstream of this device must
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* be using this IRQ.
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*/
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static void cardbus_assign_irqs(struct pci_bus *bus, int irq)
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{
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struct pci_dev *dev;
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list_for_each_entry(dev, &bus->devices, bus_list) {
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u8 irq_pin;
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pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &irq_pin);
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if (irq_pin) {
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dev->irq = irq;
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pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
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}
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if (dev->subordinate)
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cardbus_assign_irqs(dev->subordinate, irq);
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}
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}
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int __ref cb_alloc(struct pcmcia_socket * s)
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{
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struct pci_bus *bus = s->cb_dev->subordinate;
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struct pci_dev *dev;
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unsigned int max, pass;
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s->functions = pci_scan_slot(bus, PCI_DEVFN(0, 0));
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// pcibios_fixup_bus(bus);
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max = bus->secondary;
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for (pass = 0; pass < 2; pass++)
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list_for_each_entry(dev, &bus->devices, bus_list)
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if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
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dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
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max = pci_scan_bridge(bus, dev, max, pass);
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/*
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* Size all resources below the CardBus controller.
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*/
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pci_bus_size_bridges(bus);
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pci_bus_assign_resources(bus);
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cardbus_assign_irqs(bus, s->pci_irq);
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/* socket specific tune function */
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if (s->tune_bridge)
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s->tune_bridge(s, bus);
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pci_enable_bridges(bus);
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pci_bus_add_devices(bus);
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s->irq.AssignedIRQ = s->pci_irq;
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return 0;
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}
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void cb_free(struct pcmcia_socket * s)
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{
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struct pci_dev *bridge = s->cb_dev;
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cb_release_cis_mem(s);
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if (bridge)
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pci_remove_behind_bridge(bridge);
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}
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