57 lines
1.8 KiB
Plaintext
57 lines
1.8 KiB
Plaintext
* Marvell PXA GPIO controller
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Required properties:
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- compatible : Should be "intel,pxa25x-gpio", "intel,pxa26x-gpio",
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"intel,pxa27x-gpio", "intel,pxa3xx-gpio",
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"marvell,pxa93x-gpio", "marvell,mmp-gpio" or
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"marvell,mmp2-gpio".
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- reg : Address and length of the register set for the device
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- interrupts : Should be the port interrupt shared by all gpio pins.
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There're three gpio interrupts in arch-pxa, and they're gpio0,
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gpio1 and gpio_mux. There're only one gpio interrupt in arch-mmp,
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gpio_mux.
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- interrupt-names : Should be the names of irq resources. Each interrupt
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uses its own interrupt name, so there should be as many interrupt names
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as referenced interrups.
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- interrupt-controller : Identifies the node as an interrupt controller.
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- #interrupt-cells: Specifies the number of cells needed to encode an
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interrupt source.
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- gpio-controller : Marks the device node as a gpio controller.
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- #gpio-cells : Should be one. It is the pin number.
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Example:
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gpio: gpio@d4019000 {
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compatible = "marvell,mmp-gpio";
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reg = <0xd4019000 0x1000>;
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interrupts = <49>;
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interrupt-names = "gpio_mux";
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gpio-controller;
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#gpio-cells = <1>;
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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* Marvell Orion GPIO Controller
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Required properties:
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- compatible : Should be "marvell,orion-gpio"
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- reg : Address and length of the register set for controller.
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- gpio-controller : So we know this is a gpio controller.
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- ngpio : How many gpios this controller has.
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- interrupts : Up to 4 Interrupts for the controller.
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Optional properties:
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- mask-offset : For SMP Orions, offset for Nth CPU
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Example:
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gpio0: gpio@10100 {
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compatible = "marvell,orion-gpio";
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#gpio-cells = <2>;
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gpio-controller;
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reg = <0x10100 0x40>;
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ngpio = <32>;
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interrupts = <35>, <36>, <37>, <38>;
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};
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