101 lines
2.5 KiB
C
101 lines
2.5 KiB
C
/* exynos_drm.h
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*
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* Copyright (c) 2011 Samsung Electronics Co., Ltd.
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* Authors:
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* Inki Dae <inki.dae@samsung.com>
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* Joonyoung Shim <jy0922.shim@samsung.com>
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* Seung-Woo Kim <sw0312.kim@samsung.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#ifndef _EXYNOS_DRM_H_
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#define _EXYNOS_DRM_H_
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#include <uapi/drm/exynos_drm.h>
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/**
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* A structure for lcd panel information.
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*
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* @timing: default video mode for initializing
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* @width_mm: physical size of lcd width.
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* @height_mm: physical size of lcd height.
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*/
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struct exynos_drm_panel_info {
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struct fb_videomode timing;
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u32 width_mm;
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u32 height_mm;
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};
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/**
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* Platform Specific Structure for DRM based FIMD.
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*
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* @panel: default panel info for initializing
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* @default_win: default window layer number to be used for UI.
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* @bpp: default bit per pixel.
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*/
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struct exynos_drm_fimd_pdata {
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struct exynos_drm_panel_info panel;
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u32 vidcon0;
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u32 vidcon1;
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unsigned int default_win;
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unsigned int bpp;
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};
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/**
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* Platform Specific Structure for DRM based HDMI.
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*
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* @hdmi_dev: device point to specific hdmi driver.
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* @mixer_dev: device point to specific mixer driver.
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*
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* this structure is used for common hdmi driver and each device object
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* would be used to access specific device driver(hdmi or mixer driver)
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*/
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struct exynos_drm_common_hdmi_pd {
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struct device *hdmi_dev;
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struct device *mixer_dev;
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};
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/**
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* Platform Specific Structure for DRM based HDMI core.
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*
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* @is_v13: set if hdmi version 13 is.
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* @cfg_hpd: function pointer to configure hdmi hotplug detection pin
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* @get_hpd: function pointer to get value of hdmi hotplug detection pin
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*/
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struct exynos_drm_hdmi_pdata {
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bool is_v13;
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void (*cfg_hpd)(bool external);
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int (*get_hpd)(void);
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};
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/**
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* Platform Specific Structure for DRM based IPP.
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*
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* @inv_pclk: if set 1. invert pixel clock
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* @inv_vsync: if set 1. invert vsync signal for wb
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* @inv_href: if set 1. invert href signal
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* @inv_hsync: if set 1. invert hsync signal for wb
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*/
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struct exynos_drm_ipp_pol {
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unsigned int inv_pclk;
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unsigned int inv_vsync;
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unsigned int inv_href;
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unsigned int inv_hsync;
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};
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/**
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* Platform Specific Structure for DRM based FIMC.
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*
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* @pol: current hardware block polarity settings.
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* @clk_rate: current hardware clock rate.
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*/
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struct exynos_drm_fimc_pdata {
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struct exynos_drm_ipp_pol pol;
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int clk_rate;
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};
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#endif /* _EXYNOS_DRM_H_ */
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