154 lines
3.9 KiB
Ucode
154 lines
3.9 KiB
Ucode
/* -----------------------------------------------------------------------
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*
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* neon.uc - RAID-6 syndrome calculation using ARM NEON instructions
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*
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* Copyright (C) 2012 Rob Herring
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* Copyright (C) 2015 Linaro Ltd. <ard.biesheuvel@linaro.org>
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*
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* Based on altivec.uc:
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* Copyright 2002-2004 H. Peter Anvin - All Rights Reserved
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, Inc., 53 Temple Place Ste 330,
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* Boston MA 02111-1307, USA; either version 2 of the License, or
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* (at your option) any later version; incorporated herein by reference.
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*
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* ----------------------------------------------------------------------- */
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/*
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* neon$#.c
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*
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* $#-way unrolled NEON intrinsics math RAID-6 instruction set
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*
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* This file is postprocessed using unroll.awk
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*/
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#include <arm_neon.h>
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typedef uint8x16_t unative_t;
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#define NBYTES(x) ((unative_t){x,x,x,x, x,x,x,x, x,x,x,x, x,x,x,x})
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#define NSIZE sizeof(unative_t)
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/*
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* The SHLBYTE() operation shifts each byte left by 1, *not*
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* rolling over into the next byte
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*/
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static inline unative_t SHLBYTE(unative_t v)
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{
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return vshlq_n_u8(v, 1);
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}
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/*
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* The MASK() operation returns 0xFF in any byte for which the high
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* bit is 1, 0x00 for any byte for which the high bit is 0.
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*/
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static inline unative_t MASK(unative_t v)
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{
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return (unative_t)vshrq_n_s8((int8x16_t)v, 7);
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}
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static inline unative_t PMUL(unative_t v, unative_t u)
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{
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return (unative_t)vmulq_p8((poly8x16_t)v, (poly8x16_t)u);
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}
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void raid6_neon$#_gen_syndrome_real(int disks, unsigned long bytes, void **ptrs)
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{
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uint8_t **dptr = (uint8_t **)ptrs;
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uint8_t *p, *q;
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int d, z, z0;
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register unative_t wd$$, wq$$, wp$$, w1$$, w2$$;
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const unative_t x1d = NBYTES(0x1d);
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z0 = disks - 3; /* Highest data disk */
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p = dptr[z0+1]; /* XOR parity */
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q = dptr[z0+2]; /* RS syndrome */
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for ( d = 0 ; d < bytes ; d += NSIZE*$# ) {
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wq$$ = wp$$ = vld1q_u8(&dptr[z0][d+$$*NSIZE]);
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for ( z = z0-1 ; z >= 0 ; z-- ) {
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wd$$ = vld1q_u8(&dptr[z][d+$$*NSIZE]);
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wp$$ = veorq_u8(wp$$, wd$$);
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w2$$ = MASK(wq$$);
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w1$$ = SHLBYTE(wq$$);
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w2$$ = vandq_u8(w2$$, x1d);
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w1$$ = veorq_u8(w1$$, w2$$);
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wq$$ = veorq_u8(w1$$, wd$$);
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}
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vst1q_u8(&p[d+NSIZE*$$], wp$$);
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vst1q_u8(&q[d+NSIZE*$$], wq$$);
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}
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}
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void raid6_neon$#_xor_syndrome_real(int disks, int start, int stop,
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unsigned long bytes, void **ptrs)
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{
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uint8_t **dptr = (uint8_t **)ptrs;
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uint8_t *p, *q;
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int d, z, z0;
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register unative_t wd$$, wq$$, wp$$, w1$$, w2$$;
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const unative_t x1d = NBYTES(0x1d);
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z0 = stop; /* P/Q right side optimization */
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p = dptr[disks-2]; /* XOR parity */
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q = dptr[disks-1]; /* RS syndrome */
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for ( d = 0 ; d < bytes ; d += NSIZE*$# ) {
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wq$$ = vld1q_u8(&dptr[z0][d+$$*NSIZE]);
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wp$$ = veorq_u8(vld1q_u8(&p[d+$$*NSIZE]), wq$$);
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/* P/Q data pages */
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for ( z = z0-1 ; z >= start ; z-- ) {
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wd$$ = vld1q_u8(&dptr[z][d+$$*NSIZE]);
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wp$$ = veorq_u8(wp$$, wd$$);
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w2$$ = MASK(wq$$);
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w1$$ = SHLBYTE(wq$$);
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w2$$ = vandq_u8(w2$$, x1d);
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w1$$ = veorq_u8(w1$$, w2$$);
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wq$$ = veorq_u8(w1$$, wd$$);
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}
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/* P/Q left side optimization */
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for ( z = start-1 ; z >= 3 ; z -= 4 ) {
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w2$$ = vshrq_n_u8(wq$$, 4);
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w1$$ = vshlq_n_u8(wq$$, 4);
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w2$$ = PMUL(w2$$, x1d);
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wq$$ = veorq_u8(w1$$, w2$$);
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}
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switch (z) {
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case 2:
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w2$$ = vshrq_n_u8(wq$$, 5);
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w1$$ = vshlq_n_u8(wq$$, 3);
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w2$$ = PMUL(w2$$, x1d);
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wq$$ = veorq_u8(w1$$, w2$$);
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break;
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case 1:
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w2$$ = vshrq_n_u8(wq$$, 6);
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w1$$ = vshlq_n_u8(wq$$, 2);
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w2$$ = PMUL(w2$$, x1d);
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wq$$ = veorq_u8(w1$$, w2$$);
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break;
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case 0:
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w2$$ = MASK(wq$$);
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w1$$ = SHLBYTE(wq$$);
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w2$$ = vandq_u8(w2$$, x1d);
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wq$$ = veorq_u8(w1$$, w2$$);
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}
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w1$$ = vld1q_u8(&q[d+NSIZE*$$]);
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wq$$ = veorq_u8(wq$$, w1$$);
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vst1q_u8(&p[d+NSIZE*$$], wp$$);
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vst1q_u8(&q[d+NSIZE*$$], wq$$);
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}
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}
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