281 lines
7.0 KiB
C
281 lines
7.0 KiB
C
/*
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* drivers/net/gianfar_mii.c
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*
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* Gianfar Ethernet Driver -- MIIM bus implementation
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* Provides Bus interface for MIIM regs
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*
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* Author: Andy Fleming
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* Maintainer: Kumar Gala
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*
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* Copyright (c) 2002-2004 Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/string.h>
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#include <linux/errno.h>
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#include <linux/unistd.h>
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#include <linux/slab.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include <linux/skbuff.h>
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#include <linux/spinlock.h>
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#include <linux/mm.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/crc32.h>
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#include <linux/mii.h>
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#include <linux/phy.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/uaccess.h>
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#include "gianfar.h"
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#include "gianfar_mii.h"
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/*
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* Write value to the PHY at mii_id at register regnum,
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* on the bus attached to the local interface, which may be different from the
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* generic mdio bus (tied to a single interface), waiting until the write is
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* done before returning. This is helpful in programming interfaces like
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* the TBI which control interfaces like onchip SERDES and are always tied to
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* the local mdio pins, which may not be the same as system mdio bus, used for
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* controlling the external PHYs, for example.
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*/
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int gfar_local_mdio_write(struct gfar_mii __iomem *regs, int mii_id,
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int regnum, u16 value)
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{
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/* Set the PHY address and the register address we want to write */
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gfar_write(®s->miimadd, (mii_id << 8) | regnum);
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/* Write out the value we want */
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gfar_write(®s->miimcon, value);
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/* Wait for the transaction to finish */
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while (gfar_read(®s->miimind) & MIIMIND_BUSY)
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cpu_relax();
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return 0;
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}
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/*
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* Read the bus for PHY at addr mii_id, register regnum, and
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* return the value. Clears miimcom first. All PHY operation
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* done on the bus attached to the local interface,
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* which may be different from the generic mdio bus
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* This is helpful in programming interfaces like
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* the TBI which, inturn, control interfaces like onchip SERDES
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* and are always tied to the local mdio pins, which may not be the
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* same as system mdio bus, used for controlling the external PHYs, for eg.
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*/
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int gfar_local_mdio_read(struct gfar_mii __iomem *regs, int mii_id, int regnum)
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{
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u16 value;
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/* Set the PHY address and the register address we want to read */
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gfar_write(®s->miimadd, (mii_id << 8) | regnum);
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/* Clear miimcom, and then initiate a read */
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gfar_write(®s->miimcom, 0);
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gfar_write(®s->miimcom, MII_READ_COMMAND);
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/* Wait for the transaction to finish */
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while (gfar_read(®s->miimind) & (MIIMIND_NOTVALID | MIIMIND_BUSY))
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cpu_relax();
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/* Grab the value of the register from miimstat */
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value = gfar_read(®s->miimstat);
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return value;
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}
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/* Write value to the PHY at mii_id at register regnum,
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* on the bus, waiting until the write is done before returning.
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* All PHY configuration is done through the TSEC1 MIIM regs */
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int gfar_mdio_write(struct mii_bus *bus, int mii_id, int regnum, u16 value)
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{
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struct gfar_mii __iomem *regs = (void __iomem *)bus->priv;
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/* Write to the local MII regs */
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return(gfar_local_mdio_write(regs, mii_id, regnum, value));
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}
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/* Read the bus for PHY at addr mii_id, register regnum, and
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* return the value. Clears miimcom first. All PHY
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* configuration has to be done through the TSEC1 MIIM regs */
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int gfar_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
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{
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struct gfar_mii __iomem *regs = (void __iomem *)bus->priv;
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/* Read the local MII regs */
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return(gfar_local_mdio_read(regs, mii_id, regnum));
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}
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/* Reset the MIIM registers, and wait for the bus to free */
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static int gfar_mdio_reset(struct mii_bus *bus)
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{
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struct gfar_mii __iomem *regs = (void __iomem *)bus->priv;
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unsigned int timeout = PHY_INIT_TIMEOUT;
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mutex_lock(&bus->mdio_lock);
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/* Reset the management interface */
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gfar_write(®s->miimcfg, MIIMCFG_RESET);
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/* Setup the MII Mgmt clock speed */
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gfar_write(®s->miimcfg, MIIMCFG_INIT_VALUE);
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/* Wait until the bus is free */
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while ((gfar_read(®s->miimind) & MIIMIND_BUSY) &&
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--timeout)
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cpu_relax();
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mutex_unlock(&bus->mdio_lock);
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if(timeout == 0) {
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printk(KERN_ERR "%s: The MII Bus is stuck!\n",
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bus->name);
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return -EBUSY;
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}
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return 0;
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}
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static int gfar_mdio_probe(struct device *dev)
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{
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struct platform_device *pdev = to_platform_device(dev);
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struct gianfar_mdio_data *pdata;
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struct gfar_mii __iomem *regs;
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struct gfar __iomem *enet_regs;
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struct mii_bus *new_bus;
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struct resource *r;
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int i, err = 0;
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if (NULL == dev)
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return -EINVAL;
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new_bus = mdiobus_alloc();
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if (NULL == new_bus)
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return -ENOMEM;
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new_bus->name = "Gianfar MII Bus",
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new_bus->read = &gfar_mdio_read,
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new_bus->write = &gfar_mdio_write,
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new_bus->reset = &gfar_mdio_reset,
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snprintf(new_bus->id, MII_BUS_ID_SIZE, "%x", pdev->id);
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pdata = (struct gianfar_mdio_data *)pdev->dev.platform_data;
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if (NULL == pdata) {
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printk(KERN_ERR "gfar mdio %d: Missing platform data!\n", pdev->id);
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return -ENODEV;
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}
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r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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/* Set the PHY base address */
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regs = ioremap(r->start, sizeof (struct gfar_mii));
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if (NULL == regs) {
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err = -ENOMEM;
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goto reg_map_fail;
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}
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new_bus->priv = (void __force *)regs;
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new_bus->irq = pdata->irq;
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new_bus->parent = dev;
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dev_set_drvdata(dev, new_bus);
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/*
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* This is mildly evil, but so is our hardware for doing this.
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* Also, we have to cast back to struct gfar_mii because of
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* definition weirdness done in gianfar.h.
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*/
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enet_regs = (struct gfar __iomem *)
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((char *)regs - offsetof(struct gfar, gfar_mii_regs));
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/* Scan the bus, looking for an empty spot for TBIPA */
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gfar_write(&enet_regs->tbipa, 0);
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for (i = PHY_MAX_ADDR; i > 0; i--) {
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u32 phy_id;
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err = get_phy_id(new_bus, i, &phy_id);
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if (err)
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goto bus_register_fail;
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if (phy_id == 0xffffffff)
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break;
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}
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/* The bus is full. We don't support using 31 PHYs, sorry */
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if (i == 0) {
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err = -EBUSY;
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goto bus_register_fail;
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}
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gfar_write(&enet_regs->tbipa, i);
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err = mdiobus_register(new_bus);
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if (0 != err) {
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printk (KERN_ERR "%s: Cannot register as MDIO bus\n",
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new_bus->name);
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goto bus_register_fail;
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}
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return 0;
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bus_register_fail:
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iounmap(regs);
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reg_map_fail:
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mdiobus_free(new_bus);
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return err;
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}
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static int gfar_mdio_remove(struct device *dev)
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{
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struct mii_bus *bus = dev_get_drvdata(dev);
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mdiobus_unregister(bus);
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dev_set_drvdata(dev, NULL);
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iounmap((void __iomem *)bus->priv);
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bus->priv = NULL;
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mdiobus_free(bus);
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return 0;
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}
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static struct device_driver gianfar_mdio_driver = {
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.name = "fsl-gianfar_mdio",
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.bus = &platform_bus_type,
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.probe = gfar_mdio_probe,
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.remove = gfar_mdio_remove,
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};
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int __init gfar_mdio_init(void)
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{
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return driver_register(&gianfar_mdio_driver);
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}
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void gfar_mdio_exit(void)
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{
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driver_unregister(&gianfar_mdio_driver);
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}
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