242 lines
7.3 KiB
C
242 lines
7.3 KiB
C
/*
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* arch/arm/plat-nomadik/include/plat/ste_dma40.h
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*
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* Copyright (C) ST-Ericsson 2007-2010
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* License terms: GNU General Public License (GPL) version 2
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* Author: Per Friden <per.friden@stericsson.com>
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* Author: Jonas Aaberg <jonas.aberg@stericsson.com>
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*/
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#ifndef STE_DMA40_H
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#define STE_DMA40_H
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#include <linux/dmaengine.h>
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#include <linux/workqueue.h>
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#include <linux/interrupt.h>
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#include <linux/dmaengine.h>
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/* dev types for memcpy */
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#define STEDMA40_DEV_DST_MEMORY (-1)
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#define STEDMA40_DEV_SRC_MEMORY (-1)
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/*
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* Description of bitfields of channel_type variable is available in
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* the info structure.
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*/
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/* Priority */
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#define STEDMA40_INFO_PRIO_TYPE_POS 2
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#define STEDMA40_HIGH_PRIORITY_CHANNEL (0x1 << STEDMA40_INFO_PRIO_TYPE_POS)
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#define STEDMA40_LOW_PRIORITY_CHANNEL (0x2 << STEDMA40_INFO_PRIO_TYPE_POS)
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/* Mode */
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#define STEDMA40_INFO_CH_MODE_TYPE_POS 6
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#define STEDMA40_CHANNEL_IN_PHY_MODE (0x1 << STEDMA40_INFO_CH_MODE_TYPE_POS)
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#define STEDMA40_CHANNEL_IN_LOG_MODE (0x2 << STEDMA40_INFO_CH_MODE_TYPE_POS)
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#define STEDMA40_CHANNEL_IN_OPER_MODE (0x3 << STEDMA40_INFO_CH_MODE_TYPE_POS)
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/* Mode options */
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#define STEDMA40_INFO_CH_MODE_OPT_POS 8
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#define STEDMA40_PCHAN_BASIC_MODE (0x1 << STEDMA40_INFO_CH_MODE_OPT_POS)
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#define STEDMA40_PCHAN_MODULO_MODE (0x2 << STEDMA40_INFO_CH_MODE_OPT_POS)
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#define STEDMA40_PCHAN_DOUBLE_DST_MODE (0x3 << STEDMA40_INFO_CH_MODE_OPT_POS)
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#define STEDMA40_LCHAN_SRC_PHY_DST_LOG (0x1 << STEDMA40_INFO_CH_MODE_OPT_POS)
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#define STEDMA40_LCHAN_SRC_LOG_DST_PHS (0x2 << STEDMA40_INFO_CH_MODE_OPT_POS)
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#define STEDMA40_LCHAN_SRC_LOG_DST_LOG (0x3 << STEDMA40_INFO_CH_MODE_OPT_POS)
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/* Interrupt */
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#define STEDMA40_INFO_TIM_POS 10
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#define STEDMA40_NO_TIM_FOR_LINK (0x0 << STEDMA40_INFO_TIM_POS)
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#define STEDMA40_TIM_FOR_LINK (0x1 << STEDMA40_INFO_TIM_POS)
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/* End of channel_type configuration */
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#define STEDMA40_ESIZE_8_BIT 0x0
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#define STEDMA40_ESIZE_16_BIT 0x1
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#define STEDMA40_ESIZE_32_BIT 0x2
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#define STEDMA40_ESIZE_64_BIT 0x3
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/* The value 4 indicates that PEN-reg shall be set to 0 */
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#define STEDMA40_PSIZE_PHY_1 0x4
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#define STEDMA40_PSIZE_PHY_2 0x0
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#define STEDMA40_PSIZE_PHY_4 0x1
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#define STEDMA40_PSIZE_PHY_8 0x2
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#define STEDMA40_PSIZE_PHY_16 0x3
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/*
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* The number of elements differ in logical and
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* physical mode
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*/
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#define STEDMA40_PSIZE_LOG_1 STEDMA40_PSIZE_PHY_2
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#define STEDMA40_PSIZE_LOG_4 STEDMA40_PSIZE_PHY_4
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#define STEDMA40_PSIZE_LOG_8 STEDMA40_PSIZE_PHY_8
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#define STEDMA40_PSIZE_LOG_16 STEDMA40_PSIZE_PHY_16
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enum stedma40_flow_ctrl {
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STEDMA40_NO_FLOW_CTRL,
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STEDMA40_FLOW_CTRL,
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};
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enum stedma40_endianess {
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STEDMA40_LITTLE_ENDIAN,
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STEDMA40_BIG_ENDIAN
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};
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enum stedma40_periph_data_width {
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STEDMA40_BYTE_WIDTH = STEDMA40_ESIZE_8_BIT,
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STEDMA40_HALFWORD_WIDTH = STEDMA40_ESIZE_16_BIT,
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STEDMA40_WORD_WIDTH = STEDMA40_ESIZE_32_BIT,
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STEDMA40_DOUBLEWORD_WIDTH = STEDMA40_ESIZE_64_BIT
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};
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struct stedma40_half_channel_info {
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enum stedma40_endianess endianess;
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enum stedma40_periph_data_width data_width;
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int psize;
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enum stedma40_flow_ctrl flow_ctrl;
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};
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enum stedma40_xfer_dir {
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STEDMA40_MEM_TO_MEM,
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STEDMA40_MEM_TO_PERIPH,
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STEDMA40_PERIPH_TO_MEM,
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STEDMA40_PERIPH_TO_PERIPH
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};
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/**
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* struct stedma40_chan_cfg - Structure to be filled by client drivers.
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*
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* @dir: MEM 2 MEM, PERIPH 2 MEM , MEM 2 PERIPH, PERIPH 2 PERIPH
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* @channel_type: priority, mode, mode options and interrupt configuration.
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* @src_dev_type: Src device type
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* @dst_dev_type: Dst device type
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* @src_info: Parameters for dst half channel
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* @dst_info: Parameters for dst half channel
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* @pre_transfer_data: Data to be passed on to the pre_transfer() function.
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* @pre_transfer: Callback used if needed before preparation of transfer.
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* Only called if device is set. size of bytes to transfer
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* (in case of multiple element transfer size is size of the first element).
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*
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*
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* This structure has to be filled by the client drivers.
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* It is recommended to do all dma configurations for clients in the machine.
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*
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*/
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struct stedma40_chan_cfg {
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enum stedma40_xfer_dir dir;
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unsigned int channel_type;
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int src_dev_type;
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int dst_dev_type;
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struct stedma40_half_channel_info src_info;
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struct stedma40_half_channel_info dst_info;
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void *pre_transfer_data;
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int (*pre_transfer) (struct dma_chan *chan,
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void *data,
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int size);
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};
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/**
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* struct stedma40_platform_data - Configuration struct for the dma device.
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*
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* @dev_len: length of dev_tx and dev_rx
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* @dev_tx: mapping between destination event line and io address
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* @dev_rx: mapping between source event line and io address
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* @memcpy: list of memcpy event lines
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* @memcpy_len: length of memcpy
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* @memcpy_conf_phy: default configuration of physical channel memcpy
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* @memcpy_conf_log: default configuration of logical channel memcpy
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* @llis_per_log: number of max linked list items per logical channel
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* @disabled_channels: A vector, ending with -1, that marks physical channels
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* that are for different reasons not available for the driver.
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*/
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struct stedma40_platform_data {
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u32 dev_len;
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const dma_addr_t *dev_tx;
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const dma_addr_t *dev_rx;
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int *memcpy;
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u32 memcpy_len;
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struct stedma40_chan_cfg *memcpy_conf_phy;
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struct stedma40_chan_cfg *memcpy_conf_log;
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unsigned int llis_per_log;
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int disabled_channels[8];
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};
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/**
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* setdma40_set_psize() - Used for changing the package size of an
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* already configured dma channel.
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*
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* @chan: dmaengine handle
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* @src_psize: new package side for src. (STEDMA40_PSIZE*)
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* @src_psize: new package side for dst. (STEDMA40_PSIZE*)
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*
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* returns 0 on ok, otherwise negative error number.
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*/
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int stedma40_set_psize(struct dma_chan *chan,
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int src_psize,
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int dst_psize);
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/**
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* stedma40_filter() - Provides stedma40_chan_cfg to the
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* ste_dma40 dma driver via the dmaengine framework.
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* does some checking of what's provided.
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*
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* Never directly called by client. It used by dmaengine.
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* @chan: dmaengine handle.
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* @data: Must be of type: struct stedma40_chan_cfg and is
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* the configuration of the framework.
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*
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*
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*/
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bool stedma40_filter(struct dma_chan *chan, void *data);
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/**
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* stedma40_memcpy_sg() - extension of the dma framework, memcpy to/from
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* scattergatter lists.
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*
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* @chan: dmaengine handle
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* @sgl_dst: Destination scatter list
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* @sgl_src: Source scatter list
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* @sgl_len: The length of each scatterlist. Both lists must be of equal length
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* and each element must match the corresponding element in the other scatter
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* list.
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* @flags: is actually enum dma_ctrl_flags. See dmaengine.h
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*/
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struct dma_async_tx_descriptor *stedma40_memcpy_sg(struct dma_chan *chan,
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struct scatterlist *sgl_dst,
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struct scatterlist *sgl_src,
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unsigned int sgl_len,
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unsigned long flags);
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/**
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* stedma40_slave_mem() - Transfers a raw data buffer to or from a slave
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* (=device)
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*
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* @chan: dmaengine handle
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* @addr: source or destination physicall address.
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* @size: bytes to transfer
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* @direction: direction of transfer
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* @flags: is actually enum dma_ctrl_flags. See dmaengine.h
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*/
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static inline struct
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dma_async_tx_descriptor *stedma40_slave_mem(struct dma_chan *chan,
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dma_addr_t addr,
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unsigned int size,
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enum dma_data_direction direction,
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unsigned long flags)
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{
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struct scatterlist sg;
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sg_init_table(&sg, 1);
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sg.dma_address = addr;
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sg.length = size;
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return chan->device->device_prep_slave_sg(chan, &sg, 1,
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direction, flags);
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}
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#endif
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