469 lines
20 KiB
C
469 lines
20 KiB
C
/*
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* Marvell Armada XP pinctrl driver based on mvebu pinctrl core
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*
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* Copyright (C) 2012 Marvell
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*
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* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This file supports the three variants of Armada XP SoCs that are
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* available: mv78230, mv78260 and mv78460. From a pin muxing
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* perspective, the mv78230 has 49 MPP pins. The mv78260 and mv78460
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* both have 67 MPP pins (more GPIOs and address lines for the memory
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* bus mainly). The only difference between the mv78260 and the
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* mv78460 in terms of pin muxing is the addition of two functions on
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* pins 43 and 56 to access the VDD of the CPU2 and 3 (mv78260 has two
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* cores, mv78460 has four cores).
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*/
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#include <linux/err.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/clk.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/bitops.h>
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#include "pinctrl-mvebu.h"
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enum armada_xp_variant {
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V_MV78230 = BIT(0),
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V_MV78260 = BIT(1),
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V_MV78460 = BIT(2),
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V_MV78230_PLUS = (V_MV78230 | V_MV78260 | V_MV78460),
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V_MV78260_PLUS = (V_MV78260 | V_MV78460),
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};
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static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
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MPP_MODE(0,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x1, "ge0", "txclko", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x4, "lcd", "d0", V_MV78230_PLUS)),
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MPP_MODE(1,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x1, "ge0", "txd0", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x4, "lcd", "d1", V_MV78230_PLUS)),
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MPP_MODE(2,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x1, "ge0", "txd1", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x4, "lcd", "d2", V_MV78230_PLUS)),
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MPP_MODE(3,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x1, "ge0", "txd2", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x4, "lcd", "d3", V_MV78230_PLUS)),
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MPP_MODE(4,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x1, "ge0", "txd3", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x4, "lcd", "d4", V_MV78230_PLUS)),
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MPP_MODE(5,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x1, "ge0", "txctl", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x4, "lcd", "d5", V_MV78230_PLUS)),
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MPP_MODE(6,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x1, "ge0", "rxd0", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x4, "lcd", "d6", V_MV78230_PLUS)),
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MPP_MODE(7,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x1, "ge0", "rxd1", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x4, "lcd", "d7", V_MV78230_PLUS)),
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MPP_MODE(8,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x1, "ge0", "rxd2", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x4, "lcd", "d8", V_MV78230_PLUS)),
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MPP_MODE(9,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x1, "ge0", "rxd3", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x4, "lcd", "d9", V_MV78230_PLUS)),
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MPP_MODE(10,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x1, "ge0", "rxctl", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x4, "lcd", "d10", V_MV78230_PLUS)),
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MPP_MODE(11,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x1, "ge0", "rxclk", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x4, "lcd", "d11", V_MV78230_PLUS)),
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MPP_MODE(12,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x1, "ge0", "txd4", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x2, "ge1", "clkout", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x4, "lcd", "d12", V_MV78230_PLUS)),
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MPP_MODE(13,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x1, "ge0", "txd5", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x2, "ge1", "txd0", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x4, "lcd", "d13", V_MV78230_PLUS)),
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MPP_MODE(14,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x1, "ge0", "txd6", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x2, "ge1", "txd1", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x4, "lcd", "d14", V_MV78230_PLUS)),
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MPP_MODE(15,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x1, "ge0", "txd7", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x2, "ge1", "txd2", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x4, "lcd", "d15", V_MV78230_PLUS)),
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MPP_MODE(16,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x1, "ge0", "txclk", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x2, "ge1", "txd3", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x4, "lcd", "d16", V_MV78230_PLUS)),
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MPP_MODE(17,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x1, "ge0", "col", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x2, "ge1", "txctl", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x4, "lcd", "d17", V_MV78230_PLUS)),
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MPP_MODE(18,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x1, "ge0", "rxerr", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x2, "ge1", "rxd0", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x3, "ptp", "trig", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x4, "lcd", "d18", V_MV78230_PLUS)),
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MPP_MODE(19,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x1, "ge0", "crs", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x2, "ge1", "rxd1", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x3, "ptp", "evreq", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x4, "lcd", "d19", V_MV78230_PLUS)),
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MPP_MODE(20,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x1, "ge0", "rxd4", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x2, "ge1", "rxd2", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x3, "ptp", "clk", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x4, "lcd", "d20", V_MV78230_PLUS)),
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MPP_MODE(21,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x1, "ge0", "rxd5", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x2, "ge1", "rxd3", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x3, "mem", "bat", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x4, "lcd", "d21", V_MV78230_PLUS)),
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MPP_MODE(22,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x1, "ge0", "rxd6", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x2, "ge1", "rxctl", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x3, "sata0", "prsnt", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x4, "lcd", "d22", V_MV78230_PLUS)),
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MPP_MODE(23,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x1, "ge0", "rxd7", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x2, "ge1", "rxclk", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x3, "sata1", "prsnt", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x4, "lcd", "d23", V_MV78230_PLUS)),
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MPP_MODE(24,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x1, "sata1", "prsnt", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x2, "nf", "bootcs-re", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x3, "tdm", "rst", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x4, "lcd", "hsync", V_MV78230_PLUS)),
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MPP_MODE(25,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x1, "sata0", "prsnt", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x2, "nf", "bootcs-we", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x3, "tdm", "pclk", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x4, "lcd", "vsync", V_MV78230_PLUS)),
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MPP_MODE(26,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x3, "tdm", "fsync", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x4, "lcd", "clk", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x5, "vdd", "cpu1-pd", V_MV78230_PLUS)),
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MPP_MODE(27,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x1, "ptp", "trig", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x3, "tdm", "dtx", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x4, "lcd", "e", V_MV78230_PLUS)),
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MPP_MODE(28,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x1, "ptp", "evreq", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x3, "tdm", "drx", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x4, "lcd", "pwm", V_MV78230_PLUS)),
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MPP_MODE(29,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x1, "ptp", "clk", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x3, "tdm", "int0", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x4, "lcd", "ref-clk", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x5, "vdd", "cpu0-pd", V_MV78230_PLUS)),
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MPP_MODE(30,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x1, "sd0", "clk", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x3, "tdm", "int1", V_MV78230_PLUS)),
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MPP_MODE(31,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x1, "sd0", "cmd", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x3, "tdm", "int2", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x5, "vdd", "cpu0-pd", V_MV78230_PLUS)),
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MPP_MODE(32,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x1, "sd0", "d0", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x3, "tdm", "int3", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x5, "vdd", "cpu1-pd", V_MV78230_PLUS)),
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MPP_MODE(33,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x1, "sd0", "d1", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x3, "tdm", "int4", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x4, "mem", "bat", V_MV78230_PLUS)),
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MPP_MODE(34,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x1, "sd0", "d2", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x2, "sata0", "prsnt", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x3, "tdm", "int5", V_MV78230_PLUS)),
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MPP_MODE(35,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x1, "sd0", "d3", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x2, "sata1", "prsnt", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x3, "tdm", "int6", V_MV78230_PLUS)),
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MPP_MODE(36,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x1, "spi", "mosi", V_MV78230_PLUS)),
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MPP_MODE(37,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x1, "spi", "miso", V_MV78230_PLUS)),
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MPP_MODE(38,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x1, "spi", "sck", V_MV78230_PLUS)),
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MPP_MODE(39,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x1, "spi", "cs0", V_MV78230_PLUS)),
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MPP_MODE(40,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x1, "spi", "cs1", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x2, "uart2", "cts", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x3, "vdd", "cpu1-pd", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x4, "lcd", "vga-hsync", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x5, "pcie", "clkreq0", V_MV78230_PLUS)),
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MPP_MODE(41,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x1, "spi", "cs2", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x2, "uart2", "rts", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x3, "sata1", "prsnt", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x4, "lcd", "vga-vsync", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x5, "pcie", "clkreq1", V_MV78230_PLUS)),
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MPP_MODE(42,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x1, "uart2", "rxd", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x2, "uart0", "cts", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x3, "tdm", "int7", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x4, "tdm-1", "timer", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x5, "vdd", "cpu0-pd", V_MV78230_PLUS)),
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MPP_MODE(43,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x1, "uart2", "txd", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x2, "uart0", "rts", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x3, "spi", "cs3", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x4, "pcie", "rstout", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x5, "vdd", "cpu2-3-pd", V_MV78460)),
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MPP_MODE(44,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x1, "uart2", "cts", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x2, "uart3", "rxd", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x3, "spi", "cs4", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x4, "mem", "bat", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x5, "pcie", "clkreq2", V_MV78230_PLUS)),
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MPP_MODE(45,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x1, "uart2", "rts", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x2, "uart3", "txd", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x3, "spi", "cs5", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x4, "sata1", "prsnt", V_MV78230_PLUS)),
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MPP_MODE(46,
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MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x1, "uart3", "rts", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x2, "uart1", "rts", V_MV78230_PLUS),
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MPP_VAR_FUNCTION(0x3, "spi", "cs6", V_MV78230_PLUS),
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|
MPP_VAR_FUNCTION(0x4, "sata0", "prsnt", V_MV78230_PLUS)),
|
|
MPP_MODE(47,
|
|
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
|
|
MPP_VAR_FUNCTION(0x1, "uart3", "cts", V_MV78230_PLUS),
|
|
MPP_VAR_FUNCTION(0x2, "uart1", "cts", V_MV78230_PLUS),
|
|
MPP_VAR_FUNCTION(0x3, "spi", "cs7", V_MV78230_PLUS),
|
|
MPP_VAR_FUNCTION(0x4, "ref", "clkout", V_MV78230_PLUS),
|
|
MPP_VAR_FUNCTION(0x5, "pcie", "clkreq3", V_MV78230_PLUS)),
|
|
MPP_MODE(48,
|
|
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
|
|
MPP_VAR_FUNCTION(0x1, "tclk", NULL, V_MV78230_PLUS),
|
|
MPP_VAR_FUNCTION(0x2, "dev", "burst/last", V_MV78230_PLUS)),
|
|
MPP_MODE(49,
|
|
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
|
|
MPP_VAR_FUNCTION(0x1, "dev", "we3", V_MV78260_PLUS)),
|
|
MPP_MODE(50,
|
|
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
|
|
MPP_VAR_FUNCTION(0x1, "dev", "we2", V_MV78260_PLUS)),
|
|
MPP_MODE(51,
|
|
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
|
|
MPP_VAR_FUNCTION(0x1, "dev", "ad16", V_MV78260_PLUS)),
|
|
MPP_MODE(52,
|
|
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
|
|
MPP_VAR_FUNCTION(0x1, "dev", "ad17", V_MV78260_PLUS)),
|
|
MPP_MODE(53,
|
|
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
|
|
MPP_VAR_FUNCTION(0x1, "dev", "ad18", V_MV78260_PLUS)),
|
|
MPP_MODE(54,
|
|
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
|
|
MPP_VAR_FUNCTION(0x1, "dev", "ad19", V_MV78260_PLUS)),
|
|
MPP_MODE(55,
|
|
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
|
|
MPP_VAR_FUNCTION(0x1, "dev", "ad20", V_MV78260_PLUS),
|
|
MPP_VAR_FUNCTION(0x2, "vdd", "cpu0-pd", V_MV78260_PLUS)),
|
|
MPP_MODE(56,
|
|
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
|
|
MPP_VAR_FUNCTION(0x1, "dev", "ad21", V_MV78260_PLUS),
|
|
MPP_VAR_FUNCTION(0x2, "vdd", "cpu1-pd", V_MV78260_PLUS)),
|
|
MPP_MODE(57,
|
|
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
|
|
MPP_VAR_FUNCTION(0x1, "dev", "ad22", V_MV78260_PLUS),
|
|
MPP_VAR_FUNCTION(0x2, "vdd", "cpu2-3-pd", V_MV78460)),
|
|
MPP_MODE(58,
|
|
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
|
|
MPP_VAR_FUNCTION(0x1, "dev", "ad23", V_MV78260_PLUS)),
|
|
MPP_MODE(59,
|
|
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
|
|
MPP_VAR_FUNCTION(0x1, "dev", "ad24", V_MV78260_PLUS)),
|
|
MPP_MODE(60,
|
|
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
|
|
MPP_VAR_FUNCTION(0x1, "dev", "ad25", V_MV78260_PLUS)),
|
|
MPP_MODE(61,
|
|
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
|
|
MPP_VAR_FUNCTION(0x1, "dev", "ad26", V_MV78260_PLUS)),
|
|
MPP_MODE(62,
|
|
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
|
|
MPP_VAR_FUNCTION(0x1, "dev", "ad27", V_MV78260_PLUS)),
|
|
MPP_MODE(63,
|
|
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
|
|
MPP_VAR_FUNCTION(0x1, "dev", "ad28", V_MV78260_PLUS)),
|
|
MPP_MODE(64,
|
|
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
|
|
MPP_VAR_FUNCTION(0x1, "dev", "ad29", V_MV78260_PLUS)),
|
|
MPP_MODE(65,
|
|
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
|
|
MPP_VAR_FUNCTION(0x1, "dev", "ad30", V_MV78260_PLUS)),
|
|
MPP_MODE(66,
|
|
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
|
|
MPP_VAR_FUNCTION(0x1, "dev", "ad31", V_MV78260_PLUS)),
|
|
};
|
|
|
|
static struct mvebu_pinctrl_soc_info armada_xp_pinctrl_info;
|
|
|
|
static struct of_device_id armada_xp_pinctrl_of_match[] __devinitdata = {
|
|
{
|
|
.compatible = "marvell,mv78230-pinctrl",
|
|
.data = (void *) V_MV78230,
|
|
},
|
|
{
|
|
.compatible = "marvell,mv78260-pinctrl",
|
|
.data = (void *) V_MV78260,
|
|
},
|
|
{
|
|
.compatible = "marvell,mv78460-pinctrl",
|
|
.data = (void *) V_MV78460,
|
|
},
|
|
{ },
|
|
};
|
|
|
|
static struct mvebu_mpp_ctrl mv78230_mpp_controls[] = {
|
|
MPP_REG_CTRL(0, 48),
|
|
};
|
|
|
|
static struct pinctrl_gpio_range mv78230_mpp_gpio_ranges[] = {
|
|
MPP_GPIO_RANGE(0, 0, 0, 32),
|
|
MPP_GPIO_RANGE(1, 32, 32, 17),
|
|
};
|
|
|
|
static struct mvebu_mpp_ctrl mv78260_mpp_controls[] = {
|
|
MPP_REG_CTRL(0, 66),
|
|
};
|
|
|
|
static struct pinctrl_gpio_range mv78260_mpp_gpio_ranges[] = {
|
|
MPP_GPIO_RANGE(0, 0, 0, 32),
|
|
MPP_GPIO_RANGE(1, 32, 32, 32),
|
|
MPP_GPIO_RANGE(2, 64, 64, 3),
|
|
};
|
|
|
|
static struct mvebu_mpp_ctrl mv78460_mpp_controls[] = {
|
|
MPP_REG_CTRL(0, 66),
|
|
};
|
|
|
|
static struct pinctrl_gpio_range mv78460_mpp_gpio_ranges[] = {
|
|
MPP_GPIO_RANGE(0, 0, 0, 32),
|
|
MPP_GPIO_RANGE(1, 32, 32, 32),
|
|
MPP_GPIO_RANGE(2, 64, 64, 3),
|
|
};
|
|
|
|
static int __devinit armada_xp_pinctrl_probe(struct platform_device *pdev)
|
|
{
|
|
struct mvebu_pinctrl_soc_info *soc = &armada_xp_pinctrl_info;
|
|
const struct of_device_id *match =
|
|
of_match_device(armada_xp_pinctrl_of_match, &pdev->dev);
|
|
|
|
if (!match)
|
|
return -ENODEV;
|
|
|
|
soc->variant = (unsigned) match->data & 0xff;
|
|
|
|
switch (soc->variant) {
|
|
case V_MV78230:
|
|
soc->controls = mv78230_mpp_controls;
|
|
soc->ncontrols = ARRAY_SIZE(mv78230_mpp_controls);
|
|
soc->modes = armada_xp_mpp_modes;
|
|
/* We don't necessarily want the full list of the
|
|
* armada_xp_mpp_modes, but only the first 'n' ones
|
|
* that are available on this SoC */
|
|
soc->nmodes = mv78230_mpp_controls[0].npins;
|
|
soc->gpioranges = mv78230_mpp_gpio_ranges;
|
|
soc->ngpioranges = ARRAY_SIZE(mv78230_mpp_gpio_ranges);
|
|
break;
|
|
case V_MV78260:
|
|
soc->controls = mv78260_mpp_controls;
|
|
soc->ncontrols = ARRAY_SIZE(mv78260_mpp_controls);
|
|
soc->modes = armada_xp_mpp_modes;
|
|
/* We don't necessarily want the full list of the
|
|
* armada_xp_mpp_modes, but only the first 'n' ones
|
|
* that are available on this SoC */
|
|
soc->nmodes = mv78260_mpp_controls[0].npins;
|
|
soc->gpioranges = mv78260_mpp_gpio_ranges;
|
|
soc->ngpioranges = ARRAY_SIZE(mv78260_mpp_gpio_ranges);
|
|
break;
|
|
case V_MV78460:
|
|
soc->controls = mv78460_mpp_controls;
|
|
soc->ncontrols = ARRAY_SIZE(mv78460_mpp_controls);
|
|
soc->modes = armada_xp_mpp_modes;
|
|
/* We don't necessarily want the full list of the
|
|
* armada_xp_mpp_modes, but only the first 'n' ones
|
|
* that are available on this SoC */
|
|
soc->nmodes = mv78460_mpp_controls[0].npins;
|
|
soc->gpioranges = mv78460_mpp_gpio_ranges;
|
|
soc->ngpioranges = ARRAY_SIZE(mv78460_mpp_gpio_ranges);
|
|
break;
|
|
}
|
|
|
|
pdev->dev.platform_data = soc;
|
|
|
|
return mvebu_pinctrl_probe(pdev);
|
|
}
|
|
|
|
static int __devexit armada_xp_pinctrl_remove(struct platform_device *pdev)
|
|
{
|
|
return mvebu_pinctrl_remove(pdev);
|
|
}
|
|
|
|
static struct platform_driver armada_xp_pinctrl_driver = {
|
|
.driver = {
|
|
.name = "armada-xp-pinctrl",
|
|
.owner = THIS_MODULE,
|
|
.of_match_table = of_match_ptr(armada_xp_pinctrl_of_match),
|
|
},
|
|
.probe = armada_xp_pinctrl_probe,
|
|
.remove = __devexit_p(armada_xp_pinctrl_remove),
|
|
};
|
|
|
|
module_platform_driver(armada_xp_pinctrl_driver);
|
|
|
|
MODULE_AUTHOR("Thomas Petazzoni <thomas.petazzoni@free-electrons.com>");
|
|
MODULE_DESCRIPTION("Marvell Armada XP pinctrl driver");
|
|
MODULE_LICENSE("GPL v2");
|