32 lines
896 B
ArmAsm
32 lines
896 B
ArmAsm
/*
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* include/asm-arm/arch-imx/entry-macro.S
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*
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* Low-level IRQ helper macros for iMX-based platforms
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <asm/hardware.h>
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.macro disable_fiq
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.endm
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#define AITC_NIVECSR 0x40
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.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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ldr \irqstat, =IO_ADDRESS(IMX_AITC_BASE)
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@ Load offset & priority of the highest priority
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@ interrupt pending.
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ldr \irqnr, [\irqstat, #AITC_NIVECSR]
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@ Shift off the priority leaving the offset or
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@ "interrupt number"
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mov \irqnr, \irqnr, lsr #16
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ldr \irqstat, =1 @ dummy compare
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ldr \base, =0xFFFF // invalid interrupt
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cmp \irqnr, \base
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bne 1001f
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ldr \irqstat, =0
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1001:
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tst \irqstat, #1 @ to make the condition code = TRUE
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.endm
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