156 lines
3.9 KiB
C
156 lines
3.9 KiB
C
/* Copyright (c) 2010, 2011, Code Aurora Forum. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/irqdomain.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_platform.h>
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#include <linux/memblock.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/hardware/gic.h>
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#include <asm/setup.h>
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#include <mach/board.h>
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#include <mach/msm_iomap.h>
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static void __init msm8x60_fixup(struct tag *tag, char **cmdline,
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struct meminfo *mi)
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{
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for (; tag->hdr.size; tag = tag_next(tag))
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if (tag->hdr.tag == ATAG_MEM &&
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tag->u.mem.start == 0x40200000) {
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tag->u.mem.start = 0x40000000;
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tag->u.mem.size += SZ_2M;
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}
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}
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static void __init msm8x60_reserve(void)
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{
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memblock_remove(0x40000000, SZ_2M);
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}
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static void __init msm8x60_map_io(void)
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{
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msm_map_msm8x60_io();
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}
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static void __init msm8x60_init_irq(void)
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{
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gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE,
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(void *)MSM_QGIC_CPU_BASE);
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/* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */
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writel(0xFFFFD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4);
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/* RUMI does not adhere to GIC spec by enabling STIs by default.
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* Enable/clear is supposed to be RO for STIs, but is RW on RUMI.
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*/
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if (!machine_is_msm8x60_sim())
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writel(0x0000FFFF, MSM_QGIC_DIST_BASE + GIC_DIST_ENABLE_SET);
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}
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static void __init msm8x60_init(void)
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{
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}
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#ifdef CONFIG_OF
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static struct of_dev_auxdata msm_auxdata_lookup[] __initdata = {
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{}
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};
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static struct of_device_id msm_dt_gic_match[] __initdata = {
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{ .compatible = "qcom,msm-8660-qgic", },
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{}
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};
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static void __init msm8x60_dt_init(void)
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{
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struct device_node *node;
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node = of_find_matching_node_by_address(NULL, msm_dt_gic_match,
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MSM8X60_QGIC_DIST_PHYS);
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if (node)
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irq_domain_add_simple(node, GIC_SPI_START);
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if (of_machine_is_compatible("qcom,msm8660-surf")) {
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printk(KERN_INFO "Init surf UART registers\n");
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msm8x60_init_uart12dm();
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}
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of_platform_populate(NULL, of_default_bus_match_table,
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msm_auxdata_lookup, NULL);
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}
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static const char *msm8x60_fluid_match[] __initdata = {
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"qcom,msm8660-fluid",
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"qcom,msm8660-surf",
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NULL
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};
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#endif /* CONFIG_OF */
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MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3")
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.fixup = msm8x60_fixup,
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.reserve = msm8x60_reserve,
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.map_io = msm8x60_map_io,
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.init_irq = msm8x60_init_irq,
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.handle_irq = gic_handle_irq,
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.init_machine = msm8x60_init,
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.timer = &msm_timer,
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MACHINE_END
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MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF")
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.fixup = msm8x60_fixup,
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.reserve = msm8x60_reserve,
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.map_io = msm8x60_map_io,
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.init_irq = msm8x60_init_irq,
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.handle_irq = gic_handle_irq,
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.init_machine = msm8x60_init,
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.timer = &msm_timer,
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MACHINE_END
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MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR")
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.fixup = msm8x60_fixup,
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.reserve = msm8x60_reserve,
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.map_io = msm8x60_map_io,
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.init_irq = msm8x60_init_irq,
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.handle_irq = gic_handle_irq,
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.init_machine = msm8x60_init,
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.timer = &msm_timer,
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MACHINE_END
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MACHINE_START(MSM8X60_FFA, "QCT MSM8X60 FFA")
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.fixup = msm8x60_fixup,
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.reserve = msm8x60_reserve,
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.map_io = msm8x60_map_io,
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.init_irq = msm8x60_init_irq,
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.handle_irq = gic_handle_irq,
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.init_machine = msm8x60_init,
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.timer = &msm_timer,
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MACHINE_END
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#ifdef CONFIG_OF
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/* TODO: General device tree support for all MSM. */
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DT_MACHINE_START(MSM_DT, "Qualcomm MSM (Flattened Device Tree)")
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.map_io = msm8x60_map_io,
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.init_irq = msm8x60_init_irq,
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.init_machine = msm8x60_dt_init,
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.timer = &msm_timer,
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.dt_compat = msm8x60_fluid_match,
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MACHINE_END
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#endif /* CONFIG_OF */
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