534 lines
12 KiB
C
534 lines
12 KiB
C
/*
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* Copyright (C) ST-Ericsson SA 2010
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*
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* License Terms: GNU General Public License v2
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* Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
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* Author: Rabin Vincent <rabin.vincent@stericsson.com>
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* Changes: Mattias Wallin <mattias.wallin@stericsson.com>
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*/
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/mfd/core.h>
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#include <linux/mfd/abx500.h>
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#include <linux/mfd/ab8500.h>
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#include <linux/regulator/ab8500.h>
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/*
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* Interrupt register offsets
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* Bank : 0x0E
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*/
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#define AB8500_IT_SOURCE1_REG 0x00
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#define AB8500_IT_SOURCE2_REG 0x01
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#define AB8500_IT_SOURCE3_REG 0x02
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#define AB8500_IT_SOURCE4_REG 0x03
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#define AB8500_IT_SOURCE5_REG 0x04
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#define AB8500_IT_SOURCE6_REG 0x05
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#define AB8500_IT_SOURCE7_REG 0x06
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#define AB8500_IT_SOURCE8_REG 0x07
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#define AB8500_IT_SOURCE19_REG 0x12
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#define AB8500_IT_SOURCE20_REG 0x13
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#define AB8500_IT_SOURCE21_REG 0x14
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#define AB8500_IT_SOURCE22_REG 0x15
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#define AB8500_IT_SOURCE23_REG 0x16
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#define AB8500_IT_SOURCE24_REG 0x17
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/*
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* latch registers
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*/
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#define AB8500_IT_LATCH1_REG 0x20
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#define AB8500_IT_LATCH2_REG 0x21
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#define AB8500_IT_LATCH3_REG 0x22
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#define AB8500_IT_LATCH4_REG 0x23
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#define AB8500_IT_LATCH5_REG 0x24
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#define AB8500_IT_LATCH6_REG 0x25
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#define AB8500_IT_LATCH7_REG 0x26
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#define AB8500_IT_LATCH8_REG 0x27
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#define AB8500_IT_LATCH9_REG 0x28
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#define AB8500_IT_LATCH10_REG 0x29
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#define AB8500_IT_LATCH19_REG 0x32
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#define AB8500_IT_LATCH20_REG 0x33
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#define AB8500_IT_LATCH21_REG 0x34
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#define AB8500_IT_LATCH22_REG 0x35
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#define AB8500_IT_LATCH23_REG 0x36
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#define AB8500_IT_LATCH24_REG 0x37
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/*
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* mask registers
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*/
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#define AB8500_IT_MASK1_REG 0x40
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#define AB8500_IT_MASK2_REG 0x41
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#define AB8500_IT_MASK3_REG 0x42
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#define AB8500_IT_MASK4_REG 0x43
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#define AB8500_IT_MASK5_REG 0x44
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#define AB8500_IT_MASK6_REG 0x45
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#define AB8500_IT_MASK7_REG 0x46
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#define AB8500_IT_MASK8_REG 0x47
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#define AB8500_IT_MASK9_REG 0x48
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#define AB8500_IT_MASK10_REG 0x49
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#define AB8500_IT_MASK11_REG 0x4A
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#define AB8500_IT_MASK12_REG 0x4B
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#define AB8500_IT_MASK13_REG 0x4C
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#define AB8500_IT_MASK14_REG 0x4D
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#define AB8500_IT_MASK15_REG 0x4E
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#define AB8500_IT_MASK16_REG 0x4F
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#define AB8500_IT_MASK17_REG 0x50
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#define AB8500_IT_MASK18_REG 0x51
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#define AB8500_IT_MASK19_REG 0x52
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#define AB8500_IT_MASK20_REG 0x53
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#define AB8500_IT_MASK21_REG 0x54
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#define AB8500_IT_MASK22_REG 0x55
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#define AB8500_IT_MASK23_REG 0x56
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#define AB8500_IT_MASK24_REG 0x57
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#define AB8500_REV_REG 0x80
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/*
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* Map interrupt numbers to the LATCH and MASK register offsets, Interrupt
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* numbers are indexed into this array with (num / 8).
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*
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* This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at
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* offset 0.
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*/
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static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = {
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0, 1, 2, 3, 4, 6, 7, 8, 9, 18, 19, 20, 21,
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};
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static int ab8500_get_chip_id(struct device *dev)
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{
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struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
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return (int)ab8500->chip_id;
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}
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static int set_register_interruptible(struct ab8500 *ab8500, u8 bank,
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u8 reg, u8 data)
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{
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int ret;
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/*
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* Put the u8 bank and u8 register together into a an u16.
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* The bank on higher 8 bits and register in lower 8 bits.
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* */
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u16 addr = ((u16)bank) << 8 | reg;
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dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data);
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ret = mutex_lock_interruptible(&ab8500->lock);
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if (ret)
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return ret;
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ret = ab8500->write(ab8500, addr, data);
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if (ret < 0)
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dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
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addr, ret);
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mutex_unlock(&ab8500->lock);
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return ret;
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}
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static int ab8500_set_register(struct device *dev, u8 bank,
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u8 reg, u8 value)
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{
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struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
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return set_register_interruptible(ab8500, bank, reg, value);
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}
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static int get_register_interruptible(struct ab8500 *ab8500, u8 bank,
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u8 reg, u8 *value)
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{
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int ret;
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/* put the u8 bank and u8 reg together into a an u16.
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* bank on higher 8 bits and reg in lower */
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u16 addr = ((u16)bank) << 8 | reg;
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ret = mutex_lock_interruptible(&ab8500->lock);
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if (ret)
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return ret;
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ret = ab8500->read(ab8500, addr);
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if (ret < 0)
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dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
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addr, ret);
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else
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*value = ret;
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mutex_unlock(&ab8500->lock);
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dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret);
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return ret;
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}
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static int ab8500_get_register(struct device *dev, u8 bank,
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u8 reg, u8 *value)
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{
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struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
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return get_register_interruptible(ab8500, bank, reg, value);
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}
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static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank,
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u8 reg, u8 bitmask, u8 bitvalues)
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{
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int ret;
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u8 data;
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/* put the u8 bank and u8 reg together into a an u16.
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* bank on higher 8 bits and reg in lower */
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u16 addr = ((u16)bank) << 8 | reg;
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ret = mutex_lock_interruptible(&ab8500->lock);
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if (ret)
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return ret;
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ret = ab8500->read(ab8500, addr);
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if (ret < 0) {
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dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
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addr, ret);
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goto out;
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}
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data = (u8)ret;
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data = (~bitmask & data) | (bitmask & bitvalues);
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ret = ab8500->write(ab8500, addr, data);
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if (ret < 0)
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dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
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addr, ret);
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dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr, data);
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out:
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mutex_unlock(&ab8500->lock);
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return ret;
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}
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static int ab8500_mask_and_set_register(struct device *dev,
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u8 bank, u8 reg, u8 bitmask, u8 bitvalues)
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{
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struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
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return mask_and_set_register_interruptible(ab8500, bank, reg,
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bitmask, bitvalues);
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}
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static struct abx500_ops ab8500_ops = {
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.get_chip_id = ab8500_get_chip_id,
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.get_register = ab8500_get_register,
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.set_register = ab8500_set_register,
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.get_register_page = NULL,
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.set_register_page = NULL,
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.mask_and_set_register = ab8500_mask_and_set_register,
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.event_registers_startup_state_get = NULL,
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.startup_irq_enabled = NULL,
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};
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static void ab8500_irq_lock(unsigned int irq)
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{
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struct ab8500 *ab8500 = get_irq_chip_data(irq);
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mutex_lock(&ab8500->irq_lock);
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}
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static void ab8500_irq_sync_unlock(unsigned int irq)
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{
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struct ab8500 *ab8500 = get_irq_chip_data(irq);
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int i;
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for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) {
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u8 old = ab8500->oldmask[i];
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u8 new = ab8500->mask[i];
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int reg;
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if (new == old)
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continue;
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ab8500->oldmask[i] = new;
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reg = AB8500_IT_MASK1_REG + ab8500_irq_regoffset[i];
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set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new);
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}
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mutex_unlock(&ab8500->irq_lock);
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}
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static void ab8500_irq_mask(unsigned int irq)
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{
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struct ab8500 *ab8500 = get_irq_chip_data(irq);
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int offset = irq - ab8500->irq_base;
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int index = offset / 8;
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int mask = 1 << (offset % 8);
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ab8500->mask[index] |= mask;
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}
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static void ab8500_irq_unmask(unsigned int irq)
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{
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struct ab8500 *ab8500 = get_irq_chip_data(irq);
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int offset = irq - ab8500->irq_base;
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int index = offset / 8;
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int mask = 1 << (offset % 8);
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ab8500->mask[index] &= ~mask;
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}
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static struct irq_chip ab8500_irq_chip = {
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.name = "ab8500",
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.bus_lock = ab8500_irq_lock,
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.bus_sync_unlock = ab8500_irq_sync_unlock,
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.mask = ab8500_irq_mask,
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.unmask = ab8500_irq_unmask,
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};
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static irqreturn_t ab8500_irq(int irq, void *dev)
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{
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struct ab8500 *ab8500 = dev;
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int i;
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dev_vdbg(ab8500->dev, "interrupt\n");
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for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) {
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int regoffset = ab8500_irq_regoffset[i];
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int status;
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u8 value;
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status = get_register_interruptible(ab8500, AB8500_INTERRUPT,
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AB8500_IT_LATCH1_REG + regoffset, &value);
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if (status < 0 || value == 0)
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continue;
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do {
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int bit = __ffs(value);
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int line = i * 8 + bit;
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handle_nested_irq(ab8500->irq_base + line);
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value &= ~(1 << bit);
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} while (value);
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}
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return IRQ_HANDLED;
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}
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static int ab8500_irq_init(struct ab8500 *ab8500)
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{
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int base = ab8500->irq_base;
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int irq;
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for (irq = base; irq < base + AB8500_NR_IRQS; irq++) {
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set_irq_chip_data(irq, ab8500);
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set_irq_chip_and_handler(irq, &ab8500_irq_chip,
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handle_simple_irq);
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set_irq_nested_thread(irq, 1);
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#ifdef CONFIG_ARM
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set_irq_flags(irq, IRQF_VALID);
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#else
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set_irq_noprobe(irq);
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#endif
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}
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return 0;
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}
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static void ab8500_irq_remove(struct ab8500 *ab8500)
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{
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int base = ab8500->irq_base;
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int irq;
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for (irq = base; irq < base + AB8500_NR_IRQS; irq++) {
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#ifdef CONFIG_ARM
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set_irq_flags(irq, 0);
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#endif
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set_irq_chip_and_handler(irq, NULL, NULL);
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set_irq_chip_data(irq, NULL);
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}
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}
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static struct resource ab8500_gpadc_resources[] = {
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{
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.name = "HW_CONV_END",
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.start = AB8500_INT_GP_HW_ADC_CONV_END,
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.end = AB8500_INT_GP_HW_ADC_CONV_END,
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.flags = IORESOURCE_IRQ,
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},
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{
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.name = "SW_CONV_END",
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.start = AB8500_INT_GP_SW_ADC_CONV_END,
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.end = AB8500_INT_GP_SW_ADC_CONV_END,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct resource ab8500_rtc_resources[] = {
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{
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.name = "60S",
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.start = AB8500_INT_RTC_60S,
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.end = AB8500_INT_RTC_60S,
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.flags = IORESOURCE_IRQ,
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},
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{
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.name = "ALARM",
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.start = AB8500_INT_RTC_ALARM,
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.end = AB8500_INT_RTC_ALARM,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct resource ab8500_poweronkey_db_resources[] = {
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{
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.name = "ONKEY_DBF",
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.start = AB8500_INT_PON_KEY1DB_F,
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.end = AB8500_INT_PON_KEY1DB_F,
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.flags = IORESOURCE_IRQ,
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},
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{
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.name = "ONKEY_DBR",
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.start = AB8500_INT_PON_KEY1DB_R,
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.end = AB8500_INT_PON_KEY1DB_R,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct mfd_cell ab8500_devs[] = {
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#ifdef CONFIG_DEBUG_FS
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{
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.name = "ab8500-debug",
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},
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#endif
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{
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.name = "ab8500-gpadc",
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.num_resources = ARRAY_SIZE(ab8500_gpadc_resources),
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.resources = ab8500_gpadc_resources,
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},
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{
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.name = "ab8500-rtc",
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.num_resources = ARRAY_SIZE(ab8500_rtc_resources),
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.resources = ab8500_rtc_resources,
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},
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{
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.name = "ab8500-pwm",
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.id = 1,
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},
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{
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.name = "ab8500-pwm",
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.id = 2,
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},
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{
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.name = "ab8500-pwm",
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.id = 3,
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},
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{ .name = "ab8500-charger", },
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{ .name = "ab8500-audio", },
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{ .name = "ab8500-usb", },
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{ .name = "ab8500-regulator", },
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{
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.name = "ab8500-poweron-key",
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.num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources),
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.resources = ab8500_poweronkey_db_resources,
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},
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};
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int __devinit ab8500_init(struct ab8500 *ab8500)
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{
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struct ab8500_platform_data *plat = dev_get_platdata(ab8500->dev);
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int ret;
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int i;
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u8 value;
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if (plat)
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ab8500->irq_base = plat->irq_base;
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mutex_init(&ab8500->lock);
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mutex_init(&ab8500->irq_lock);
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ret = get_register_interruptible(ab8500, AB8500_MISC,
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AB8500_REV_REG, &value);
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if (ret < 0)
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return ret;
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/*
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* 0x0 - Early Drop
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* 0x10 - Cut 1.0
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* 0x11 - Cut 1.1
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*/
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if (value == 0x0 || value == 0x10 || value == 0x11) {
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ab8500->revision = value;
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dev_info(ab8500->dev, "detected chip, revision: %#x\n", value);
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} else {
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dev_err(ab8500->dev, "unknown chip, revision: %#x\n", value);
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return -EINVAL;
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}
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ab8500->chip_id = value;
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if (plat && plat->init)
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plat->init(ab8500);
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/* Clear and mask all interrupts */
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for (i = 0; i < 10; i++) {
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get_register_interruptible(ab8500, AB8500_INTERRUPT,
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AB8500_IT_LATCH1_REG + i, &value);
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set_register_interruptible(ab8500, AB8500_INTERRUPT,
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AB8500_IT_MASK1_REG + i, 0xff);
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}
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for (i = 18; i < 24; i++) {
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get_register_interruptible(ab8500, AB8500_INTERRUPT,
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AB8500_IT_LATCH1_REG + i, &value);
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set_register_interruptible(ab8500, AB8500_INTERRUPT,
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AB8500_IT_MASK1_REG + i, 0xff);
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}
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ret = abx500_register_ops(ab8500->dev, &ab8500_ops);
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if (ret)
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return ret;
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for (i = 0; i < AB8500_NUM_IRQ_REGS; i++)
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ab8500->mask[i] = ab8500->oldmask[i] = 0xff;
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if (ab8500->irq_base) {
|
|
ret = ab8500_irq_init(ab8500);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = request_threaded_irq(ab8500->irq, NULL, ab8500_irq,
|
|
IRQF_ONESHOT, "ab8500", ab8500);
|
|
if (ret)
|
|
goto out_removeirq;
|
|
}
|
|
|
|
ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs,
|
|
ARRAY_SIZE(ab8500_devs), NULL,
|
|
ab8500->irq_base);
|
|
if (ret)
|
|
goto out_freeirq;
|
|
|
|
return ret;
|
|
|
|
out_freeirq:
|
|
if (ab8500->irq_base) {
|
|
free_irq(ab8500->irq, ab8500);
|
|
out_removeirq:
|
|
ab8500_irq_remove(ab8500);
|
|
}
|
|
return ret;
|
|
}
|
|
|
|
int __devexit ab8500_exit(struct ab8500 *ab8500)
|
|
{
|
|
mfd_remove_devices(ab8500->dev);
|
|
if (ab8500->irq_base) {
|
|
free_irq(ab8500->irq, ab8500);
|
|
ab8500_irq_remove(ab8500);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
MODULE_AUTHOR("Srinidhi Kasagar, Rabin Vincent");
|
|
MODULE_DESCRIPTION("AB8500 MFD core");
|
|
MODULE_LICENSE("GPL v2");
|