288 lines
6.4 KiB
C
288 lines
6.4 KiB
C
/* linux/arch/arm/mach-s5pc100/dev-audio.c
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*
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* Copyright (c) 2010 Samsung Electronics Co. Ltd
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* Jaswinder Singh <jassi.brar@samsung.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/platform_device.h>
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#include <linux/dma-mapping.h>
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#include <linux/gpio.h>
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#include <plat/gpio-cfg.h>
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#include <plat/audio.h>
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#include <mach/map.h>
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#include <mach/dma.h>
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#include <mach/irqs.h>
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static int s5pc100_cfg_i2s(struct platform_device *pdev)
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{
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/* configure GPIO for i2s port */
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switch (pdev->id) {
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case 1:
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s3c_gpio_cfgpin(S5PC100_GPC(0), S3C_GPIO_SFN(2));
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s3c_gpio_cfgpin(S5PC100_GPC(1), S3C_GPIO_SFN(2));
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s3c_gpio_cfgpin(S5PC100_GPC(2), S3C_GPIO_SFN(2));
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s3c_gpio_cfgpin(S5PC100_GPC(3), S3C_GPIO_SFN(2));
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s3c_gpio_cfgpin(S5PC100_GPC(4), S3C_GPIO_SFN(2));
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break;
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case 2:
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s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(4));
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s3c_gpio_cfgpin(S5PC100_GPG3(1), S3C_GPIO_SFN(4));
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s3c_gpio_cfgpin(S5PC100_GPG3(2), S3C_GPIO_SFN(4));
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s3c_gpio_cfgpin(S5PC100_GPG3(3), S3C_GPIO_SFN(4));
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s3c_gpio_cfgpin(S5PC100_GPG3(4), S3C_GPIO_SFN(4));
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break;
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case -1: /* Dedicated pins */
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break;
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default:
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printk(KERN_ERR "Invalid Device %d\n", pdev->id);
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return -EINVAL;
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}
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return 0;
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}
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static struct s3c_audio_pdata s3c_i2s_pdata = {
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.cfg_gpio = s5pc100_cfg_i2s,
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};
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static struct resource s5pc100_iis0_resource[] = {
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[0] = {
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.start = S5PC100_PA_I2S0,
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.end = S5PC100_PA_I2S0 + 0x100 - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = DMACH_I2S0_TX,
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.end = DMACH_I2S0_TX,
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.flags = IORESOURCE_DMA,
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},
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[2] = {
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.start = DMACH_I2S0_RX,
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.end = DMACH_I2S0_RX,
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.flags = IORESOURCE_DMA,
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},
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};
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struct platform_device s5pc100_device_iis0 = {
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.name = "s3c64xx-iis-v4",
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.id = -1,
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.num_resources = ARRAY_SIZE(s5pc100_iis0_resource),
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.resource = s5pc100_iis0_resource,
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.dev = {
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.platform_data = &s3c_i2s_pdata,
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},
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};
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static struct resource s5pc100_iis1_resource[] = {
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[0] = {
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.start = S5PC100_PA_I2S1,
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.end = S5PC100_PA_I2S1 + 0x100 - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = DMACH_I2S1_TX,
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.end = DMACH_I2S1_TX,
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.flags = IORESOURCE_DMA,
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},
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[2] = {
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.start = DMACH_I2S1_RX,
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.end = DMACH_I2S1_RX,
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.flags = IORESOURCE_DMA,
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},
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};
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struct platform_device s5pc100_device_iis1 = {
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.name = "s3c64xx-iis",
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.id = 1,
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.num_resources = ARRAY_SIZE(s5pc100_iis1_resource),
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.resource = s5pc100_iis1_resource,
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.dev = {
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.platform_data = &s3c_i2s_pdata,
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},
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};
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static struct resource s5pc100_iis2_resource[] = {
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[0] = {
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.start = S5PC100_PA_I2S2,
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.end = S5PC100_PA_I2S2 + 0x100 - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = DMACH_I2S2_TX,
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.end = DMACH_I2S2_TX,
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.flags = IORESOURCE_DMA,
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},
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[2] = {
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.start = DMACH_I2S2_RX,
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.end = DMACH_I2S2_RX,
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.flags = IORESOURCE_DMA,
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},
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};
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struct platform_device s5pc100_device_iis2 = {
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.name = "s3c64xx-iis",
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.id = 2,
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.num_resources = ARRAY_SIZE(s5pc100_iis2_resource),
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.resource = s5pc100_iis2_resource,
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.dev = {
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.platform_data = &s3c_i2s_pdata,
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},
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};
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/* PCM Controller platform_devices */
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static int s5pc100_pcm_cfg_gpio(struct platform_device *pdev)
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{
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switch (pdev->id) {
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case 0:
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s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(5));
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s3c_gpio_cfgpin(S5PC100_GPG3(1), S3C_GPIO_SFN(5));
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s3c_gpio_cfgpin(S5PC100_GPG3(2), S3C_GPIO_SFN(5));
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s3c_gpio_cfgpin(S5PC100_GPG3(3), S3C_GPIO_SFN(5));
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s3c_gpio_cfgpin(S5PC100_GPG3(4), S3C_GPIO_SFN(5));
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break;
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case 1:
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s3c_gpio_cfgpin(S5PC100_GPC(0), S3C_GPIO_SFN(3));
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s3c_gpio_cfgpin(S5PC100_GPC(1), S3C_GPIO_SFN(3));
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s3c_gpio_cfgpin(S5PC100_GPC(2), S3C_GPIO_SFN(3));
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s3c_gpio_cfgpin(S5PC100_GPC(3), S3C_GPIO_SFN(3));
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s3c_gpio_cfgpin(S5PC100_GPC(4), S3C_GPIO_SFN(3));
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break;
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default:
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printk(KERN_DEBUG "Invalid PCM Controller number!");
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return -EINVAL;
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}
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return 0;
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}
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static struct s3c_audio_pdata s3c_pcm_pdata = {
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.cfg_gpio = s5pc100_pcm_cfg_gpio,
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};
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static struct resource s5pc100_pcm0_resource[] = {
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[0] = {
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.start = S5PC100_PA_PCM0,
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.end = S5PC100_PA_PCM0 + 0x100 - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = DMACH_PCM0_TX,
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.end = DMACH_PCM0_TX,
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.flags = IORESOURCE_DMA,
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},
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[2] = {
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.start = DMACH_PCM0_RX,
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.end = DMACH_PCM0_RX,
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.flags = IORESOURCE_DMA,
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},
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};
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struct platform_device s5pc100_device_pcm0 = {
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.name = "samsung-pcm",
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.id = 0,
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.num_resources = ARRAY_SIZE(s5pc100_pcm0_resource),
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.resource = s5pc100_pcm0_resource,
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.dev = {
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.platform_data = &s3c_pcm_pdata,
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},
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};
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static struct resource s5pc100_pcm1_resource[] = {
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[0] = {
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.start = S5PC100_PA_PCM1,
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.end = S5PC100_PA_PCM1 + 0x100 - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = DMACH_PCM1_TX,
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.end = DMACH_PCM1_TX,
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.flags = IORESOURCE_DMA,
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},
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[2] = {
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.start = DMACH_PCM1_RX,
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.end = DMACH_PCM1_RX,
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.flags = IORESOURCE_DMA,
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},
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};
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struct platform_device s5pc100_device_pcm1 = {
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.name = "samsung-pcm",
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.id = 1,
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.num_resources = ARRAY_SIZE(s5pc100_pcm1_resource),
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.resource = s5pc100_pcm1_resource,
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.dev = {
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.platform_data = &s3c_pcm_pdata,
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},
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};
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/* AC97 Controller platform devices */
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static int s5pc100_ac97_cfg_gpio(struct platform_device *pdev)
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{
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s3c_gpio_cfgpin(S5PC100_GPC(0), S3C_GPIO_SFN(4));
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s3c_gpio_cfgpin(S5PC100_GPC(1), S3C_GPIO_SFN(4));
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s3c_gpio_cfgpin(S5PC100_GPC(2), S3C_GPIO_SFN(4));
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s3c_gpio_cfgpin(S5PC100_GPC(3), S3C_GPIO_SFN(4));
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s3c_gpio_cfgpin(S5PC100_GPC(4), S3C_GPIO_SFN(4));
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return 0;
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}
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static struct resource s5pc100_ac97_resource[] = {
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[0] = {
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.start = S5PC100_PA_AC97,
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.end = S5PC100_PA_AC97 + 0x100 - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = DMACH_AC97_PCMOUT,
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.end = DMACH_AC97_PCMOUT,
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.flags = IORESOURCE_DMA,
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},
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[2] = {
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.start = DMACH_AC97_PCMIN,
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.end = DMACH_AC97_PCMIN,
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.flags = IORESOURCE_DMA,
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},
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[3] = {
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.start = DMACH_AC97_MICIN,
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.end = DMACH_AC97_MICIN,
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.flags = IORESOURCE_DMA,
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},
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[4] = {
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.start = IRQ_AC97,
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.end = IRQ_AC97,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct s3c_audio_pdata s3c_ac97_pdata = {
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.cfg_gpio = s5pc100_ac97_cfg_gpio,
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};
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static u64 s5pc100_ac97_dmamask = DMA_BIT_MASK(32);
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struct platform_device s5pc100_device_ac97 = {
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.name = "s3c-ac97",
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.id = -1,
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.num_resources = ARRAY_SIZE(s5pc100_ac97_resource),
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.resource = s5pc100_ac97_resource,
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.dev = {
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.platform_data = &s3c_ac97_pdata,
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.dma_mask = &s5pc100_ac97_dmamask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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};
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