47 lines
1.5 KiB
C
47 lines
1.5 KiB
C
/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-q.h
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*
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* Copyright 2008 Openmoko, Inc.
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* Copyright 2008 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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* http://armlinux.simtec.co.uk/
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*
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* GPIO Bank Q register and configuration definitions
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#define S3C64XX_GPQCON (S3C64XX_GPQ_BASE + 0x00)
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#define S3C64XX_GPQDAT (S3C64XX_GPQ_BASE + 0x04)
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#define S3C64XX_GPQPUD (S3C64XX_GPQ_BASE + 0x08)
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#define S3C64XX_GPQCONSLP (S3C64XX_GPQ_BASE + 0x0c)
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#define S3C64XX_GPQPUDSLP (S3C64XX_GPQ_BASE + 0x10)
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#define S3C64XX_GPQ_CONMASK(__gpio) (0x3 << ((__gpio) * 2))
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#define S3C64XX_GPQ_INPUT(__gpio) (0x0 << ((__gpio) * 2))
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#define S3C64XX_GPQ_OUTPUT(__gpio) (0x1 << ((__gpio) * 2))
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#define S3C64XX_GPQ0_MEM0_ADDR18_RAS (0x02 << 0)
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#define S3C64XX_GPQ0_EINT_G9_0 (0x03 << 0)
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#define S3C64XX_GPQ1_MEM0_ADDR19_CAS (0x02 << 2)
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#define S3C64XX_GPQ1_EINT_G9_1 (0x03 << 2)
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#define S3C64XX_GPQ2_EINT_G9_2 (0x03 << 4)
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#define S3C64XX_GPQ3_EINT_G9_3 (0x03 << 6)
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#define S3C64XX_GPQ4_EINT_G9_4 (0x03 << 8)
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#define S3C64XX_GPQ5_EINT_G9_5 (0x03 << 10)
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#define S3C64XX_GPQ6_EINT_G9_6 (0x03 << 12)
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#define S3C64XX_GPQ7_MEM0_ADDR17_WENDMC (0x02 << 14)
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#define S3C64XX_GPQ7_EINT_G9_7 (0x03 << 14)
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#define S3C64XX_GPQ8_MEM0_ADDR16_APDMC (0x02 << 16)
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#define S3C64XX_GPQ8_EINT_G9_8 (0x03 << 16)
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