361 lines
10 KiB
C
361 lines
10 KiB
C
/*
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* PowerPC64 atomic bit operations.
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* Dave Engebretsen, Todd Inglett, Don Reed, Pat McCarthy, Peter Bergner,
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* Anton Blanchard
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*
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* Originally taken from the 32b PPC code. Modified to use 64b values for
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* the various counters & memory references.
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*
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* Bitops are odd when viewed on big-endian systems. They were designed
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* on little endian so the size of the bitset doesn't matter (low order bytes
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* come first) as long as the bit in question is valid.
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*
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* Bits are "tested" often using the C expression (val & (1<<nr)) so we do
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* our best to stay compatible with that. The assumption is that val will
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* be unsigned long for such tests. As such, we assume the bits are stored
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* as an array of unsigned long (the usual case is a single unsigned long,
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* of course). Here's an example bitset with bit numbering:
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*
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* |63..........0|127........64|195.......128|255.......196|
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*
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* This leads to a problem. If an int, short or char is passed as a bitset
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* it will be a bad memory reference since we want to store in chunks
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* of unsigned long (64 bits here) size.
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*
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* There are a few little-endian macros used mostly for filesystem bitmaps,
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* these work on similar bit arrays layouts, but byte-oriented:
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*
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* |7...0|15...8|23...16|31...24|39...32|47...40|55...48|63...56|
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*
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* The main difference is that bit 3-5 in the bit number field needs to be
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* reversed compared to the big-endian bit fields. This can be achieved
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* by XOR with 0b111000 (0x38).
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#ifndef _PPC64_BITOPS_H
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#define _PPC64_BITOPS_H
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#ifdef __KERNEL__
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#include <asm/synch.h>
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/*
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* clear_bit doesn't imply a memory barrier
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*/
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#define smp_mb__before_clear_bit() smp_mb()
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#define smp_mb__after_clear_bit() smp_mb()
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static __inline__ int test_bit(unsigned long nr, __const__ volatile unsigned long *addr)
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{
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return (1UL & (addr[nr >> 6] >> (nr & 63)));
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}
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static __inline__ void set_bit(unsigned long nr, volatile unsigned long *addr)
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{
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unsigned long old;
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unsigned long mask = 1UL << (nr & 0x3f);
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unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
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__asm__ __volatile__(
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"1: ldarx %0,0,%3 # set_bit\n\
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or %0,%0,%2\n\
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stdcx. %0,0,%3\n\
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bne- 1b"
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: "=&r" (old), "=m" (*p)
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: "r" (mask), "r" (p), "m" (*p)
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: "cc");
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}
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static __inline__ void clear_bit(unsigned long nr, volatile unsigned long *addr)
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{
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unsigned long old;
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unsigned long mask = 1UL << (nr & 0x3f);
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unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
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__asm__ __volatile__(
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"1: ldarx %0,0,%3 # clear_bit\n\
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andc %0,%0,%2\n\
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stdcx. %0,0,%3\n\
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bne- 1b"
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: "=&r" (old), "=m" (*p)
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: "r" (mask), "r" (p), "m" (*p)
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: "cc");
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}
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static __inline__ void change_bit(unsigned long nr, volatile unsigned long *addr)
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{
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unsigned long old;
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unsigned long mask = 1UL << (nr & 0x3f);
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unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
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__asm__ __volatile__(
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"1: ldarx %0,0,%3 # change_bit\n\
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xor %0,%0,%2\n\
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stdcx. %0,0,%3\n\
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bne- 1b"
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: "=&r" (old), "=m" (*p)
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: "r" (mask), "r" (p), "m" (*p)
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: "cc");
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}
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static __inline__ int test_and_set_bit(unsigned long nr, volatile unsigned long *addr)
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{
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unsigned long old, t;
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unsigned long mask = 1UL << (nr & 0x3f);
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unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
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__asm__ __volatile__(
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EIEIO_ON_SMP
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"1: ldarx %0,0,%3 # test_and_set_bit\n\
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or %1,%0,%2 \n\
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stdcx. %1,0,%3 \n\
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bne- 1b"
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ISYNC_ON_SMP
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: "=&r" (old), "=&r" (t)
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: "r" (mask), "r" (p)
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: "cc", "memory");
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return (old & mask) != 0;
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}
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static __inline__ int test_and_clear_bit(unsigned long nr, volatile unsigned long *addr)
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{
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unsigned long old, t;
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unsigned long mask = 1UL << (nr & 0x3f);
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unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
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__asm__ __volatile__(
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EIEIO_ON_SMP
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"1: ldarx %0,0,%3 # test_and_clear_bit\n\
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andc %1,%0,%2\n\
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stdcx. %1,0,%3\n\
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bne- 1b"
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ISYNC_ON_SMP
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: "=&r" (old), "=&r" (t)
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: "r" (mask), "r" (p)
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: "cc", "memory");
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return (old & mask) != 0;
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}
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static __inline__ int test_and_change_bit(unsigned long nr, volatile unsigned long *addr)
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{
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unsigned long old, t;
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unsigned long mask = 1UL << (nr & 0x3f);
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unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
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__asm__ __volatile__(
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EIEIO_ON_SMP
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"1: ldarx %0,0,%3 # test_and_change_bit\n\
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xor %1,%0,%2\n\
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stdcx. %1,0,%3\n\
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bne- 1b"
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ISYNC_ON_SMP
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: "=&r" (old), "=&r" (t)
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: "r" (mask), "r" (p)
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: "cc", "memory");
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return (old & mask) != 0;
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}
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static __inline__ void set_bits(unsigned long mask, unsigned long *addr)
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{
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unsigned long old;
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__asm__ __volatile__(
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"1: ldarx %0,0,%3 # set_bit\n\
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or %0,%0,%2\n\
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stdcx. %0,0,%3\n\
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bne- 1b"
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: "=&r" (old), "=m" (*addr)
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: "r" (mask), "r" (addr), "m" (*addr)
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: "cc");
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}
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/*
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* non-atomic versions
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*/
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static __inline__ void __set_bit(unsigned long nr, volatile unsigned long *addr)
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{
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unsigned long mask = 1UL << (nr & 0x3f);
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unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
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*p |= mask;
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}
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static __inline__ void __clear_bit(unsigned long nr, volatile unsigned long *addr)
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{
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unsigned long mask = 1UL << (nr & 0x3f);
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unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
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*p &= ~mask;
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}
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static __inline__ void __change_bit(unsigned long nr, volatile unsigned long *addr)
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{
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unsigned long mask = 1UL << (nr & 0x3f);
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unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
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*p ^= mask;
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}
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static __inline__ int __test_and_set_bit(unsigned long nr, volatile unsigned long *addr)
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{
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unsigned long mask = 1UL << (nr & 0x3f);
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unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
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unsigned long old = *p;
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*p = old | mask;
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return (old & mask) != 0;
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}
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static __inline__ int __test_and_clear_bit(unsigned long nr, volatile unsigned long *addr)
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{
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unsigned long mask = 1UL << (nr & 0x3f);
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unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
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unsigned long old = *p;
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*p = old & ~mask;
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return (old & mask) != 0;
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}
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static __inline__ int __test_and_change_bit(unsigned long nr, volatile unsigned long *addr)
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{
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unsigned long mask = 1UL << (nr & 0x3f);
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unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
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unsigned long old = *p;
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*p = old ^ mask;
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return (old & mask) != 0;
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}
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/*
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* Return the zero-based bit position (from RIGHT TO LEFT, 63 -> 0) of the
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* most significant (left-most) 1-bit in a double word.
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*/
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static __inline__ int __ilog2(unsigned long x)
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{
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int lz;
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asm ("cntlzd %0,%1" : "=r" (lz) : "r" (x));
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return 63 - lz;
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}
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/*
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* Determines the bit position of the least significant (rightmost) 0 bit
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* in the specified double word. The returned bit position will be zero-based,
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* starting from the right side (63 - 0).
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*/
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static __inline__ unsigned long ffz(unsigned long x)
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{
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/* no zero exists anywhere in the 8 byte area. */
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if ((x = ~x) == 0)
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return 64;
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/*
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* Calculate the bit position of the least signficant '1' bit in x
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* (since x has been changed this will actually be the least signficant
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* '0' bit in * the original x). Note: (x & -x) gives us a mask that
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* is the least significant * (RIGHT-most) 1-bit of the value in x.
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*/
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return __ilog2(x & -x);
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}
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static __inline__ int __ffs(unsigned long x)
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{
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return __ilog2(x & -x);
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}
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/*
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* ffs: find first bit set. This is defined the same way as
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* the libc and compiler builtin ffs routines, therefore
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* differs in spirit from the above ffz (man ffs).
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*/
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static __inline__ int ffs(int x)
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{
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unsigned long i = (unsigned long)x;
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return __ilog2(i & -i) + 1;
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}
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/*
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* fls: find last (most-significant) bit set.
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* Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
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*/
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#define fls(x) generic_fls(x)
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/*
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* hweightN: returns the hamming weight (i.e. the number
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* of bits set) of a N-bit word
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*/
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#define hweight64(x) generic_hweight64(x)
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#define hweight32(x) generic_hweight32(x)
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#define hweight16(x) generic_hweight16(x)
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#define hweight8(x) generic_hweight8(x)
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extern unsigned long find_next_zero_bit(const unsigned long *addr, unsigned long size, unsigned long offset);
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#define find_first_zero_bit(addr, size) \
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find_next_zero_bit((addr), (size), 0)
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extern unsigned long find_next_bit(const unsigned long *addr, unsigned long size, unsigned long offset);
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#define find_first_bit(addr, size) \
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find_next_bit((addr), (size), 0)
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extern unsigned long find_next_zero_le_bit(const unsigned long *addr, unsigned long size, unsigned long offset);
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#define find_first_zero_le_bit(addr, size) \
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find_next_zero_le_bit((addr), (size), 0)
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static __inline__ int test_le_bit(unsigned long nr, __const__ unsigned long * addr)
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{
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__const__ unsigned char *ADDR = (__const__ unsigned char *) addr;
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return (ADDR[nr >> 3] >> (nr & 7)) & 1;
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}
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#define test_and_clear_le_bit(nr, addr) \
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test_and_clear_bit((nr) ^ 0x38, (addr))
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#define test_and_set_le_bit(nr, addr) \
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test_and_set_bit((nr) ^ 0x38, (addr))
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/*
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* non-atomic versions
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*/
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#define __set_le_bit(nr, addr) \
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__set_bit((nr) ^ 0x38, (addr))
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#define __clear_le_bit(nr, addr) \
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__clear_bit((nr) ^ 0x38, (addr))
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#define __test_and_clear_le_bit(nr, addr) \
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__test_and_clear_bit((nr) ^ 0x38, (addr))
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#define __test_and_set_le_bit(nr, addr) \
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__test_and_set_bit((nr) ^ 0x38, (addr))
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#define ext2_set_bit(nr,addr) \
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__test_and_set_le_bit((nr), (unsigned long*)addr)
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#define ext2_clear_bit(nr, addr) \
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__test_and_clear_le_bit((nr), (unsigned long*)addr)
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#define ext2_set_bit_atomic(lock, nr, addr) \
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test_and_set_le_bit((nr), (unsigned long*)addr)
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#define ext2_clear_bit_atomic(lock, nr, addr) \
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test_and_clear_le_bit((nr), (unsigned long*)addr)
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#define ext2_test_bit(nr, addr) test_le_bit((nr),(unsigned long*)addr)
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#define ext2_find_first_zero_bit(addr, size) \
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find_first_zero_le_bit((unsigned long*)addr, size)
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#define ext2_find_next_zero_bit(addr, size, off) \
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find_next_zero_le_bit((unsigned long*)addr, size, off)
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#define minix_test_and_set_bit(nr,addr) test_and_set_bit(nr,addr)
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#define minix_set_bit(nr,addr) set_bit(nr,addr)
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#define minix_test_and_clear_bit(nr,addr) test_and_clear_bit(nr,addr)
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#define minix_test_bit(nr,addr) test_bit(nr,addr)
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#define minix_find_first_zero_bit(addr,size) find_first_zero_bit(addr,size)
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#endif /* __KERNEL__ */
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#endif /* _PPC64_BITOPS_H */
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