140 lines
3.9 KiB
C
140 lines
3.9 KiB
C
/*
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* PPC64 Huge TLB Page Support for hash based MMUs (POWER4 and later)
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*
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* Copyright (C) 2003 David Gibson, IBM Corporation.
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*
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* Based on the IA-32 version:
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* Copyright (C) 2002, Rohit Seth <rohit.seth@intel.com>
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*/
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#include <linux/mm.h>
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#include <linux/hugetlb.h>
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#include <asm/pgtable.h>
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#include <asm/pgalloc.h>
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#include <asm/cacheflush.h>
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#include <asm/machdep.h>
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int __hash_page_huge(unsigned long ea, unsigned long access, unsigned long vsid,
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pte_t *ptep, unsigned long trap, int local, int ssize,
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unsigned int shift, unsigned int mmu_psize)
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{
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unsigned long old_pte, new_pte;
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unsigned long va, rflags, pa, sz;
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long slot;
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int err = 1;
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BUG_ON(shift != mmu_psize_defs[mmu_psize].shift);
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/* Search the Linux page table for a match with va */
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va = hpt_va(ea, vsid, ssize);
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/*
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* Check the user's access rights to the page. If access should be
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* prevented then send the problem up to do_page_fault.
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*/
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if (unlikely(access & ~pte_val(*ptep)))
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goto out;
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/*
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* At this point, we have a pte (old_pte) which can be used to build
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* or update an HPTE. There are 2 cases:
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*
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* 1. There is a valid (present) pte with no associated HPTE (this is
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* the most common case)
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* 2. There is a valid (present) pte with an associated HPTE. The
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* current values of the pp bits in the HPTE prevent access
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* because we are doing software DIRTY bit management and the
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* page is currently not DIRTY.
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*/
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do {
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old_pte = pte_val(*ptep);
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if (old_pte & _PAGE_BUSY)
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goto out;
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new_pte = old_pte | _PAGE_BUSY | _PAGE_ACCESSED;
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} while(old_pte != __cmpxchg_u64((unsigned long *)ptep,
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old_pte, new_pte));
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rflags = 0x2 | (!(new_pte & _PAGE_RW));
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/* _PAGE_EXEC -> HW_NO_EXEC since it's inverted */
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rflags |= ((new_pte & _PAGE_EXEC) ? 0 : HPTE_R_N);
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sz = ((1UL) << shift);
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if (!cpu_has_feature(CPU_FTR_COHERENT_ICACHE))
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/* No CPU has hugepages but lacks no execute, so we
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* don't need to worry about that case */
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rflags = hash_page_do_lazy_icache(rflags, __pte(old_pte), trap);
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/* Check if pte already has an hpte (case 2) */
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if (unlikely(old_pte & _PAGE_HASHPTE)) {
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/* There MIGHT be an HPTE for this pte */
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unsigned long hash, slot;
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hash = hpt_hash(va, shift, ssize);
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if (old_pte & _PAGE_F_SECOND)
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hash = ~hash;
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slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
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slot += (old_pte & _PAGE_F_GIX) >> 12;
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if (ppc_md.hpte_updatepp(slot, rflags, va, mmu_psize,
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ssize, local) == -1)
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old_pte &= ~_PAGE_HPTEFLAGS;
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}
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if (likely(!(old_pte & _PAGE_HASHPTE))) {
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unsigned long hash = hpt_hash(va, shift, ssize);
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unsigned long hpte_group;
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pa = pte_pfn(__pte(old_pte)) << PAGE_SHIFT;
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repeat:
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hpte_group = ((hash & htab_hash_mask) *
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HPTES_PER_GROUP) & ~0x7UL;
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/* clear HPTE slot informations in new PTE */
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#ifdef CONFIG_PPC_64K_PAGES
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new_pte = (new_pte & ~_PAGE_HPTEFLAGS) | _PAGE_HPTE_SUB0;
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#else
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new_pte = (new_pte & ~_PAGE_HPTEFLAGS) | _PAGE_HASHPTE;
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#endif
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/* Add in WIMG bits */
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rflags |= (new_pte & (_PAGE_WRITETHRU | _PAGE_NO_CACHE |
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_PAGE_COHERENT | _PAGE_GUARDED));
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/* Insert into the hash table, primary slot */
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slot = ppc_md.hpte_insert(hpte_group, va, pa, rflags, 0,
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mmu_psize, ssize);
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/* Primary is full, try the secondary */
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if (unlikely(slot == -1)) {
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hpte_group = ((~hash & htab_hash_mask) *
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HPTES_PER_GROUP) & ~0x7UL;
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slot = ppc_md.hpte_insert(hpte_group, va, pa, rflags,
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HPTE_V_SECONDARY,
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mmu_psize, ssize);
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if (slot == -1) {
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if (mftb() & 0x1)
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hpte_group = ((hash & htab_hash_mask) *
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HPTES_PER_GROUP)&~0x7UL;
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ppc_md.hpte_remove(hpte_group);
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goto repeat;
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}
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}
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if (unlikely(slot == -2))
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panic("hash_huge_page: pte_insert failed\n");
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new_pte |= (slot << 12) & (_PAGE_F_SECOND | _PAGE_F_GIX);
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}
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/*
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* No need to use ldarx/stdcx here
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*/
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*ptep = __pte(new_pte & ~_PAGE_BUSY);
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err = 0;
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out:
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return err;
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}
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