267 lines
6.5 KiB
C
267 lines
6.5 KiB
C
/*
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* ST Microelectronics SPEAr Pulse Width Modulator driver
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*
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* Copyright (C) 2012 ST Microelectronics
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* Shiraz Hashim <shiraz.linux.kernel@gmail.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/ioport.h>
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#include <linux/kernel.h>
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#include <linux/math64.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/pwm.h>
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#include <linux/slab.h>
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#include <linux/types.h>
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#define NUM_PWM 4
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/* PWM registers and bits definitions */
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#define PWMCR 0x00 /* Control Register */
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#define PWMCR_PWM_ENABLE 0x1
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#define PWMCR_PRESCALE_SHIFT 2
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#define PWMCR_MIN_PRESCALE 0x00
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#define PWMCR_MAX_PRESCALE 0x3FFF
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#define PWMDCR 0x04 /* Duty Cycle Register */
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#define PWMDCR_MIN_DUTY 0x0001
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#define PWMDCR_MAX_DUTY 0xFFFF
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#define PWMPCR 0x08 /* Period Register */
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#define PWMPCR_MIN_PERIOD 0x0001
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#define PWMPCR_MAX_PERIOD 0xFFFF
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/* Following only available on 13xx SoCs */
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#define PWMMCR 0x3C /* Master Control Register */
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#define PWMMCR_PWM_ENABLE 0x1
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/**
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* struct spear_pwm_chip - struct representing pwm chip
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*
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* @mmio_base: base address of pwm chip
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* @clk: pointer to clk structure of pwm chip
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* @chip: linux pwm chip representation
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*/
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struct spear_pwm_chip {
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void __iomem *mmio_base;
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struct clk *clk;
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struct pwm_chip chip;
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};
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static inline struct spear_pwm_chip *to_spear_pwm_chip(struct pwm_chip *chip)
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{
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return container_of(chip, struct spear_pwm_chip, chip);
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}
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static inline u32 spear_pwm_readl(struct spear_pwm_chip *chip, unsigned int num,
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unsigned long offset)
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{
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return readl_relaxed(chip->mmio_base + (num << 4) + offset);
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}
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static inline void spear_pwm_writel(struct spear_pwm_chip *chip,
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unsigned int num, unsigned long offset,
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unsigned long val)
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{
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writel_relaxed(val, chip->mmio_base + (num << 4) + offset);
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}
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static int spear_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
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int duty_ns, int period_ns)
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{
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struct spear_pwm_chip *pc = to_spear_pwm_chip(chip);
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u64 val, div, clk_rate;
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unsigned long prescale = PWMCR_MIN_PRESCALE, pv, dc;
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int ret;
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/*
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* Find pv, dc and prescale to suit duty_ns and period_ns. This is done
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* according to formulas described below:
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*
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* period_ns = 10^9 * (PRESCALE + 1) * PV / PWM_CLK_RATE
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* duty_ns = 10^9 * (PRESCALE + 1) * DC / PWM_CLK_RATE
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*
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* PV = (PWM_CLK_RATE * period_ns) / (10^9 * (PRESCALE + 1))
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* DC = (PWM_CLK_RATE * duty_ns) / (10^9 * (PRESCALE + 1))
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*/
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clk_rate = clk_get_rate(pc->clk);
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while (1) {
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div = 1000000000;
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div *= 1 + prescale;
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val = clk_rate * period_ns;
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pv = div64_u64(val, div);
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val = clk_rate * duty_ns;
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dc = div64_u64(val, div);
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/* if duty_ns and period_ns are not achievable then return */
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if (pv < PWMPCR_MIN_PERIOD || dc < PWMDCR_MIN_DUTY)
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return -EINVAL;
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/*
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* if pv and dc have crossed their upper limit, then increase
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* prescale and recalculate pv and dc.
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*/
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if (pv > PWMPCR_MAX_PERIOD || dc > PWMDCR_MAX_DUTY) {
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if (++prescale > PWMCR_MAX_PRESCALE)
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return -EINVAL;
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continue;
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}
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break;
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}
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/*
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* NOTE: the clock to PWM has to be enabled first before writing to the
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* registers.
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*/
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ret = clk_enable(pc->clk);
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if (ret)
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return ret;
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spear_pwm_writel(pc, pwm->hwpwm, PWMCR,
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prescale << PWMCR_PRESCALE_SHIFT);
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spear_pwm_writel(pc, pwm->hwpwm, PWMDCR, dc);
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spear_pwm_writel(pc, pwm->hwpwm, PWMPCR, pv);
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clk_disable(pc->clk);
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return 0;
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}
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static int spear_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
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{
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struct spear_pwm_chip *pc = to_spear_pwm_chip(chip);
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int rc = 0;
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u32 val;
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rc = clk_enable(pc->clk);
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if (rc)
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return rc;
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val = spear_pwm_readl(pc, pwm->hwpwm, PWMCR);
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val |= PWMCR_PWM_ENABLE;
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spear_pwm_writel(pc, pwm->hwpwm, PWMCR, val);
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return 0;
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}
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static void spear_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
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{
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struct spear_pwm_chip *pc = to_spear_pwm_chip(chip);
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u32 val;
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val = spear_pwm_readl(pc, pwm->hwpwm, PWMCR);
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val &= ~PWMCR_PWM_ENABLE;
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spear_pwm_writel(pc, pwm->hwpwm, PWMCR, val);
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clk_disable(pc->clk);
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}
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static const struct pwm_ops spear_pwm_ops = {
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.config = spear_pwm_config,
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.enable = spear_pwm_enable,
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.disable = spear_pwm_disable,
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.owner = THIS_MODULE,
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};
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static int spear_pwm_probe(struct platform_device *pdev)
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{
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struct device_node *np = pdev->dev.of_node;
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struct spear_pwm_chip *pc;
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struct resource *r;
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int ret;
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u32 val;
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pc = devm_kzalloc(&pdev->dev, sizeof(*pc), GFP_KERNEL);
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if (!pc)
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return -ENOMEM;
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r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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pc->mmio_base = devm_ioremap_resource(&pdev->dev, r);
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if (IS_ERR(pc->mmio_base))
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return PTR_ERR(pc->mmio_base);
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pc->clk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(pc->clk))
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return PTR_ERR(pc->clk);
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platform_set_drvdata(pdev, pc);
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pc->chip.dev = &pdev->dev;
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pc->chip.ops = &spear_pwm_ops;
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pc->chip.base = -1;
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pc->chip.npwm = NUM_PWM;
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ret = clk_prepare(pc->clk);
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if (ret)
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return ret;
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if (of_device_is_compatible(np, "st,spear1340-pwm")) {
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ret = clk_enable(pc->clk);
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if (ret) {
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clk_unprepare(pc->clk);
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return ret;
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}
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/*
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* Following enables PWM chip, channels would still be
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* enabled individually through their control register
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*/
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val = readl_relaxed(pc->mmio_base + PWMMCR);
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val |= PWMMCR_PWM_ENABLE;
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writel_relaxed(val, pc->mmio_base + PWMMCR);
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clk_disable(pc->clk);
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}
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ret = pwmchip_add(&pc->chip);
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if (ret < 0) {
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clk_unprepare(pc->clk);
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dev_err(&pdev->dev, "pwmchip_add() failed: %d\n", ret);
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}
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return ret;
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}
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static int spear_pwm_remove(struct platform_device *pdev)
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{
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struct spear_pwm_chip *pc = platform_get_drvdata(pdev);
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int i;
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for (i = 0; i < NUM_PWM; i++)
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pwm_disable(&pc->chip.pwms[i]);
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/* clk was prepared in probe, hence unprepare it here */
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clk_unprepare(pc->clk);
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return pwmchip_remove(&pc->chip);
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}
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static const struct of_device_id spear_pwm_of_match[] = {
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{ .compatible = "st,spear320-pwm" },
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{ .compatible = "st,spear1340-pwm" },
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{ }
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};
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MODULE_DEVICE_TABLE(of, spear_pwm_of_match);
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static struct platform_driver spear_pwm_driver = {
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.driver = {
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.name = "spear-pwm",
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.of_match_table = spear_pwm_of_match,
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},
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.probe = spear_pwm_probe,
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.remove = spear_pwm_remove,
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};
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module_platform_driver(spear_pwm_driver);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Shiraz Hashim <shiraz.linux.kernel@gmail.com>");
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MODULE_AUTHOR("Viresh Kumar <viresh.kumar@linaro.com>");
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MODULE_ALIAS("platform:spear-pwm");
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