260 lines
6.3 KiB
C
260 lines
6.3 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Watchdog driver for the UniPhier watchdog timer
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*
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* (c) Copyright 2014 Panasonic Corporation
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* (c) Copyright 2016 Socionext Inc.
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* All rights reserved.
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*/
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#include <linux/bitops.h>
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#include <linux/mfd/syscon.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <linux/watchdog.h>
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/* WDT timer setting register */
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#define WDTTIMSET 0x3004
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#define WDTTIMSET_PERIOD_MASK (0xf << 0)
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#define WDTTIMSET_PERIOD_1_SEC (0x3 << 0)
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/* WDT reset selection register */
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#define WDTRSTSEL 0x3008
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#define WDTRSTSEL_RSTSEL_MASK (0x3 << 0)
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#define WDTRSTSEL_RSTSEL_BOTH (0x0 << 0)
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#define WDTRSTSEL_RSTSEL_IRQ_ONLY (0x2 << 0)
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/* WDT control register */
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#define WDTCTRL 0x300c
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#define WDTCTRL_STATUS BIT(8)
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#define WDTCTRL_CLEAR BIT(1)
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#define WDTCTRL_ENABLE BIT(0)
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#define SEC_TO_WDTTIMSET_PRD(sec) \
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(ilog2(sec) + WDTTIMSET_PERIOD_1_SEC)
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#define WDTST_TIMEOUT 1000 /* usec */
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#define WDT_DEFAULT_TIMEOUT 64 /* Default is 64 seconds */
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#define WDT_PERIOD_MIN 1
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#define WDT_PERIOD_MAX 128
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static unsigned int timeout = 0;
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static bool nowayout = WATCHDOG_NOWAYOUT;
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struct uniphier_wdt_dev {
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struct watchdog_device wdt_dev;
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struct regmap *regmap;
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};
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/*
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* UniPhier Watchdog operations
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*/
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static int uniphier_watchdog_ping(struct watchdog_device *w)
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{
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struct uniphier_wdt_dev *wdev = watchdog_get_drvdata(w);
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unsigned int val;
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int ret;
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/* Clear counter */
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ret = regmap_write_bits(wdev->regmap, WDTCTRL,
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WDTCTRL_CLEAR, WDTCTRL_CLEAR);
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if (!ret)
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/*
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* As SoC specification, after clear counter,
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* it needs to wait until counter status is 1.
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*/
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ret = regmap_read_poll_timeout(wdev->regmap, WDTCTRL, val,
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(val & WDTCTRL_STATUS),
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0, WDTST_TIMEOUT);
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return ret;
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}
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static int __uniphier_watchdog_start(struct regmap *regmap, unsigned int sec)
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{
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unsigned int val;
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int ret;
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ret = regmap_read_poll_timeout(regmap, WDTCTRL, val,
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!(val & WDTCTRL_STATUS),
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0, WDTST_TIMEOUT);
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if (ret)
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return ret;
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/* Setup period */
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ret = regmap_write(regmap, WDTTIMSET,
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SEC_TO_WDTTIMSET_PRD(sec));
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if (ret)
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return ret;
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/* Enable and clear watchdog */
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ret = regmap_write(regmap, WDTCTRL, WDTCTRL_ENABLE | WDTCTRL_CLEAR);
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if (!ret)
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/*
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* As SoC specification, after clear counter,
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* it needs to wait until counter status is 1.
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*/
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ret = regmap_read_poll_timeout(regmap, WDTCTRL, val,
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(val & WDTCTRL_STATUS),
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0, WDTST_TIMEOUT);
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return ret;
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}
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static int __uniphier_watchdog_stop(struct regmap *regmap)
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{
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/* Disable and stop watchdog */
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return regmap_write_bits(regmap, WDTCTRL, WDTCTRL_ENABLE, 0);
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}
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static int __uniphier_watchdog_restart(struct regmap *regmap, unsigned int sec)
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{
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int ret;
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ret = __uniphier_watchdog_stop(regmap);
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if (ret)
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return ret;
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return __uniphier_watchdog_start(regmap, sec);
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}
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static int uniphier_watchdog_start(struct watchdog_device *w)
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{
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struct uniphier_wdt_dev *wdev = watchdog_get_drvdata(w);
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unsigned int tmp_timeout;
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tmp_timeout = roundup_pow_of_two(w->timeout);
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return __uniphier_watchdog_start(wdev->regmap, tmp_timeout);
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}
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static int uniphier_watchdog_stop(struct watchdog_device *w)
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{
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struct uniphier_wdt_dev *wdev = watchdog_get_drvdata(w);
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return __uniphier_watchdog_stop(wdev->regmap);
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}
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static int uniphier_watchdog_set_timeout(struct watchdog_device *w,
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unsigned int t)
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{
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struct uniphier_wdt_dev *wdev = watchdog_get_drvdata(w);
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unsigned int tmp_timeout;
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int ret;
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tmp_timeout = roundup_pow_of_two(t);
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if (tmp_timeout == w->timeout)
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return 0;
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if (watchdog_active(w)) {
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ret = __uniphier_watchdog_restart(wdev->regmap, tmp_timeout);
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if (ret)
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return ret;
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}
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w->timeout = tmp_timeout;
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return 0;
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}
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/*
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* Kernel Interfaces
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*/
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static const struct watchdog_info uniphier_wdt_info = {
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.identity = "uniphier-wdt",
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.options = WDIOF_SETTIMEOUT |
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WDIOF_KEEPALIVEPING |
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WDIOF_MAGICCLOSE |
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WDIOF_OVERHEAT,
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};
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static const struct watchdog_ops uniphier_wdt_ops = {
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.owner = THIS_MODULE,
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.start = uniphier_watchdog_start,
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.stop = uniphier_watchdog_stop,
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.ping = uniphier_watchdog_ping,
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.set_timeout = uniphier_watchdog_set_timeout,
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};
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static int uniphier_wdt_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct uniphier_wdt_dev *wdev;
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struct regmap *regmap;
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struct device_node *parent;
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int ret;
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wdev = devm_kzalloc(dev, sizeof(*wdev), GFP_KERNEL);
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if (!wdev)
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return -ENOMEM;
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platform_set_drvdata(pdev, wdev);
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parent = of_get_parent(dev->of_node); /* parent should be syscon node */
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regmap = syscon_node_to_regmap(parent);
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of_node_put(parent);
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if (IS_ERR(regmap))
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return PTR_ERR(regmap);
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wdev->regmap = regmap;
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wdev->wdt_dev.info = &uniphier_wdt_info;
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wdev->wdt_dev.ops = &uniphier_wdt_ops;
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wdev->wdt_dev.max_timeout = WDT_PERIOD_MAX;
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wdev->wdt_dev.min_timeout = WDT_PERIOD_MIN;
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wdev->wdt_dev.timeout = WDT_DEFAULT_TIMEOUT;
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wdev->wdt_dev.parent = dev;
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watchdog_init_timeout(&wdev->wdt_dev, timeout, dev);
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watchdog_set_nowayout(&wdev->wdt_dev, nowayout);
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watchdog_stop_on_reboot(&wdev->wdt_dev);
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watchdog_set_drvdata(&wdev->wdt_dev, wdev);
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uniphier_watchdog_stop(&wdev->wdt_dev);
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ret = regmap_write(wdev->regmap, WDTRSTSEL, WDTRSTSEL_RSTSEL_BOTH);
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if (ret)
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return ret;
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ret = devm_watchdog_register_device(dev, &wdev->wdt_dev);
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if (ret)
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return ret;
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dev_info(dev, "watchdog driver (timeout=%d sec, nowayout=%d)\n",
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wdev->wdt_dev.timeout, nowayout);
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return 0;
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}
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static const struct of_device_id uniphier_wdt_dt_ids[] = {
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{ .compatible = "socionext,uniphier-wdt" },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, uniphier_wdt_dt_ids);
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static struct platform_driver uniphier_wdt_driver = {
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.probe = uniphier_wdt_probe,
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.driver = {
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.name = "uniphier-wdt",
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.of_match_table = uniphier_wdt_dt_ids,
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},
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};
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module_platform_driver(uniphier_wdt_driver);
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module_param(timeout, uint, 0000);
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MODULE_PARM_DESC(timeout,
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"Watchdog timeout seconds in power of 2. (0 < timeout < 128, default="
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__MODULE_STRING(WDT_DEFAULT_TIMEOUT) ")");
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module_param(nowayout, bool, 0000);
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MODULE_PARM_DESC(nowayout,
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"Watchdog cannot be stopped once started (default="
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__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
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MODULE_AUTHOR("Keiji Hayashibara <hayashibara.keiji@socionext.com>");
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MODULE_DESCRIPTION("UniPhier Watchdog Device Driver");
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MODULE_LICENSE("GPL v2");
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