178 lines
4.0 KiB
C
178 lines
4.0 KiB
C
/*
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* linux/arch/arm/mach-iop3xx/iop321-setup.c
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*
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* Author: Nicolas Pitre <nico@cam.org>
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* Copyright (C) 2001 MontaVista Software, Inc.
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* Copyright (C) 2004 Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/mm.h>
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#include <linux/init.h>
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#include <linux/config.h>
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#include <linux/init.h>
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#include <linux/major.h>
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#include <linux/fs.h>
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#include <linux/device.h>
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#include <linux/serial.h>
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#include <linux/tty.h>
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#include <linux/serial_core.h>
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#include <asm/io.h>
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#include <asm/pgtable.h>
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#include <asm/page.h>
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#include <asm/mach/map.h>
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#include <asm/setup.h>
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#include <asm/system.h>
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#include <asm/memory.h>
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#include <asm/hardware.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#define IOP321_UART_XTAL 1843200
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/*
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* Standard IO mapping for all IOP321 based systems
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*/
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static struct map_desc iop321_std_desc[] __initdata = {
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{ /* mem mapped registers */
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.virtual = IOP321_VIRT_MEM_BASE,
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.pfn = __phys_to_pfn(IOP321_PHYS_MEM_BASE),
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.length = 0x00002000,
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.type = MT_DEVICE
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}, { /* PCI IO space */
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.virtual = IOP321_PCI_LOWER_IO_VA,
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.pfn = __phys_to_pfn(IOP321_PCI_LOWER_IO_PA),
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.length = IOP321_PCI_IO_WINDOW_SIZE,
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.type = MT_DEVICE
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}
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};
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#ifdef CONFIG_ARCH_IQ80321
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#define UARTBASE IQ80321_UART
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#define IRQ_UART IRQ_IQ80321_UART
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#endif
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#ifdef CONFIG_ARCH_IQ31244
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#define UARTBASE IQ31244_UART
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#define IRQ_UART IRQ_IQ31244_UART
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#endif
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static struct uart_port iop321_serial_ports[] = {
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{
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.membase = (char*)(UARTBASE),
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.mapbase = (UARTBASE),
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.irq = IRQ_UART,
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.flags = UPF_SKIP_TEST,
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.iotype = UPIO_MEM,
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.regshift = 0,
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.uartclk = IOP321_UART_XTAL,
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.line = 0,
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.type = PORT_16550A,
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.fifosize = 16
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}
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};
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static struct resource iop32x_i2c_0_resources[] = {
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[0] = {
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.start = 0xfffff680,
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.end = 0xfffff698,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_IOP321_I2C_0,
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.end = IRQ_IOP321_I2C_0,
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.flags = IORESOURCE_IRQ
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}
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};
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static struct resource iop32x_i2c_1_resources[] = {
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[0] = {
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.start = 0xfffff6a0,
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.end = 0xfffff6b8,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_IOP321_I2C_1,
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.end = IRQ_IOP321_I2C_1,
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.flags = IORESOURCE_IRQ
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}
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};
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static struct platform_device iop32x_i2c_0_controller = {
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.name = "IOP3xx-I2C",
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.id = 0,
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.num_resources = 2,
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.resource = iop32x_i2c_0_resources
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};
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static struct platform_device iop32x_i2c_1_controller = {
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.name = "IOP3xx-I2C",
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.id = 1,
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.num_resources = 2,
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.resource = iop32x_i2c_1_resources
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};
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static struct platform_device *iop32x_devices[] __initdata = {
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&iop32x_i2c_0_controller,
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&iop32x_i2c_1_controller
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};
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void __init iop32x_init(void)
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{
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if(iop_is_321())
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{
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platform_add_devices(iop32x_devices,
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ARRAY_SIZE(iop32x_devices));
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}
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}
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void __init iop321_map_io(void)
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{
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iotable_init(iop321_std_desc, ARRAY_SIZE(iop321_std_desc));
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early_serial_setup(&iop321_serial_ports[0]);
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}
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#ifdef CONFIG_ARCH_IQ80321
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extern void iq80321_map_io(void);
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extern struct sys_timer iop321_timer;
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extern void iop321_init_time(void);
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#endif
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#ifdef CONFIG_ARCH_IQ31244
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extern void iq31244_map_io(void);
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extern struct sys_timer iop321_timer;
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extern void iop321_init_time(void);
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#endif
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#if defined(CONFIG_ARCH_IQ80321)
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MACHINE_START(IQ80321, "Intel IQ80321")
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/* Maintainer: Intel Corporation */
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.phys_ram = PHYS_OFFSET,
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.phys_io = IQ80321_UART,
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.io_pg_offst = ((IQ80321_UART) >> 18) & 0xfffc,
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.map_io = iq80321_map_io,
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.init_irq = iop321_init_irq,
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.timer = &iop321_timer,
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.boot_params = 0xa0000100,
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.init_machine = iop32x_init,
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MACHINE_END
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#elif defined(CONFIG_ARCH_IQ31244)
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MACHINE_START(IQ31244, "Intel IQ31244")
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/* Maintainer: Intel Corp. */
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.phys_ram = PHYS_OFFSET,
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.phys_io = IQ31244_UART,
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.io_pg_offst = ((IQ31244_UART) >> 18) & 0xfffc,
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.map_io = iq31244_map_io,
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.init_irq = iop321_init_irq,
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.timer = &iop321_timer,
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.boot_params = 0xa0000100,
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.init_machine = iop32x_init,
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MACHINE_END
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#else
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#error No machine descriptor defined for this IOP3XX implementation
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#endif
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