272 lines
8.6 KiB
C
272 lines
8.6 KiB
C
/*
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* Copyright 2010 Tilera Corporation. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for
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* more details.
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*/
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#include <linux/string.h>
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#include <linux/smp.h>
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#include <linux/module.h>
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#include <linux/uaccess.h>
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#include <asm/fixmap.h>
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#include <asm/kmap_types.h>
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#include <asm/tlbflush.h>
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#include <hv/hypervisor.h>
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#include <arch/chip.h>
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#if !CHIP_HAS_COHERENT_LOCAL_CACHE()
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/* Defined in memcpy.S */
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extern unsigned long __memcpy_asm(void *to, const void *from, unsigned long n);
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extern unsigned long __copy_to_user_inatomic_asm(
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void __user *to, const void *from, unsigned long n);
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extern unsigned long __copy_from_user_inatomic_asm(
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void *to, const void __user *from, unsigned long n);
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extern unsigned long __copy_from_user_zeroing_asm(
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void *to, const void __user *from, unsigned long n);
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typedef unsigned long (*memcpy_t)(void *, const void *, unsigned long);
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/* Size above which to consider TLB games for performance */
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#define LARGE_COPY_CUTOFF 2048
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/* Communicate to the simulator what we are trying to do. */
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#define sim_allow_multiple_caching(b) \
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__insn_mtspr(SPR_SIM_CONTROL, \
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SIM_CONTROL_ALLOW_MULTIPLE_CACHING | ((b) << _SIM_CONTROL_OPERATOR_BITS))
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/*
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* Copy memory by briefly enabling incoherent cacheline-at-a-time mode.
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*
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* We set up our own source and destination PTEs that we fully control.
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* This is the only way to guarantee that we don't race with another
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* thread that is modifying the PTE; we can't afford to try the
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* copy_{to,from}_user() technique of catching the interrupt, since
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* we must run with interrupts disabled to avoid the risk of some
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* other code seeing the incoherent data in our cache. (Recall that
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* our cache is indexed by PA, so even if the other code doesn't use
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* our KM_MEMCPY virtual addresses, they'll still hit in cache using
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* the normal VAs that aren't supposed to hit in cache.)
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*/
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static void memcpy_multicache(void *dest, const void *source,
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pte_t dst_pte, pte_t src_pte, int len)
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{
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int idx;
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unsigned long flags, newsrc, newdst;
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pmd_t *pmdp;
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pte_t *ptep;
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int cpu = get_cpu();
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/*
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* Disable interrupts so that we don't recurse into memcpy()
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* in an interrupt handler, nor accidentally reference
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* the PA of the source from an interrupt routine. Also
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* notify the simulator that we're playing games so we don't
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* generate spurious coherency warnings.
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*/
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local_irq_save(flags);
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sim_allow_multiple_caching(1);
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/* Set up the new dest mapping */
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idx = FIX_KMAP_BEGIN + (KM_TYPE_NR * cpu) + KM_MEMCPY0;
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newdst = __fix_to_virt(idx) + ((unsigned long)dest & (PAGE_SIZE-1));
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pmdp = pmd_offset(pud_offset(pgd_offset_k(newdst), newdst), newdst);
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ptep = pte_offset_kernel(pmdp, newdst);
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if (pte_val(*ptep) != pte_val(dst_pte)) {
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set_pte(ptep, dst_pte);
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local_flush_tlb_page(NULL, newdst, PAGE_SIZE);
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}
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/* Set up the new source mapping */
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idx += (KM_MEMCPY0 - KM_MEMCPY1);
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src_pte = hv_pte_set_nc(src_pte);
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src_pte = hv_pte_clear_writable(src_pte); /* be paranoid */
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newsrc = __fix_to_virt(idx) + ((unsigned long)source & (PAGE_SIZE-1));
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pmdp = pmd_offset(pud_offset(pgd_offset_k(newsrc), newsrc), newsrc);
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ptep = pte_offset_kernel(pmdp, newsrc);
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*ptep = src_pte; /* set_pte() would be confused by this */
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local_flush_tlb_page(NULL, newsrc, PAGE_SIZE);
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/* Actually move the data. */
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__memcpy_asm((void *)newdst, (const void *)newsrc, len);
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/*
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* Remap the source as locally-cached and not OLOC'ed so that
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* we can inval without also invaling the remote cpu's cache.
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* This also avoids known errata with inv'ing cacheable oloc data.
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*/
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src_pte = hv_pte_set_mode(src_pte, HV_PTE_MODE_CACHE_NO_L3);
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src_pte = hv_pte_set_writable(src_pte); /* need write access for inv */
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*ptep = src_pte; /* set_pte() would be confused by this */
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local_flush_tlb_page(NULL, newsrc, PAGE_SIZE);
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/*
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* Do the actual invalidation, covering the full L2 cache line
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* at the end since __memcpy_asm() is somewhat aggressive.
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*/
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__inv_buffer((void *)newsrc, len);
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/*
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* We're done: notify the simulator that all is back to normal,
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* and re-enable interrupts and pre-emption.
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*/
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sim_allow_multiple_caching(0);
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local_irq_restore(flags);
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put_cpu();
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}
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/*
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* Identify large copies from remotely-cached memory, and copy them
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* via memcpy_multicache() if they look good, otherwise fall back
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* to the particular kind of copying passed as the memcpy_t function.
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*/
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static unsigned long fast_copy(void *dest, const void *source, int len,
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memcpy_t func)
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{
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/*
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* Check if it's big enough to bother with. We may end up doing a
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* small copy via TLB manipulation if we're near a page boundary,
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* but presumably we'll make it up when we hit the second page.
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*/
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while (len >= LARGE_COPY_CUTOFF) {
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int copy_size, bytes_left_on_page;
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pte_t *src_ptep, *dst_ptep;
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pte_t src_pte, dst_pte;
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struct page *src_page, *dst_page;
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/* Is the source page oloc'ed to a remote cpu? */
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retry_source:
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src_ptep = virt_to_pte(current->mm, (unsigned long)source);
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if (src_ptep == NULL)
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break;
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src_pte = *src_ptep;
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if (!hv_pte_get_present(src_pte) ||
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!hv_pte_get_readable(src_pte) ||
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hv_pte_get_mode(src_pte) != HV_PTE_MODE_CACHE_TILE_L3)
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break;
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if (get_remote_cache_cpu(src_pte) == smp_processor_id())
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break;
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src_page = pfn_to_page(hv_pte_get_pfn(src_pte));
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get_page(src_page);
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if (pte_val(src_pte) != pte_val(*src_ptep)) {
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put_page(src_page);
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goto retry_source;
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}
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if (pte_huge(src_pte)) {
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/* Adjust the PTE to correspond to a small page */
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int pfn = hv_pte_get_pfn(src_pte);
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pfn += (((unsigned long)source & (HPAGE_SIZE-1))
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>> PAGE_SHIFT);
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src_pte = pfn_pte(pfn, src_pte);
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src_pte = pte_mksmall(src_pte);
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}
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/* Is the destination page writable? */
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retry_dest:
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dst_ptep = virt_to_pte(current->mm, (unsigned long)dest);
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if (dst_ptep == NULL) {
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put_page(src_page);
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break;
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}
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dst_pte = *dst_ptep;
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if (!hv_pte_get_present(dst_pte) ||
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!hv_pte_get_writable(dst_pte)) {
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put_page(src_page);
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break;
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}
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dst_page = pfn_to_page(hv_pte_get_pfn(dst_pte));
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if (dst_page == src_page) {
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/*
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* Source and dest are on the same page; this
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* potentially exposes us to incoherence if any
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* part of src and dest overlap on a cache line.
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* Just give up rather than trying to be precise.
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*/
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put_page(src_page);
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break;
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}
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get_page(dst_page);
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if (pte_val(dst_pte) != pte_val(*dst_ptep)) {
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put_page(dst_page);
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goto retry_dest;
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}
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if (pte_huge(dst_pte)) {
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/* Adjust the PTE to correspond to a small page */
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int pfn = hv_pte_get_pfn(dst_pte);
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pfn += (((unsigned long)dest & (HPAGE_SIZE-1))
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>> PAGE_SHIFT);
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dst_pte = pfn_pte(pfn, dst_pte);
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dst_pte = pte_mksmall(dst_pte);
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}
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/* All looks good: create a cachable PTE and copy from it */
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copy_size = len;
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bytes_left_on_page =
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PAGE_SIZE - (((int)source) & (PAGE_SIZE-1));
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if (copy_size > bytes_left_on_page)
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copy_size = bytes_left_on_page;
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bytes_left_on_page =
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PAGE_SIZE - (((int)dest) & (PAGE_SIZE-1));
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if (copy_size > bytes_left_on_page)
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copy_size = bytes_left_on_page;
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memcpy_multicache(dest, source, dst_pte, src_pte, copy_size);
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/* Release the pages */
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put_page(dst_page);
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put_page(src_page);
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/* Continue on the next page */
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dest += copy_size;
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source += copy_size;
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len -= copy_size;
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}
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return func(dest, source, len);
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}
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void *memcpy(void *to, const void *from, __kernel_size_t n)
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{
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if (n < LARGE_COPY_CUTOFF)
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return (void *)__memcpy_asm(to, from, n);
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else
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return (void *)fast_copy(to, from, n, __memcpy_asm);
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}
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unsigned long __copy_to_user_inatomic(void __user *to, const void *from,
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unsigned long n)
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{
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if (n < LARGE_COPY_CUTOFF)
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return __copy_to_user_inatomic_asm(to, from, n);
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else
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return fast_copy(to, from, n, __copy_to_user_inatomic_asm);
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}
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unsigned long __copy_from_user_inatomic(void *to, const void __user *from,
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unsigned long n)
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{
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if (n < LARGE_COPY_CUTOFF)
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return __copy_from_user_inatomic_asm(to, from, n);
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else
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return fast_copy(to, from, n, __copy_from_user_inatomic_asm);
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}
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unsigned long __copy_from_user_zeroing(void *to, const void __user *from,
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unsigned long n)
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{
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if (n < LARGE_COPY_CUTOFF)
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return __copy_from_user_zeroing_asm(to, from, n);
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else
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return fast_copy(to, from, n, __copy_from_user_zeroing_asm);
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}
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#endif /* !CHIP_HAS_COHERENT_LOCAL_CACHE() */
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