503 lines
9.8 KiB
C
503 lines
9.8 KiB
C
/*
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* Pinmuxed GPIO support for SuperH.
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*
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* Copyright (C) 2008 Magnus Damm
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/errno.h>
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#include <linux/kernel.h>
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#include <linux/list.h>
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#include <linux/module.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/bitops.h>
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#include <linux/gpio.h>
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static struct pinmux_info *registered_gpio;
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static struct pinmux_info *gpio_controller(unsigned gpio)
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{
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if (!registered_gpio)
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return NULL;
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if (gpio < registered_gpio->first_gpio)
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return NULL;
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if (gpio > registered_gpio->last_gpio)
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return NULL;
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return registered_gpio;
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}
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static int enum_in_range(pinmux_enum_t enum_id, struct pinmux_range *r)
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{
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if (enum_id < r->begin)
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return 0;
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if (enum_id > r->end)
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return 0;
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return 1;
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}
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static int read_write_reg(unsigned long reg, unsigned long reg_width,
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unsigned long field_width, unsigned long in_pos,
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unsigned long value, int do_write)
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{
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unsigned long data, mask, pos;
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data = 0;
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mask = (1 << field_width) - 1;
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pos = reg_width - ((in_pos + 1) * field_width);
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#ifdef DEBUG
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pr_info("%s, addr = %lx, value = %ld, pos = %ld, "
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"r_width = %ld, f_width = %ld\n",
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do_write ? "write" : "read", reg, value, pos,
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reg_width, field_width);
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#endif
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switch (reg_width) {
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case 8:
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data = ctrl_inb(reg);
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break;
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case 16:
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data = ctrl_inw(reg);
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break;
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case 32:
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data = ctrl_inl(reg);
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break;
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}
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if (!do_write)
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return (data >> pos) & mask;
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data &= ~(mask << pos);
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data |= value << pos;
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switch (reg_width) {
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case 8:
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ctrl_outb(data, reg);
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break;
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case 16:
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ctrl_outw(data, reg);
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break;
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case 32:
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ctrl_outl(data, reg);
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break;
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}
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return 0;
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}
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static int get_data_reg(struct pinmux_info *gpioc, unsigned gpio,
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struct pinmux_data_reg **drp, int *bitp)
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{
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pinmux_enum_t enum_id = gpioc->gpios[gpio].enum_id;
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struct pinmux_data_reg *data_reg;
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int k, n;
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if (!enum_in_range(enum_id, &gpioc->data))
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return -1;
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k = 0;
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while (1) {
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data_reg = gpioc->data_regs + k;
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if (!data_reg->reg_width)
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break;
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for (n = 0; n < data_reg->reg_width; n++) {
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if (data_reg->enum_ids[n] == enum_id) {
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*drp = data_reg;
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*bitp = n;
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return 0;
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}
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}
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k++;
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}
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return -1;
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}
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static int get_config_reg(struct pinmux_info *gpioc, pinmux_enum_t enum_id,
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struct pinmux_cfg_reg **crp, int *indexp,
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unsigned long **cntp)
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{
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struct pinmux_cfg_reg *config_reg;
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unsigned long r_width, f_width;
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int k, n;
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k = 0;
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while (1) {
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config_reg = gpioc->cfg_regs + k;
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r_width = config_reg->reg_width;
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f_width = config_reg->field_width;
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if (!r_width)
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break;
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for (n = 0; n < (r_width / f_width) * 1 << f_width; n++) {
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if (config_reg->enum_ids[n] == enum_id) {
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*crp = config_reg;
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*indexp = n;
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*cntp = &config_reg->cnt[n / (1 << f_width)];
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return 0;
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}
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}
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k++;
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}
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return -1;
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}
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static int get_gpio_enum_id(struct pinmux_info *gpioc, unsigned gpio,
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int pos, pinmux_enum_t *enum_idp)
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{
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pinmux_enum_t enum_id = gpioc->gpios[gpio].enum_id;
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pinmux_enum_t *data = gpioc->gpio_data;
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int k;
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if (!enum_in_range(enum_id, &gpioc->data)) {
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if (!enum_in_range(enum_id, &gpioc->mark)) {
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pr_err("non data/mark enum_id for gpio %d\n", gpio);
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return -1;
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}
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}
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if (pos) {
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*enum_idp = data[pos + 1];
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return pos + 1;
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}
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for (k = 0; k < gpioc->gpio_data_size; k++) {
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if (data[k] == enum_id) {
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*enum_idp = data[k + 1];
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return k + 1;
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}
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}
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pr_err("cannot locate data/mark enum_id for gpio %d\n", gpio);
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return -1;
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}
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static int write_config_reg(struct pinmux_info *gpioc,
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struct pinmux_cfg_reg *crp,
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int index)
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{
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unsigned long ncomb, pos, value;
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ncomb = 1 << crp->field_width;
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pos = index / ncomb;
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value = index % ncomb;
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return read_write_reg(crp->reg, crp->reg_width,
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crp->field_width, pos, value, 1);
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}
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static int check_config_reg(struct pinmux_info *gpioc,
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struct pinmux_cfg_reg *crp,
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int index)
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{
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unsigned long ncomb, pos, value;
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ncomb = 1 << crp->field_width;
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pos = index / ncomb;
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value = index % ncomb;
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if (read_write_reg(crp->reg, crp->reg_width,
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crp->field_width, pos, 0, 0) == value)
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return 0;
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return -1;
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}
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enum { GPIO_CFG_DRYRUN, GPIO_CFG_REQ, GPIO_CFG_FREE };
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int pinmux_config_gpio(struct pinmux_info *gpioc, unsigned gpio,
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int pinmux_type, int cfg_mode)
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{
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struct pinmux_cfg_reg *cr = NULL;
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pinmux_enum_t enum_id;
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struct pinmux_range *range;
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int in_range, pos, index;
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unsigned long *cntp;
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switch (pinmux_type) {
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case PINMUX_TYPE_FUNCTION:
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range = NULL;
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break;
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case PINMUX_TYPE_OUTPUT:
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range = &gpioc->output;
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break;
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case PINMUX_TYPE_INPUT:
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range = &gpioc->input;
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break;
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case PINMUX_TYPE_INPUT_PULLUP:
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range = &gpioc->input_pu;
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break;
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case PINMUX_TYPE_INPUT_PULLDOWN:
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range = &gpioc->input_pd;
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break;
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default:
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goto out_err;
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}
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pos = 0;
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enum_id = 0;
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index = 0;
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while (1) {
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pos = get_gpio_enum_id(gpioc, gpio, pos, &enum_id);
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if (pos <= 0)
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goto out_err;
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if (!enum_id)
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break;
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in_range = enum_in_range(enum_id, &gpioc->function);
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if (!in_range && range) {
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in_range = enum_in_range(enum_id, range);
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if (in_range && enum_id == range->force)
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continue;
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}
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if (!in_range)
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continue;
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if (get_config_reg(gpioc, enum_id, &cr, &index, &cntp) != 0)
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goto out_err;
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switch (cfg_mode) {
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case GPIO_CFG_DRYRUN:
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if (!*cntp || !check_config_reg(gpioc, cr, index))
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continue;
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break;
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case GPIO_CFG_REQ:
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if (write_config_reg(gpioc, cr, index) != 0)
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goto out_err;
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*cntp = *cntp + 1;
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break;
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case GPIO_CFG_FREE:
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*cntp = *cntp - 1;
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break;
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}
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}
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return 0;
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out_err:
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return -1;
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}
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static DEFINE_SPINLOCK(gpio_lock);
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int __gpio_request(unsigned gpio)
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{
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struct pinmux_info *gpioc = gpio_controller(gpio);
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struct pinmux_data_reg *dummy;
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unsigned long flags;
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int i, ret, pinmux_type;
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ret = -EINVAL;
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if (!gpioc)
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goto err_out;
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spin_lock_irqsave(&gpio_lock, flags);
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if ((gpioc->gpios[gpio].flags & PINMUX_FLAG_TYPE) != PINMUX_TYPE_NONE)
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goto err_unlock;
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/* setup pin function here if no data is associated with pin */
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if (get_data_reg(gpioc, gpio, &dummy, &i) != 0)
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pinmux_type = PINMUX_TYPE_FUNCTION;
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else
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pinmux_type = PINMUX_TYPE_GPIO;
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if (pinmux_type == PINMUX_TYPE_FUNCTION) {
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if (pinmux_config_gpio(gpioc, gpio,
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pinmux_type,
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GPIO_CFG_DRYRUN) != 0)
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goto err_unlock;
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if (pinmux_config_gpio(gpioc, gpio,
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pinmux_type,
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GPIO_CFG_REQ) != 0)
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BUG();
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}
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gpioc->gpios[gpio].flags = pinmux_type;
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ret = 0;
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err_unlock:
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spin_unlock_irqrestore(&gpio_lock, flags);
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err_out:
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return ret;
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}
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EXPORT_SYMBOL(__gpio_request);
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void gpio_free(unsigned gpio)
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{
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struct pinmux_info *gpioc = gpio_controller(gpio);
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unsigned long flags;
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int pinmux_type;
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if (!gpioc)
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return;
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spin_lock_irqsave(&gpio_lock, flags);
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pinmux_type = gpioc->gpios[gpio].flags & PINMUX_FLAG_TYPE;
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pinmux_config_gpio(gpioc, gpio, pinmux_type, GPIO_CFG_FREE);
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gpioc->gpios[gpio].flags = PINMUX_TYPE_NONE;
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spin_unlock_irqrestore(&gpio_lock, flags);
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}
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EXPORT_SYMBOL(gpio_free);
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static int pinmux_direction(struct pinmux_info *gpioc,
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unsigned gpio, int new_pinmux_type)
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{
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int ret, pinmux_type;
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ret = -EINVAL;
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pinmux_type = gpioc->gpios[gpio].flags & PINMUX_FLAG_TYPE;
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switch (pinmux_type) {
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case PINMUX_TYPE_GPIO:
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break;
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case PINMUX_TYPE_OUTPUT:
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case PINMUX_TYPE_INPUT:
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case PINMUX_TYPE_INPUT_PULLUP:
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case PINMUX_TYPE_INPUT_PULLDOWN:
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pinmux_config_gpio(gpioc, gpio, pinmux_type, GPIO_CFG_FREE);
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break;
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default:
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goto err_out;
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}
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if (pinmux_config_gpio(gpioc, gpio,
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new_pinmux_type,
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GPIO_CFG_DRYRUN) != 0)
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goto err_out;
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if (pinmux_config_gpio(gpioc, gpio,
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new_pinmux_type,
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GPIO_CFG_REQ) != 0)
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BUG();
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gpioc->gpios[gpio].flags = new_pinmux_type;
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ret = 0;
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err_out:
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return ret;
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}
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int gpio_direction_input(unsigned gpio)
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{
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struct pinmux_info *gpioc = gpio_controller(gpio);
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unsigned long flags;
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int ret = -EINVAL;
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if (!gpioc)
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goto err_out;
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spin_lock_irqsave(&gpio_lock, flags);
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ret = pinmux_direction(gpioc, gpio, PINMUX_TYPE_INPUT);
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spin_unlock_irqrestore(&gpio_lock, flags);
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err_out:
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return ret;
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}
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EXPORT_SYMBOL(gpio_direction_input);
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static int __gpio_get_set_value(struct pinmux_info *gpioc,
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unsigned gpio, int value,
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int do_write)
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{
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struct pinmux_data_reg *dr = NULL;
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int bit = 0;
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if (get_data_reg(gpioc, gpio, &dr, &bit) != 0)
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BUG();
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else
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value = read_write_reg(dr->reg, dr->reg_width,
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1, bit, !!value, do_write);
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return value;
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}
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int gpio_direction_output(unsigned gpio, int value)
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{
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struct pinmux_info *gpioc = gpio_controller(gpio);
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unsigned long flags;
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int ret = -EINVAL;
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if (!gpioc)
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goto err_out;
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spin_lock_irqsave(&gpio_lock, flags);
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__gpio_get_set_value(gpioc, gpio, value, 1);
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ret = pinmux_direction(gpioc, gpio, PINMUX_TYPE_OUTPUT);
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spin_unlock_irqrestore(&gpio_lock, flags);
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err_out:
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return ret;
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}
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EXPORT_SYMBOL(gpio_direction_output);
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int gpio_get_value(unsigned gpio)
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{
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struct pinmux_info *gpioc = gpio_controller(gpio);
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unsigned long flags;
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int value = 0;
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if (!gpioc)
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BUG();
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else {
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spin_lock_irqsave(&gpio_lock, flags);
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value = __gpio_get_set_value(gpioc, gpio, 0, 0);
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spin_unlock_irqrestore(&gpio_lock, flags);
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}
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return value;
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}
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EXPORT_SYMBOL(gpio_get_value);
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void gpio_set_value(unsigned gpio, int value)
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{
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struct pinmux_info *gpioc = gpio_controller(gpio);
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unsigned long flags;
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if (!gpioc)
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BUG();
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else {
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spin_lock_irqsave(&gpio_lock, flags);
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__gpio_get_set_value(gpioc, gpio, value, 1);
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spin_unlock_irqrestore(&gpio_lock, flags);
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}
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}
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EXPORT_SYMBOL(gpio_set_value);
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int register_pinmux(struct pinmux_info *pip)
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{
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registered_gpio = pip;
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pr_info("pinmux: %s handling gpio %d -> %d\n",
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pip->name, pip->first_gpio, pip->last_gpio);
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return 0;
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}
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