222 lines
4.5 KiB
Plaintext
222 lines
4.5 KiB
Plaintext
/*
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* at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC
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*
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* Copyright (C) 2012 Atmel,
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* 2012 Hong Xu <hong.xu@atmel.com>
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*
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* Licensed under GPLv2 or later.
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*/
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/include/ "skeleton.dtsi"
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/ {
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model = "Atmel AT91SAM9N12 SoC";
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compatible = "atmel,at91sam9n12";
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interrupt-parent = <&aic>;
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aliases {
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serial0 = &dbgu;
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serial1 = &usart0;
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serial2 = &usart1;
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serial3 = &usart2;
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serial4 = &usart3;
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gpio0 = &pioA;
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gpio1 = &pioB;
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gpio2 = &pioC;
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gpio3 = &pioD;
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tcb0 = &tcb0;
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tcb1 = &tcb1;
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};
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cpus {
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cpu@0 {
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compatible = "arm,arm926ejs";
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};
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};
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memory {
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reg = <0x20000000 0x10000000>;
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};
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ahb {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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apb {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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aic: interrupt-controller@fffff000 {
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#interrupt-cells = <2>;
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compatible = "atmel,at91rm9200-aic";
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interrupt-controller;
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reg = <0xfffff000 0x200>;
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};
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ramc0: ramc@ffffe800 {
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compatible = "atmel,at91sam9g45-ddramc";
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reg = <0xffffe800 0x200>;
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};
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pmc: pmc@fffffc00 {
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compatible = "atmel,at91rm9200-pmc";
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reg = <0xfffffc00 0x100>;
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};
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rstc@fffffe00 {
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compatible = "atmel,at91sam9g45-rstc";
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reg = <0xfffffe00 0x10>;
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};
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pit: timer@fffffe30 {
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compatible = "atmel,at91sam9260-pit";
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reg = <0xfffffe30 0xf>;
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interrupts = <1 4>;
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};
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shdwc@fffffe10 {
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compatible = "atmel,at91sam9x5-shdwc";
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reg = <0xfffffe10 0x10>;
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};
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tcb0: timer@f8008000 {
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compatible = "atmel,at91sam9x5-tcb";
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reg = <0xf8008000 0x100>;
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interrupts = <17 4>;
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};
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tcb1: timer@f800c000 {
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compatible = "atmel,at91sam9x5-tcb";
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reg = <0xf800c000 0x100>;
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interrupts = <17 4>;
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};
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dma: dma-controller@ffffec00 {
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compatible = "atmel,at91sam9g45-dma";
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reg = <0xffffec00 0x200>;
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interrupts = <20 4>;
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};
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pioA: gpio@fffff400 {
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compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
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reg = <0xfffff400 0x100>;
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interrupts = <2 4>;
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#gpio-cells = <2>;
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gpio-controller;
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interrupt-controller;
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};
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pioB: gpio@fffff600 {
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compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
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reg = <0xfffff600 0x100>;
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interrupts = <2 4>;
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#gpio-cells = <2>;
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gpio-controller;
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interrupt-controller;
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};
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pioC: gpio@fffff800 {
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compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
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reg = <0xfffff800 0x100>;
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interrupts = <3 4>;
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#gpio-cells = <2>;
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gpio-controller;
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interrupt-controller;
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};
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pioD: gpio@fffffa00 {
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compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
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reg = <0xfffffa00 0x100>;
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interrupts = <3 4>;
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#gpio-cells = <2>;
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gpio-controller;
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interrupt-controller;
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};
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dbgu: serial@fffff200 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xfffff200 0x200>;
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interrupts = <1 4>;
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status = "disabled";
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};
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usart0: serial@f801c000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xf801c000 0x4000>;
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interrupts = <5 4>;
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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status = "disabled";
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};
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usart1: serial@f8020000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xf8020000 0x4000>;
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interrupts = <6 4>;
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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status = "disabled";
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};
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usart2: serial@f8024000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xf8024000 0x4000>;
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interrupts = <7 4>;
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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status = "disabled";
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};
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usart3: serial@f8028000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xf8028000 0x4000>;
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interrupts = <8 4>;
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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status = "disabled";
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};
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};
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nand0: nand@40000000 {
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compatible = "atmel,at91rm9200-nand";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = < 0x40000000 0x10000000
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0xffffe000 0x00000600
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0xffffe600 0x00000200
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0x00100000 0x00100000
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>;
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atmel,nand-addr-offset = <21>;
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atmel,nand-cmd-offset = <22>;
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gpios = <&pioD 5 0
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&pioD 4 0
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0
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>;
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status = "disabled";
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};
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usb0: ohci@00500000 {
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compatible = "atmel,at91rm9200-ohci", "usb-ohci";
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reg = <0x00500000 0x00100000>;
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interrupts = <22 4>;
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status = "disabled";
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};
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};
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i2c@0 {
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compatible = "i2c-gpio";
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gpios = <&pioA 30 0 /* sda */
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&pioA 31 0 /* scl */
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>;
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i2c-gpio,sda-open-drain;
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i2c-gpio,scl-open-drain;
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i2c-gpio,delay-us = <2>; /* ~100 kHz */
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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};
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