342 lines
9.6 KiB
C
342 lines
9.6 KiB
C
/*
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* Copyright 2011 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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*/
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#include <linux/acpi.h>
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#include <linux/acpi_io.h>
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#include "psb_drv.h"
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#include "psb_intel_reg.h"
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#define PCI_ASLE 0xe4
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#define PCI_ASLS 0xfc
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#define OPREGION_HEADER_OFFSET 0
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#define OPREGION_ACPI_OFFSET 0x100
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#define ACPI_CLID 0x01ac /* current lid state indicator */
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#define ACPI_CDCK 0x01b0 /* current docking state indicator */
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#define OPREGION_SWSCI_OFFSET 0x200
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#define OPREGION_ASLE_OFFSET 0x300
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#define OPREGION_VBT_OFFSET 0x400
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#define OPREGION_SIGNATURE "IntelGraphicsMem"
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#define MBOX_ACPI (1<<0)
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#define MBOX_SWSCI (1<<1)
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#define MBOX_ASLE (1<<2)
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struct opregion_header {
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u8 signature[16];
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u32 size;
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u32 opregion_ver;
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u8 bios_ver[32];
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u8 vbios_ver[16];
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u8 driver_ver[16];
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u32 mboxes;
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u8 reserved[164];
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} __packed;
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/* OpRegion mailbox #1: public ACPI methods */
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struct opregion_acpi {
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u32 drdy; /* driver readiness */
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u32 csts; /* notification status */
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u32 cevt; /* current event */
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u8 rsvd1[20];
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u32 didl[8]; /* supported display devices ID list */
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u32 cpdl[8]; /* currently presented display list */
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u32 cadl[8]; /* currently active display list */
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u32 nadl[8]; /* next active devices list */
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u32 aslp; /* ASL sleep time-out */
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u32 tidx; /* toggle table index */
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u32 chpd; /* current hotplug enable indicator */
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u32 clid; /* current lid state*/
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u32 cdck; /* current docking state */
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u32 sxsw; /* Sx state resume */
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u32 evts; /* ASL supported events */
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u32 cnot; /* current OS notification */
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u32 nrdy; /* driver status */
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u8 rsvd2[60];
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} __packed;
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/* OpRegion mailbox #2: SWSCI */
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struct opregion_swsci {
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/*FIXME: add it later*/
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} __packed;
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/* OpRegion mailbox #3: ASLE */
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struct opregion_asle {
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u32 ardy; /* driver readiness */
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u32 aslc; /* ASLE interrupt command */
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u32 tche; /* technology enabled indicator */
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u32 alsi; /* current ALS illuminance reading */
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u32 bclp; /* backlight brightness to set */
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u32 pfit; /* panel fitting state */
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u32 cblv; /* current brightness level */
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u16 bclm[20]; /* backlight level duty cycle mapping table */
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u32 cpfm; /* current panel fitting mode */
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u32 epfm; /* enabled panel fitting modes */
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u8 plut[74]; /* panel LUT and identifier */
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u32 pfmb; /* PWM freq and min brightness */
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u8 rsvd[102];
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} __packed;
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/* ASLE irq request bits */
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#define ASLE_SET_ALS_ILLUM (1 << 0)
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#define ASLE_SET_BACKLIGHT (1 << 1)
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#define ASLE_SET_PFIT (1 << 2)
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#define ASLE_SET_PWM_FREQ (1 << 3)
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#define ASLE_REQ_MSK 0xf
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/* response bits of ASLE irq request */
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#define ASLE_ALS_ILLUM_FAILED (1<<10)
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#define ASLE_BACKLIGHT_FAILED (1<<12)
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#define ASLE_PFIT_FAILED (1<<14)
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#define ASLE_PWM_FREQ_FAILED (1<<16)
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/* ASLE backlight brightness to set */
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#define ASLE_BCLP_VALID (1<<31)
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#define ASLE_BCLP_MSK (~(1<<31))
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/* ASLE panel fitting request */
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#define ASLE_PFIT_VALID (1<<31)
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#define ASLE_PFIT_CENTER (1<<0)
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#define ASLE_PFIT_STRETCH_TEXT (1<<1)
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#define ASLE_PFIT_STRETCH_GFX (1<<2)
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/* response bits of ASLE irq request */
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#define ASLE_ALS_ILLUM_FAILED (1<<10)
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#define ASLE_BACKLIGHT_FAILED (1<<12)
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#define ASLE_PFIT_FAILED (1<<14)
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#define ASLE_PWM_FREQ_FAILED (1<<16)
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/* ASLE backlight brightness to set */
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#define ASLE_BCLP_VALID (1<<31)
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#define ASLE_BCLP_MSK (~(1<<31))
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/* ASLE panel fitting request */
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#define ASLE_PFIT_VALID (1<<31)
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#define ASLE_PFIT_CENTER (1<<0)
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#define ASLE_PFIT_STRETCH_TEXT (1<<1)
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#define ASLE_PFIT_STRETCH_GFX (1<<2)
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/* PWM frequency and minimum brightness */
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#define ASLE_PFMB_BRIGHTNESS_MASK (0xff)
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#define ASLE_PFMB_BRIGHTNESS_VALID (1<<8)
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#define ASLE_PFMB_PWM_MASK (0x7ffffe00)
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#define ASLE_PFMB_PWM_VALID (1<<31)
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#define ASLE_CBLV_VALID (1<<31)
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static struct psb_intel_opregion *system_opregion;
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static u32 asle_set_backlight(struct drm_device *dev, u32 bclp)
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{
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struct drm_psb_private *dev_priv = dev->dev_private;
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struct opregion_asle *asle = dev_priv->opregion.asle;
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struct backlight_device *bd = dev_priv->backlight_device;
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DRM_DEBUG_DRIVER("asle set backlight %x\n", bclp);
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if (!(bclp & ASLE_BCLP_VALID))
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return ASLE_BACKLIGHT_FAILED;
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if (bd == NULL)
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return ASLE_BACKLIGHT_FAILED;
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bclp &= ASLE_BCLP_MSK;
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if (bclp > 255)
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return ASLE_BACKLIGHT_FAILED;
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if (config_enabled(CONFIG_BACKLIGHT_CLASS_DEVICE)) {
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int max = bd->props.max_brightness;
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gma_backlight_set(dev, bclp * max / 255);
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}
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asle->cblv = (bclp * 0x64) / 0xff | ASLE_CBLV_VALID;
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return 0;
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}
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void psb_intel_opregion_asle_intr(struct drm_device *dev)
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{
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struct drm_psb_private *dev_priv = dev->dev_private;
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struct opregion_asle *asle = dev_priv->opregion.asle;
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u32 asle_stat = 0;
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u32 asle_req;
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if (!asle)
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return;
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asle_req = asle->aslc & ASLE_REQ_MSK;
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if (!asle_req) {
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DRM_DEBUG_DRIVER("non asle set request??\n");
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return;
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}
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if (asle_req & ASLE_SET_BACKLIGHT)
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asle_stat |= asle_set_backlight(dev, asle->bclp);
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asle->aslc = asle_stat;
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}
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#define ASLE_ALS_EN (1<<0)
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#define ASLE_BLC_EN (1<<1)
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#define ASLE_PFIT_EN (1<<2)
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#define ASLE_PFMB_EN (1<<3)
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void psb_intel_opregion_enable_asle(struct drm_device *dev)
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{
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struct drm_psb_private *dev_priv = dev->dev_private;
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struct opregion_asle *asle = dev_priv->opregion.asle;
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if (asle && system_opregion ) {
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/* Don't do this on Medfield or other non PC like devices, they
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use the bit for something different altogether */
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psb_enable_pipestat(dev_priv, 0, PIPE_LEGACY_BLC_EVENT_ENABLE);
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psb_enable_pipestat(dev_priv, 1, PIPE_LEGACY_BLC_EVENT_ENABLE);
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asle->tche = ASLE_ALS_EN | ASLE_BLC_EN | ASLE_PFIT_EN
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| ASLE_PFMB_EN;
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asle->ardy = 1;
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}
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}
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#define ACPI_EV_DISPLAY_SWITCH (1<<0)
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#define ACPI_EV_LID (1<<1)
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#define ACPI_EV_DOCK (1<<2)
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static int psb_intel_opregion_video_event(struct notifier_block *nb,
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unsigned long val, void *data)
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{
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/* The only video events relevant to opregion are 0x80. These indicate
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either a docking event, lid switch or display switch request. In
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Linux, these are handled by the dock, button and video drivers.
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We might want to fix the video driver to be opregion-aware in
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future, but right now we just indicate to the firmware that the
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request has been handled */
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struct opregion_acpi *acpi;
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if (!system_opregion)
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return NOTIFY_DONE;
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acpi = system_opregion->acpi;
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acpi->csts = 0;
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return NOTIFY_OK;
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}
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static struct notifier_block psb_intel_opregion_notifier = {
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.notifier_call = psb_intel_opregion_video_event,
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};
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void psb_intel_opregion_init(struct drm_device *dev)
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{
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struct drm_psb_private *dev_priv = dev->dev_private;
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struct psb_intel_opregion *opregion = &dev_priv->opregion;
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if (!opregion->header)
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return;
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if (opregion->acpi) {
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/* Notify BIOS we are ready to handle ACPI video ext notifs.
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* Right now, all the events are handled by the ACPI video
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* module. We don't actually need to do anything with them. */
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opregion->acpi->csts = 0;
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opregion->acpi->drdy = 1;
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system_opregion = opregion;
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register_acpi_notifier(&psb_intel_opregion_notifier);
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}
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}
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void psb_intel_opregion_fini(struct drm_device *dev)
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{
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struct drm_psb_private *dev_priv = dev->dev_private;
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struct psb_intel_opregion *opregion = &dev_priv->opregion;
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if (!opregion->header)
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return;
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if (opregion->acpi) {
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opregion->acpi->drdy = 0;
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system_opregion = NULL;
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unregister_acpi_notifier(&psb_intel_opregion_notifier);
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}
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/* just clear all opregion memory pointers now */
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iounmap(opregion->header);
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opregion->header = NULL;
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opregion->acpi = NULL;
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opregion->swsci = NULL;
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opregion->asle = NULL;
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opregion->vbt = NULL;
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}
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int psb_intel_opregion_setup(struct drm_device *dev)
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{
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struct drm_psb_private *dev_priv = dev->dev_private;
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struct psb_intel_opregion *opregion = &dev_priv->opregion;
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u32 opregion_phy, mboxes;
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void __iomem *base;
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int err = 0;
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pci_read_config_dword(dev->pdev, PCI_ASLS, &opregion_phy);
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if (opregion_phy == 0) {
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DRM_DEBUG_DRIVER("ACPI Opregion not supported\n");
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return -ENOTSUPP;
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}
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DRM_DEBUG("OpRegion detected at 0x%8x\n", opregion_phy);
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base = acpi_os_ioremap(opregion_phy, 8*1024);
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if (!base)
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return -ENOMEM;
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if (memcmp(base, OPREGION_SIGNATURE, 16)) {
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DRM_DEBUG_DRIVER("opregion signature mismatch\n");
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err = -EINVAL;
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goto err_out;
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}
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opregion->header = base;
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opregion->vbt = base + OPREGION_VBT_OFFSET;
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opregion->lid_state = base + ACPI_CLID;
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mboxes = opregion->header->mboxes;
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if (mboxes & MBOX_ACPI) {
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DRM_DEBUG_DRIVER("Public ACPI methods supported\n");
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opregion->acpi = base + OPREGION_ACPI_OFFSET;
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}
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if (mboxes & MBOX_ASLE) {
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DRM_DEBUG_DRIVER("ASLE supported\n");
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opregion->asle = base + OPREGION_ASLE_OFFSET;
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}
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return 0;
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err_out:
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iounmap(base);
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return err;
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}
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