407 lines
8.9 KiB
C
407 lines
8.9 KiB
C
/* linux/arch/arm/plat-s5p/s5p-time.c
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*
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* Copyright (c) 2011 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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*
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* S5P - Common hr-timer support
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <linux/clockchips.h>
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#include <linux/platform_device.h>
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#include <asm/smp_twd.h>
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#include <asm/mach/time.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/sched_clock.h>
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#include <mach/map.h>
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#include <plat/devs.h>
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#include <plat/regs-timer.h>
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#include <plat/s5p-time.h>
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static struct clk *tin_event;
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static struct clk *tin_source;
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static struct clk *tdiv_event;
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static struct clk *tdiv_source;
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static struct clk *timerclk;
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static struct s5p_timer_source timer_source;
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static unsigned long clock_count_per_tick;
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static void s5p_timer_resume(void);
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static void s5p_time_stop(enum s5p_timer_mode mode)
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{
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unsigned long tcon;
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tcon = __raw_readl(S3C2410_TCON);
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switch (mode) {
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case S5P_PWM0:
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tcon &= ~S3C2410_TCON_T0START;
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break;
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case S5P_PWM1:
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tcon &= ~S3C2410_TCON_T1START;
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break;
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case S5P_PWM2:
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tcon &= ~S3C2410_TCON_T2START;
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break;
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case S5P_PWM3:
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tcon &= ~S3C2410_TCON_T3START;
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break;
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case S5P_PWM4:
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tcon &= ~S3C2410_TCON_T4START;
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break;
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default:
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printk(KERN_ERR "Invalid Timer %d\n", mode);
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break;
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}
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__raw_writel(tcon, S3C2410_TCON);
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}
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static void s5p_time_setup(enum s5p_timer_mode mode, unsigned long tcnt)
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{
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unsigned long tcon;
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tcon = __raw_readl(S3C2410_TCON);
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tcnt--;
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switch (mode) {
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case S5P_PWM0:
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tcon &= ~(0x0f << 0);
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tcon |= S3C2410_TCON_T0MANUALUPD;
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break;
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case S5P_PWM1:
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tcon &= ~(0x0f << 8);
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tcon |= S3C2410_TCON_T1MANUALUPD;
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break;
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case S5P_PWM2:
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tcon &= ~(0x0f << 12);
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tcon |= S3C2410_TCON_T2MANUALUPD;
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break;
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case S5P_PWM3:
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tcon &= ~(0x0f << 16);
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tcon |= S3C2410_TCON_T3MANUALUPD;
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break;
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case S5P_PWM4:
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tcon &= ~(0x07 << 20);
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tcon |= S3C2410_TCON_T4MANUALUPD;
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break;
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default:
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printk(KERN_ERR "Invalid Timer %d\n", mode);
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break;
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}
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__raw_writel(tcnt, S3C2410_TCNTB(mode));
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__raw_writel(tcnt, S3C2410_TCMPB(mode));
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__raw_writel(tcon, S3C2410_TCON);
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}
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static void s5p_time_start(enum s5p_timer_mode mode, bool periodic)
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{
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unsigned long tcon;
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tcon = __raw_readl(S3C2410_TCON);
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switch (mode) {
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case S5P_PWM0:
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tcon |= S3C2410_TCON_T0START;
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tcon &= ~S3C2410_TCON_T0MANUALUPD;
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if (periodic)
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tcon |= S3C2410_TCON_T0RELOAD;
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else
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tcon &= ~S3C2410_TCON_T0RELOAD;
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break;
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case S5P_PWM1:
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tcon |= S3C2410_TCON_T1START;
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tcon &= ~S3C2410_TCON_T1MANUALUPD;
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if (periodic)
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tcon |= S3C2410_TCON_T1RELOAD;
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else
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tcon &= ~S3C2410_TCON_T1RELOAD;
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break;
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case S5P_PWM2:
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tcon |= S3C2410_TCON_T2START;
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tcon &= ~S3C2410_TCON_T2MANUALUPD;
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if (periodic)
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tcon |= S3C2410_TCON_T2RELOAD;
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else
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tcon &= ~S3C2410_TCON_T2RELOAD;
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break;
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case S5P_PWM3:
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tcon |= S3C2410_TCON_T3START;
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tcon &= ~S3C2410_TCON_T3MANUALUPD;
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if (periodic)
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tcon |= S3C2410_TCON_T3RELOAD;
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else
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tcon &= ~S3C2410_TCON_T3RELOAD;
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break;
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case S5P_PWM4:
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tcon |= S3C2410_TCON_T4START;
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tcon &= ~S3C2410_TCON_T4MANUALUPD;
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if (periodic)
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tcon |= S3C2410_TCON_T4RELOAD;
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else
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tcon &= ~S3C2410_TCON_T4RELOAD;
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break;
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default:
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printk(KERN_ERR "Invalid Timer %d\n", mode);
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break;
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}
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__raw_writel(tcon, S3C2410_TCON);
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}
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static int s5p_set_next_event(unsigned long cycles,
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struct clock_event_device *evt)
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{
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s5p_time_setup(timer_source.event_id, cycles);
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s5p_time_start(timer_source.event_id, NON_PERIODIC);
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return 0;
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}
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static void s5p_set_mode(enum clock_event_mode mode,
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struct clock_event_device *evt)
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{
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s5p_time_stop(timer_source.event_id);
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switch (mode) {
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case CLOCK_EVT_MODE_PERIODIC:
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s5p_time_setup(timer_source.event_id, clock_count_per_tick);
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s5p_time_start(timer_source.event_id, PERIODIC);
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break;
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case CLOCK_EVT_MODE_ONESHOT:
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break;
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case CLOCK_EVT_MODE_UNUSED:
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case CLOCK_EVT_MODE_SHUTDOWN:
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break;
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case CLOCK_EVT_MODE_RESUME:
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s5p_timer_resume();
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break;
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}
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}
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static void s5p_timer_resume(void)
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{
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/* event timer restart */
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s5p_time_setup(timer_source.event_id, clock_count_per_tick);
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s5p_time_start(timer_source.event_id, PERIODIC);
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/* source timer restart */
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s5p_time_setup(timer_source.source_id, TCNT_MAX);
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s5p_time_start(timer_source.source_id, PERIODIC);
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}
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void __init s5p_set_timer_source(enum s5p_timer_mode event,
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enum s5p_timer_mode source)
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{
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s3c_device_timer[event].dev.bus = &platform_bus_type;
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s3c_device_timer[source].dev.bus = &platform_bus_type;
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timer_source.event_id = event;
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timer_source.source_id = source;
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}
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static struct clock_event_device time_event_device = {
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.name = "s5p_event_timer",
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.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
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.rating = 200,
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.set_next_event = s5p_set_next_event,
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.set_mode = s5p_set_mode,
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};
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static irqreturn_t s5p_clock_event_isr(int irq, void *dev_id)
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{
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struct clock_event_device *evt = dev_id;
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evt->event_handler(evt);
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return IRQ_HANDLED;
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}
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static struct irqaction s5p_clock_event_irq = {
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.name = "s5p_time_irq",
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.flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
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.handler = s5p_clock_event_isr,
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.dev_id = &time_event_device,
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};
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static void __init s5p_clockevent_init(void)
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{
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unsigned long pclk;
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unsigned long clock_rate;
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unsigned int irq_number;
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struct clk *tscaler;
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pclk = clk_get_rate(timerclk);
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tscaler = clk_get_parent(tdiv_event);
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clk_set_rate(tscaler, pclk / 2);
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clk_set_rate(tdiv_event, pclk / 2);
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clk_set_parent(tin_event, tdiv_event);
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clock_rate = clk_get_rate(tin_event);
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clock_count_per_tick = clock_rate / HZ;
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clockevents_calc_mult_shift(&time_event_device,
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clock_rate, S5PTIMER_MIN_RANGE);
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time_event_device.max_delta_ns =
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clockevent_delta2ns(-1, &time_event_device);
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time_event_device.min_delta_ns =
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clockevent_delta2ns(1, &time_event_device);
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time_event_device.cpumask = cpumask_of(0);
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clockevents_register_device(&time_event_device);
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irq_number = timer_source.event_id + IRQ_TIMER0;
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setup_irq(irq_number, &s5p_clock_event_irq);
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}
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static void __iomem *s5p_timer_reg(void)
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{
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unsigned long offset = 0;
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switch (timer_source.source_id) {
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case S5P_PWM0:
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case S5P_PWM1:
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case S5P_PWM2:
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case S5P_PWM3:
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offset = (timer_source.source_id * 0x0c) + 0x14;
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break;
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case S5P_PWM4:
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offset = 0x40;
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break;
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default:
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printk(KERN_ERR "Invalid Timer %d\n", timer_source.source_id);
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return NULL;
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}
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return S3C_TIMERREG(offset);
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}
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/*
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* Override the global weak sched_clock symbol with this
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* local implementation which uses the clocksource to get some
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* better resolution when scheduling the kernel. We accept that
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* this wraps around for now, since it is just a relative time
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* stamp. (Inspired by U300 implementation.)
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*/
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static u32 notrace s5p_read_sched_clock(void)
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{
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void __iomem *reg = s5p_timer_reg();
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if (!reg)
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return 0;
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return ~__raw_readl(reg);
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}
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static void __init s5p_clocksource_init(void)
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{
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unsigned long pclk;
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unsigned long clock_rate;
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pclk = clk_get_rate(timerclk);
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clk_set_rate(tdiv_source, pclk / 2);
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clk_set_parent(tin_source, tdiv_source);
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clock_rate = clk_get_rate(tin_source);
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s5p_time_setup(timer_source.source_id, TCNT_MAX);
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s5p_time_start(timer_source.source_id, PERIODIC);
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setup_sched_clock(s5p_read_sched_clock, 32, clock_rate);
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if (clocksource_mmio_init(s5p_timer_reg(), "s5p_clocksource_timer",
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clock_rate, 250, 32, clocksource_mmio_readl_down))
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panic("s5p_clocksource_timer: can't register clocksource\n");
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}
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static void __init s5p_timer_resources(void)
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{
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unsigned long event_id = timer_source.event_id;
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unsigned long source_id = timer_source.source_id;
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char devname[15];
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timerclk = clk_get(NULL, "timers");
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if (IS_ERR(timerclk))
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panic("failed to get timers clock for timer");
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clk_enable(timerclk);
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sprintf(devname, "s3c24xx-pwm.%lu", event_id);
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s3c_device_timer[event_id].id = event_id;
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s3c_device_timer[event_id].dev.init_name = devname;
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tin_event = clk_get(&s3c_device_timer[event_id].dev, "pwm-tin");
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if (IS_ERR(tin_event))
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panic("failed to get pwm-tin clock for event timer");
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tdiv_event = clk_get(&s3c_device_timer[event_id].dev, "pwm-tdiv");
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if (IS_ERR(tdiv_event))
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panic("failed to get pwm-tdiv clock for event timer");
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clk_enable(tin_event);
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sprintf(devname, "s3c24xx-pwm.%lu", source_id);
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s3c_device_timer[source_id].id = source_id;
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s3c_device_timer[source_id].dev.init_name = devname;
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tin_source = clk_get(&s3c_device_timer[source_id].dev, "pwm-tin");
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if (IS_ERR(tin_source))
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panic("failed to get pwm-tin clock for source timer");
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tdiv_source = clk_get(&s3c_device_timer[source_id].dev, "pwm-tdiv");
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if (IS_ERR(tdiv_source))
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panic("failed to get pwm-tdiv clock for source timer");
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clk_enable(tin_source);
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}
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static void __init s5p_timer_init(void)
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{
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s5p_timer_resources();
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s5p_clockevent_init();
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s5p_clocksource_init();
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}
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struct sys_timer s5p_timer = {
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.init = s5p_timer_init,
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};
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