83 lines
2.1 KiB
C
83 lines
2.1 KiB
C
/*
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* arch/arm/mach-kirkwood/irq.c
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*
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* Kirkwood IRQ handling.
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <asm/exception.h>
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#include <linux/gpio.h>
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#include <linux/kernel.h>
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#include <linux/irq.h>
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#include <linux/io.h>
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#include <mach/bridge-regs.h>
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#include <plat/orion-gpio.h>
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#include <plat/irq.h>
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#include "common.h"
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static int __initdata gpio0_irqs[4] = {
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IRQ_KIRKWOOD_GPIO_LOW_0_7,
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IRQ_KIRKWOOD_GPIO_LOW_8_15,
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IRQ_KIRKWOOD_GPIO_LOW_16_23,
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IRQ_KIRKWOOD_GPIO_LOW_24_31,
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};
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static int __initdata gpio1_irqs[4] = {
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IRQ_KIRKWOOD_GPIO_HIGH_0_7,
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IRQ_KIRKWOOD_GPIO_HIGH_8_15,
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IRQ_KIRKWOOD_GPIO_HIGH_16_23,
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0,
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};
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#ifdef CONFIG_MULTI_IRQ_HANDLER
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/*
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* Compiling with both non-DT and DT support enabled, will
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* break asm irq handler used by non-DT boards. Therefore,
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* we provide a C-style irq handler even for non-DT boards,
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* if MULTI_IRQ_HANDLER is set.
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*/
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static void __iomem *kirkwood_irq_base = IRQ_VIRT_BASE;
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asmlinkage void
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__exception_irq_entry kirkwood_legacy_handle_irq(struct pt_regs *regs)
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{
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u32 stat;
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stat = readl_relaxed(kirkwood_irq_base + IRQ_CAUSE_LOW_OFF);
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stat &= readl_relaxed(kirkwood_irq_base + IRQ_MASK_LOW_OFF);
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if (stat) {
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unsigned int hwirq = __fls(stat);
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handle_IRQ(hwirq, regs);
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return;
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}
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stat = readl_relaxed(kirkwood_irq_base + IRQ_CAUSE_HIGH_OFF);
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stat &= readl_relaxed(kirkwood_irq_base + IRQ_MASK_HIGH_OFF);
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if (stat) {
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unsigned int hwirq = 32 + __fls(stat);
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handle_IRQ(hwirq, regs);
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return;
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}
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}
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#endif
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void __init kirkwood_init_irq(void)
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{
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orion_irq_init(0, IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF);
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orion_irq_init(32, IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF);
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#ifdef CONFIG_MULTI_IRQ_HANDLER
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set_handle_irq(kirkwood_legacy_handle_irq);
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#endif
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/*
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* Initialize gpiolib for GPIOs 0-49.
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*/
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orion_gpio_init(NULL, 0, 32, GPIO_LOW_VIRT_BASE, 0,
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IRQ_KIRKWOOD_GPIO_START, gpio0_irqs);
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orion_gpio_init(NULL, 32, 18, GPIO_HIGH_VIRT_BASE, 0,
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IRQ_KIRKWOOD_GPIO_START + 32, gpio1_irqs);
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}
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