1214 lines
35 KiB
C
1214 lines
35 KiB
C
/*
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* eeh.c
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* Copyright (C) 2001 Dave Engebretsen & Todd Inglett IBM Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/list.h>
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#include <linux/pci.h>
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#include <linux/proc_fs.h>
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#include <linux/rbtree.h>
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#include <linux/seq_file.h>
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#include <linux/spinlock.h>
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#include <asm/atomic.h>
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#include <asm/eeh.h>
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#include <asm/eeh_event.h>
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#include <asm/io.h>
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#include <asm/machdep.h>
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#include <asm/ppc-pci.h>
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#include <asm/rtas.h>
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#undef DEBUG
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/** Overview:
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* EEH, or "Extended Error Handling" is a PCI bridge technology for
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* dealing with PCI bus errors that can't be dealt with within the
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* usual PCI framework, except by check-stopping the CPU. Systems
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* that are designed for high-availability/reliability cannot afford
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* to crash due to a "mere" PCI error, thus the need for EEH.
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* An EEH-capable bridge operates by converting a detected error
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* into a "slot freeze", taking the PCI adapter off-line, making
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* the slot behave, from the OS'es point of view, as if the slot
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* were "empty": all reads return 0xff's and all writes are silently
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* ignored. EEH slot isolation events can be triggered by parity
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* errors on the address or data busses (e.g. during posted writes),
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* which in turn might be caused by low voltage on the bus, dust,
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* vibration, humidity, radioactivity or plain-old failed hardware.
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*
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* Note, however, that one of the leading causes of EEH slot
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* freeze events are buggy device drivers, buggy device microcode,
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* or buggy device hardware. This is because any attempt by the
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* device to bus-master data to a memory address that is not
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* assigned to the device will trigger a slot freeze. (The idea
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* is to prevent devices-gone-wild from corrupting system memory).
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* Buggy hardware/drivers will have a miserable time co-existing
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* with EEH.
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*
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* Ideally, a PCI device driver, when suspecting that an isolation
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* event has occured (e.g. by reading 0xff's), will then ask EEH
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* whether this is the case, and then take appropriate steps to
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* reset the PCI slot, the PCI device, and then resume operations.
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* However, until that day, the checking is done here, with the
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* eeh_check_failure() routine embedded in the MMIO macros. If
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* the slot is found to be isolated, an "EEH Event" is synthesized
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* and sent out for processing.
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*/
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/* If a device driver keeps reading an MMIO register in an interrupt
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* handler after a slot isolation event has occurred, we assume it
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* is broken and panic. This sets the threshold for how many read
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* attempts we allow before panicking.
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*/
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#define EEH_MAX_FAILS 100000
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/* Misc forward declaraions */
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static void eeh_save_bars(struct pci_dev * pdev, struct pci_dn *pdn);
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/* RTAS tokens */
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static int ibm_set_eeh_option;
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static int ibm_set_slot_reset;
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static int ibm_read_slot_reset_state;
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static int ibm_read_slot_reset_state2;
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static int ibm_slot_error_detail;
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int eeh_subsystem_enabled;
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EXPORT_SYMBOL(eeh_subsystem_enabled);
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/* Lock to avoid races due to multiple reports of an error */
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static DEFINE_SPINLOCK(confirm_error_lock);
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/* Buffer for reporting slot-error-detail rtas calls */
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static unsigned char slot_errbuf[RTAS_ERROR_LOG_MAX];
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static DEFINE_SPINLOCK(slot_errbuf_lock);
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static int eeh_error_buf_size;
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/* System monitoring statistics */
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static DEFINE_PER_CPU(unsigned long, no_device);
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static DEFINE_PER_CPU(unsigned long, no_dn);
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static DEFINE_PER_CPU(unsigned long, no_cfg_addr);
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static DEFINE_PER_CPU(unsigned long, ignored_check);
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static DEFINE_PER_CPU(unsigned long, total_mmio_ffs);
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static DEFINE_PER_CPU(unsigned long, false_positives);
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static DEFINE_PER_CPU(unsigned long, ignored_failures);
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static DEFINE_PER_CPU(unsigned long, slot_resets);
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/**
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* The pci address cache subsystem. This subsystem places
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* PCI device address resources into a red-black tree, sorted
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* according to the address range, so that given only an i/o
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* address, the corresponding PCI device can be **quickly**
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* found. It is safe to perform an address lookup in an interrupt
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* context; this ability is an important feature.
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*
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* Currently, the only customer of this code is the EEH subsystem;
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* thus, this code has been somewhat tailored to suit EEH better.
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* In particular, the cache does *not* hold the addresses of devices
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* for which EEH is not enabled.
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*
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* (Implementation Note: The RB tree seems to be better/faster
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* than any hash algo I could think of for this problem, even
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* with the penalty of slow pointer chases for d-cache misses).
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*/
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struct pci_io_addr_range
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{
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struct rb_node rb_node;
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unsigned long addr_lo;
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unsigned long addr_hi;
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struct pci_dev *pcidev;
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unsigned int flags;
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};
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static struct pci_io_addr_cache
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{
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struct rb_root rb_root;
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spinlock_t piar_lock;
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} pci_io_addr_cache_root;
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static inline struct pci_dev *__pci_get_device_by_addr(unsigned long addr)
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{
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struct rb_node *n = pci_io_addr_cache_root.rb_root.rb_node;
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while (n) {
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struct pci_io_addr_range *piar;
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piar = rb_entry(n, struct pci_io_addr_range, rb_node);
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if (addr < piar->addr_lo) {
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n = n->rb_left;
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} else {
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if (addr > piar->addr_hi) {
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n = n->rb_right;
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} else {
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pci_dev_get(piar->pcidev);
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return piar->pcidev;
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}
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}
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}
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return NULL;
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}
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/**
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* pci_get_device_by_addr - Get device, given only address
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* @addr: mmio (PIO) phys address or i/o port number
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*
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* Given an mmio phys address, or a port number, find a pci device
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* that implements this address. Be sure to pci_dev_put the device
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* when finished. I/O port numbers are assumed to be offset
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* from zero (that is, they do *not* have pci_io_addr added in).
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* It is safe to call this function within an interrupt.
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*/
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static struct pci_dev *pci_get_device_by_addr(unsigned long addr)
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{
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struct pci_dev *dev;
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unsigned long flags;
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spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
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dev = __pci_get_device_by_addr(addr);
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spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
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return dev;
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}
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#ifdef DEBUG
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/*
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* Handy-dandy debug print routine, does nothing more
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* than print out the contents of our addr cache.
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*/
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static void pci_addr_cache_print(struct pci_io_addr_cache *cache)
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{
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struct rb_node *n;
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int cnt = 0;
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n = rb_first(&cache->rb_root);
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while (n) {
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struct pci_io_addr_range *piar;
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piar = rb_entry(n, struct pci_io_addr_range, rb_node);
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printk(KERN_DEBUG "PCI: %s addr range %d [%lx-%lx]: %s\n",
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(piar->flags & IORESOURCE_IO) ? "i/o" : "mem", cnt,
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piar->addr_lo, piar->addr_hi, pci_name(piar->pcidev));
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cnt++;
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n = rb_next(n);
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}
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}
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#endif
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/* Insert address range into the rb tree. */
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static struct pci_io_addr_range *
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pci_addr_cache_insert(struct pci_dev *dev, unsigned long alo,
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unsigned long ahi, unsigned int flags)
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{
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struct rb_node **p = &pci_io_addr_cache_root.rb_root.rb_node;
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struct rb_node *parent = NULL;
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struct pci_io_addr_range *piar;
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/* Walk tree, find a place to insert into tree */
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while (*p) {
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parent = *p;
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piar = rb_entry(parent, struct pci_io_addr_range, rb_node);
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if (ahi < piar->addr_lo) {
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p = &parent->rb_left;
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} else if (alo > piar->addr_hi) {
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p = &parent->rb_right;
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} else {
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if (dev != piar->pcidev ||
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alo != piar->addr_lo || ahi != piar->addr_hi) {
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printk(KERN_WARNING "PIAR: overlapping address range\n");
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}
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return piar;
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}
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}
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piar = (struct pci_io_addr_range *)kmalloc(sizeof(struct pci_io_addr_range), GFP_ATOMIC);
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if (!piar)
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return NULL;
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piar->addr_lo = alo;
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piar->addr_hi = ahi;
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piar->pcidev = dev;
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piar->flags = flags;
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#ifdef DEBUG
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printk(KERN_DEBUG "PIAR: insert range=[%lx:%lx] dev=%s\n",
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alo, ahi, pci_name (dev));
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#endif
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rb_link_node(&piar->rb_node, parent, p);
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rb_insert_color(&piar->rb_node, &pci_io_addr_cache_root.rb_root);
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return piar;
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}
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static void __pci_addr_cache_insert_device(struct pci_dev *dev)
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{
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struct device_node *dn;
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struct pci_dn *pdn;
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int i;
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int inserted = 0;
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dn = pci_device_to_OF_node(dev);
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if (!dn) {
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printk(KERN_WARNING "PCI: no pci dn found for dev=%s\n", pci_name(dev));
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return;
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}
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/* Skip any devices for which EEH is not enabled. */
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pdn = PCI_DN(dn);
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if (!(pdn->eeh_mode & EEH_MODE_SUPPORTED) ||
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pdn->eeh_mode & EEH_MODE_NOCHECK) {
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#ifdef DEBUG
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printk(KERN_INFO "PCI: skip building address cache for=%s - %s\n",
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pci_name(dev), pdn->node->full_name);
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#endif
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return;
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}
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/* The cache holds a reference to the device... */
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pci_dev_get(dev);
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/* Walk resources on this device, poke them into the tree */
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for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
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unsigned long start = pci_resource_start(dev,i);
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unsigned long end = pci_resource_end(dev,i);
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unsigned int flags = pci_resource_flags(dev,i);
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/* We are interested only bus addresses, not dma or other stuff */
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if (0 == (flags & (IORESOURCE_IO | IORESOURCE_MEM)))
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continue;
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if (start == 0 || ~start == 0 || end == 0 || ~end == 0)
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continue;
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pci_addr_cache_insert(dev, start, end, flags);
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inserted = 1;
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}
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/* If there was nothing to add, the cache has no reference... */
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if (!inserted)
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pci_dev_put(dev);
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}
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/**
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* pci_addr_cache_insert_device - Add a device to the address cache
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* @dev: PCI device whose I/O addresses we are interested in.
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*
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* In order to support the fast lookup of devices based on addresses,
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* we maintain a cache of devices that can be quickly searched.
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* This routine adds a device to that cache.
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*/
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static void pci_addr_cache_insert_device(struct pci_dev *dev)
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{
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unsigned long flags;
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spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
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__pci_addr_cache_insert_device(dev);
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spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
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}
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static inline void __pci_addr_cache_remove_device(struct pci_dev *dev)
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{
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struct rb_node *n;
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int removed = 0;
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restart:
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n = rb_first(&pci_io_addr_cache_root.rb_root);
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while (n) {
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struct pci_io_addr_range *piar;
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piar = rb_entry(n, struct pci_io_addr_range, rb_node);
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if (piar->pcidev == dev) {
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rb_erase(n, &pci_io_addr_cache_root.rb_root);
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removed = 1;
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kfree(piar);
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goto restart;
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}
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n = rb_next(n);
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}
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/* The cache no longer holds its reference to this device... */
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if (removed)
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pci_dev_put(dev);
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}
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/**
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* pci_addr_cache_remove_device - remove pci device from addr cache
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* @dev: device to remove
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*
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* Remove a device from the addr-cache tree.
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* This is potentially expensive, since it will walk
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* the tree multiple times (once per resource).
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* But so what; device removal doesn't need to be that fast.
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*/
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static void pci_addr_cache_remove_device(struct pci_dev *dev)
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{
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unsigned long flags;
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spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
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__pci_addr_cache_remove_device(dev);
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spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
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}
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/**
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* pci_addr_cache_build - Build a cache of I/O addresses
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*
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* Build a cache of pci i/o addresses. This cache will be used to
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* find the pci device that corresponds to a given address.
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* This routine scans all pci busses to build the cache.
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* Must be run late in boot process, after the pci controllers
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* have been scaned for devices (after all device resources are known).
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*/
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void __init pci_addr_cache_build(void)
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{
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struct device_node *dn;
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struct pci_dev *dev = NULL;
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if (!eeh_subsystem_enabled)
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return;
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spin_lock_init(&pci_io_addr_cache_root.piar_lock);
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while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
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/* Ignore PCI bridges ( XXX why ??) */
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if ((dev->class >> 16) == PCI_BASE_CLASS_BRIDGE) {
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continue;
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}
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pci_addr_cache_insert_device(dev);
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/* Save the BAR's; firmware doesn't restore these after EEH reset */
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dn = pci_device_to_OF_node(dev);
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eeh_save_bars(dev, PCI_DN(dn));
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}
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#ifdef DEBUG
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/* Verify tree built up above, echo back the list of addrs. */
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pci_addr_cache_print(&pci_io_addr_cache_root);
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#endif
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}
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/* --------------------------------------------------------------- */
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/* Above lies the PCI Address Cache. Below lies the EEH event infrastructure */
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void eeh_slot_error_detail (struct pci_dn *pdn, int severity)
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{
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unsigned long flags;
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int rc;
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/* Log the error with the rtas logger */
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spin_lock_irqsave(&slot_errbuf_lock, flags);
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memset(slot_errbuf, 0, eeh_error_buf_size);
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rc = rtas_call(ibm_slot_error_detail,
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8, 1, NULL, pdn->eeh_config_addr,
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BUID_HI(pdn->phb->buid),
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BUID_LO(pdn->phb->buid), NULL, 0,
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virt_to_phys(slot_errbuf),
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eeh_error_buf_size,
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severity);
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if (rc == 0)
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log_error(slot_errbuf, ERR_TYPE_RTAS_LOG, 0);
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spin_unlock_irqrestore(&slot_errbuf_lock, flags);
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}
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/**
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* read_slot_reset_state - Read the reset state of a device node's slot
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* @dn: device node to read
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* @rets: array to return results in
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*/
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static int read_slot_reset_state(struct pci_dn *pdn, int rets[])
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{
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int token, outputs;
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if (ibm_read_slot_reset_state2 != RTAS_UNKNOWN_SERVICE) {
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token = ibm_read_slot_reset_state2;
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outputs = 4;
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} else {
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token = ibm_read_slot_reset_state;
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rets[2] = 0; /* fake PE Unavailable info */
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outputs = 3;
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}
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return rtas_call(token, 3, outputs, rets, pdn->eeh_config_addr,
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BUID_HI(pdn->phb->buid), BUID_LO(pdn->phb->buid));
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}
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/**
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* eeh_token_to_phys - convert EEH address token to phys address
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* @token i/o token, should be address in the form 0xA....
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*/
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static inline unsigned long eeh_token_to_phys(unsigned long token)
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{
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pte_t *ptep;
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unsigned long pa;
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ptep = find_linux_pte(init_mm.pgd, token);
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if (!ptep)
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return token;
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pa = pte_pfn(*ptep) << PAGE_SHIFT;
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return pa | (token & (PAGE_SIZE-1));
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}
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/**
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* Return the "partitionable endpoint" (pe) under which this device lies
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*/
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static struct device_node * find_device_pe(struct device_node *dn)
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{
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while ((dn->parent) && PCI_DN(dn->parent) &&
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(PCI_DN(dn->parent)->eeh_mode & EEH_MODE_SUPPORTED)) {
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dn = dn->parent;
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}
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return dn;
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}
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|
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/** Mark all devices that are peers of this device as failed.
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* Mark the device driver too, so that it can see the failure
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* immediately; this is critical, since some drivers poll
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* status registers in interrupts ... If a driver is polling,
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* and the slot is frozen, then the driver can deadlock in
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* an interrupt context, which is bad.
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*/
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static void __eeh_mark_slot (struct device_node *dn, int mode_flag)
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{
|
|
while (dn) {
|
|
if (PCI_DN(dn)) {
|
|
PCI_DN(dn)->eeh_mode |= mode_flag;
|
|
|
|
if (dn->child)
|
|
__eeh_mark_slot (dn->child, mode_flag);
|
|
}
|
|
dn = dn->sibling;
|
|
}
|
|
}
|
|
|
|
void eeh_mark_slot (struct device_node *dn, int mode_flag)
|
|
{
|
|
dn = find_device_pe (dn);
|
|
PCI_DN(dn)->eeh_mode |= mode_flag;
|
|
__eeh_mark_slot (dn->child, mode_flag);
|
|
}
|
|
|
|
static void __eeh_clear_slot (struct device_node *dn, int mode_flag)
|
|
{
|
|
while (dn) {
|
|
if (PCI_DN(dn)) {
|
|
PCI_DN(dn)->eeh_mode &= ~mode_flag;
|
|
PCI_DN(dn)->eeh_check_count = 0;
|
|
if (dn->child)
|
|
__eeh_clear_slot (dn->child, mode_flag);
|
|
}
|
|
dn = dn->sibling;
|
|
}
|
|
}
|
|
|
|
void eeh_clear_slot (struct device_node *dn, int mode_flag)
|
|
{
|
|
unsigned long flags;
|
|
spin_lock_irqsave(&confirm_error_lock, flags);
|
|
dn = find_device_pe (dn);
|
|
PCI_DN(dn)->eeh_mode &= ~mode_flag;
|
|
PCI_DN(dn)->eeh_check_count = 0;
|
|
__eeh_clear_slot (dn->child, mode_flag);
|
|
spin_unlock_irqrestore(&confirm_error_lock, flags);
|
|
}
|
|
|
|
/**
|
|
* eeh_dn_check_failure - check if all 1's data is due to EEH slot freeze
|
|
* @dn device node
|
|
* @dev pci device, if known
|
|
*
|
|
* Check for an EEH failure for the given device node. Call this
|
|
* routine if the result of a read was all 0xff's and you want to
|
|
* find out if this is due to an EEH slot freeze. This routine
|
|
* will query firmware for the EEH status.
|
|
*
|
|
* Returns 0 if there has not been an EEH error; otherwise returns
|
|
* a non-zero value and queues up a slot isolation event notification.
|
|
*
|
|
* It is safe to call this routine in an interrupt context.
|
|
*/
|
|
int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev)
|
|
{
|
|
int ret;
|
|
int rets[3];
|
|
unsigned long flags;
|
|
struct pci_dn *pdn;
|
|
int rc = 0;
|
|
|
|
__get_cpu_var(total_mmio_ffs)++;
|
|
|
|
if (!eeh_subsystem_enabled)
|
|
return 0;
|
|
|
|
if (!dn) {
|
|
__get_cpu_var(no_dn)++;
|
|
return 0;
|
|
}
|
|
pdn = PCI_DN(dn);
|
|
|
|
/* Access to IO BARs might get this far and still not want checking. */
|
|
if (!(pdn->eeh_mode & EEH_MODE_SUPPORTED) ||
|
|
pdn->eeh_mode & EEH_MODE_NOCHECK) {
|
|
__get_cpu_var(ignored_check)++;
|
|
#ifdef DEBUG
|
|
printk ("EEH:ignored check (%x) for %s %s\n",
|
|
pdn->eeh_mode, pci_name (dev), dn->full_name);
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
if (!pdn->eeh_config_addr) {
|
|
__get_cpu_var(no_cfg_addr)++;
|
|
return 0;
|
|
}
|
|
|
|
/* If we already have a pending isolation event for this
|
|
* slot, we know it's bad already, we don't need to check.
|
|
* Do this checking under a lock; as multiple PCI devices
|
|
* in one slot might report errors simultaneously, and we
|
|
* only want one error recovery routine running.
|
|
*/
|
|
spin_lock_irqsave(&confirm_error_lock, flags);
|
|
rc = 1;
|
|
if (pdn->eeh_mode & EEH_MODE_ISOLATED) {
|
|
pdn->eeh_check_count ++;
|
|
if (pdn->eeh_check_count >= EEH_MAX_FAILS) {
|
|
printk (KERN_ERR "EEH: Device driver ignored %d bad reads, panicing\n",
|
|
pdn->eeh_check_count);
|
|
dump_stack();
|
|
|
|
/* re-read the slot reset state */
|
|
if (read_slot_reset_state(pdn, rets) != 0)
|
|
rets[0] = -1; /* reset state unknown */
|
|
|
|
/* If we are here, then we hit an infinite loop. Stop. */
|
|
panic("EEH: MMIO halt (%d) on device:%s\n", rets[0], pci_name(dev));
|
|
}
|
|
goto dn_unlock;
|
|
}
|
|
|
|
/*
|
|
* Now test for an EEH failure. This is VERY expensive.
|
|
* Note that the eeh_config_addr may be a parent device
|
|
* in the case of a device behind a bridge, or it may be
|
|
* function zero of a multi-function device.
|
|
* In any case they must share a common PHB.
|
|
*/
|
|
ret = read_slot_reset_state(pdn, rets);
|
|
|
|
/* If the call to firmware failed, punt */
|
|
if (ret != 0) {
|
|
printk(KERN_WARNING "EEH: read_slot_reset_state() failed; rc=%d dn=%s\n",
|
|
ret, dn->full_name);
|
|
__get_cpu_var(false_positives)++;
|
|
rc = 0;
|
|
goto dn_unlock;
|
|
}
|
|
|
|
/* If EEH is not supported on this device, punt. */
|
|
if (rets[1] != 1) {
|
|
printk(KERN_WARNING "EEH: event on unsupported device, rc=%d dn=%s\n",
|
|
ret, dn->full_name);
|
|
__get_cpu_var(false_positives)++;
|
|
rc = 0;
|
|
goto dn_unlock;
|
|
}
|
|
|
|
/* If not the kind of error we know about, punt. */
|
|
if (rets[0] != 2 && rets[0] != 4 && rets[0] != 5) {
|
|
__get_cpu_var(false_positives)++;
|
|
rc = 0;
|
|
goto dn_unlock;
|
|
}
|
|
|
|
/* Note that config-io to empty slots may fail;
|
|
* we recognize empty because they don't have children. */
|
|
if ((rets[0] == 5) && (dn->child == NULL)) {
|
|
__get_cpu_var(false_positives)++;
|
|
rc = 0;
|
|
goto dn_unlock;
|
|
}
|
|
|
|
__get_cpu_var(slot_resets)++;
|
|
|
|
/* Avoid repeated reports of this failure, including problems
|
|
* with other functions on this device, and functions under
|
|
* bridges. */
|
|
eeh_mark_slot (dn, EEH_MODE_ISOLATED);
|
|
spin_unlock_irqrestore(&confirm_error_lock, flags);
|
|
|
|
eeh_send_failure_event (dn, dev, rets[0], rets[2]);
|
|
|
|
/* Most EEH events are due to device driver bugs. Having
|
|
* a stack trace will help the device-driver authors figure
|
|
* out what happened. So print that out. */
|
|
if (rets[0] != 5) dump_stack();
|
|
return 1;
|
|
|
|
dn_unlock:
|
|
spin_unlock_irqrestore(&confirm_error_lock, flags);
|
|
return rc;
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(eeh_dn_check_failure);
|
|
|
|
/**
|
|
* eeh_check_failure - check if all 1's data is due to EEH slot freeze
|
|
* @token i/o token, should be address in the form 0xA....
|
|
* @val value, should be all 1's (XXX why do we need this arg??)
|
|
*
|
|
* Check for an EEH failure at the given token address. Call this
|
|
* routine if the result of a read was all 0xff's and you want to
|
|
* find out if this is due to an EEH slot freeze event. This routine
|
|
* will query firmware for the EEH status.
|
|
*
|
|
* Note this routine is safe to call in an interrupt context.
|
|
*/
|
|
unsigned long eeh_check_failure(const volatile void __iomem *token, unsigned long val)
|
|
{
|
|
unsigned long addr;
|
|
struct pci_dev *dev;
|
|
struct device_node *dn;
|
|
|
|
/* Finding the phys addr + pci device; this is pretty quick. */
|
|
addr = eeh_token_to_phys((unsigned long __force) token);
|
|
dev = pci_get_device_by_addr(addr);
|
|
if (!dev) {
|
|
__get_cpu_var(no_device)++;
|
|
return val;
|
|
}
|
|
|
|
dn = pci_device_to_OF_node(dev);
|
|
eeh_dn_check_failure (dn, dev);
|
|
|
|
pci_dev_put(dev);
|
|
return val;
|
|
}
|
|
|
|
EXPORT_SYMBOL(eeh_check_failure);
|
|
|
|
/* ------------------------------------------------------------- */
|
|
/* The code below deals with error recovery */
|
|
|
|
/** Return negative value if a permanent error, else return
|
|
* a number of milliseconds to wait until the PCI slot is
|
|
* ready to be used.
|
|
*/
|
|
static int
|
|
eeh_slot_availability(struct pci_dn *pdn)
|
|
{
|
|
int rc;
|
|
int rets[3];
|
|
|
|
rc = read_slot_reset_state(pdn, rets);
|
|
|
|
if (rc) return rc;
|
|
|
|
if (rets[1] == 0) return -1; /* EEH is not supported */
|
|
if (rets[0] == 0) return 0; /* Oll Korrect */
|
|
if (rets[0] == 5) {
|
|
if (rets[2] == 0) return -1; /* permanently unavailable */
|
|
return rets[2]; /* number of millisecs to wait */
|
|
}
|
|
return -1;
|
|
}
|
|
|
|
/** rtas_pci_slot_reset raises/lowers the pci #RST line
|
|
* state: 1/0 to raise/lower the #RST
|
|
*
|
|
* Clear the EEH-frozen condition on a slot. This routine
|
|
* asserts the PCI #RST line if the 'state' argument is '1',
|
|
* and drops the #RST line if 'state is '0'. This routine is
|
|
* safe to call in an interrupt context.
|
|
*
|
|
*/
|
|
|
|
static void
|
|
rtas_pci_slot_reset(struct pci_dn *pdn, int state)
|
|
{
|
|
int rc;
|
|
|
|
BUG_ON (pdn==NULL);
|
|
|
|
if (!pdn->phb) {
|
|
printk (KERN_WARNING "EEH: in slot reset, device node %s has no phb\n",
|
|
pdn->node->full_name);
|
|
return;
|
|
}
|
|
|
|
rc = rtas_call(ibm_set_slot_reset,4,1, NULL,
|
|
pdn->eeh_config_addr,
|
|
BUID_HI(pdn->phb->buid),
|
|
BUID_LO(pdn->phb->buid),
|
|
state);
|
|
if (rc) {
|
|
printk (KERN_WARNING "EEH: Unable to reset the failed slot, (%d) #RST=%d dn=%s\n",
|
|
rc, state, pdn->node->full_name);
|
|
return;
|
|
}
|
|
}
|
|
|
|
/** rtas_set_slot_reset -- assert the pci #RST line for 1/4 second
|
|
* dn -- device node to be reset.
|
|
*/
|
|
|
|
void
|
|
rtas_set_slot_reset(struct pci_dn *pdn)
|
|
{
|
|
int i, rc;
|
|
|
|
rtas_pci_slot_reset (pdn, 1);
|
|
|
|
/* The PCI bus requires that the reset be held high for at least
|
|
* a 100 milliseconds. We wait a bit longer 'just in case'. */
|
|
|
|
#define PCI_BUS_RST_HOLD_TIME_MSEC 250
|
|
msleep (PCI_BUS_RST_HOLD_TIME_MSEC);
|
|
|
|
/* We might get hit with another EEH freeze as soon as the
|
|
* pci slot reset line is dropped. Make sure we don't miss
|
|
* these, and clear the flag now. */
|
|
eeh_clear_slot (pdn->node, EEH_MODE_ISOLATED);
|
|
|
|
rtas_pci_slot_reset (pdn, 0);
|
|
|
|
/* After a PCI slot has been reset, the PCI Express spec requires
|
|
* a 1.5 second idle time for the bus to stabilize, before starting
|
|
* up traffic. */
|
|
#define PCI_BUS_SETTLE_TIME_MSEC 1800
|
|
msleep (PCI_BUS_SETTLE_TIME_MSEC);
|
|
|
|
/* Now double check with the firmware to make sure the device is
|
|
* ready to be used; if not, wait for recovery. */
|
|
for (i=0; i<10; i++) {
|
|
rc = eeh_slot_availability (pdn);
|
|
if (rc <= 0) break;
|
|
|
|
msleep (rc+100);
|
|
}
|
|
}
|
|
|
|
/* ------------------------------------------------------- */
|
|
/** Save and restore of PCI BARs
|
|
*
|
|
* Although firmware will set up BARs during boot, it doesn't
|
|
* set up device BAR's after a device reset, although it will,
|
|
* if requested, set up bridge configuration. Thus, we need to
|
|
* configure the PCI devices ourselves.
|
|
*/
|
|
|
|
/**
|
|
* __restore_bars - Restore the Base Address Registers
|
|
* Loads the PCI configuration space base address registers,
|
|
* the expansion ROM base address, the latency timer, and etc.
|
|
* from the saved values in the device node.
|
|
*/
|
|
static inline void __restore_bars (struct pci_dn *pdn)
|
|
{
|
|
int i;
|
|
|
|
if (NULL==pdn->phb) return;
|
|
for (i=4; i<10; i++) {
|
|
rtas_write_config(pdn, i*4, 4, pdn->config_space[i]);
|
|
}
|
|
|
|
/* 12 == Expansion ROM Address */
|
|
rtas_write_config(pdn, 12*4, 4, pdn->config_space[12]);
|
|
|
|
#define BYTE_SWAP(OFF) (8*((OFF)/4)+3-(OFF))
|
|
#define SAVED_BYTE(OFF) (((u8 *)(pdn->config_space))[BYTE_SWAP(OFF)])
|
|
|
|
rtas_write_config (pdn, PCI_CACHE_LINE_SIZE, 1,
|
|
SAVED_BYTE(PCI_CACHE_LINE_SIZE));
|
|
|
|
rtas_write_config (pdn, PCI_LATENCY_TIMER, 1,
|
|
SAVED_BYTE(PCI_LATENCY_TIMER));
|
|
|
|
/* max latency, min grant, interrupt pin and line */
|
|
rtas_write_config(pdn, 15*4, 4, pdn->config_space[15]);
|
|
}
|
|
|
|
/**
|
|
* eeh_restore_bars - restore the PCI config space info
|
|
*
|
|
* This routine performs a recursive walk to the children
|
|
* of this device as well.
|
|
*/
|
|
void eeh_restore_bars(struct pci_dn *pdn)
|
|
{
|
|
struct device_node *dn;
|
|
if (!pdn)
|
|
return;
|
|
|
|
if (! pdn->eeh_is_bridge)
|
|
__restore_bars (pdn);
|
|
|
|
dn = pdn->node->child;
|
|
while (dn) {
|
|
eeh_restore_bars (PCI_DN(dn));
|
|
dn = dn->sibling;
|
|
}
|
|
}
|
|
|
|
/**
|
|
* eeh_save_bars - save device bars
|
|
*
|
|
* Save the values of the device bars. Unlike the restore
|
|
* routine, this routine is *not* recursive. This is because
|
|
* PCI devices are added individuallly; but, for the restore,
|
|
* an entire slot is reset at a time.
|
|
*/
|
|
static void eeh_save_bars(struct pci_dev * pdev, struct pci_dn *pdn)
|
|
{
|
|
int i;
|
|
|
|
if (!pdev || !pdn )
|
|
return;
|
|
|
|
for (i = 0; i < 16; i++)
|
|
pci_read_config_dword(pdev, i * 4, &pdn->config_space[i]);
|
|
|
|
if (pdev->hdr_type == PCI_HEADER_TYPE_BRIDGE)
|
|
pdn->eeh_is_bridge = 1;
|
|
}
|
|
|
|
void
|
|
rtas_configure_bridge(struct pci_dn *pdn)
|
|
{
|
|
int token = rtas_token ("ibm,configure-bridge");
|
|
int rc;
|
|
|
|
if (token == RTAS_UNKNOWN_SERVICE)
|
|
return;
|
|
rc = rtas_call(token,3,1, NULL,
|
|
pdn->eeh_config_addr,
|
|
BUID_HI(pdn->phb->buid),
|
|
BUID_LO(pdn->phb->buid));
|
|
if (rc) {
|
|
printk (KERN_WARNING "EEH: Unable to configure device bridge (%d) for %s\n",
|
|
rc, pdn->node->full_name);
|
|
}
|
|
}
|
|
|
|
/* ------------------------------------------------------------- */
|
|
/* The code below deals with enabling EEH for devices during the
|
|
* early boot sequence. EEH must be enabled before any PCI probing
|
|
* can be done.
|
|
*/
|
|
|
|
#define EEH_ENABLE 1
|
|
|
|
struct eeh_early_enable_info {
|
|
unsigned int buid_hi;
|
|
unsigned int buid_lo;
|
|
};
|
|
|
|
/* Enable eeh for the given device node. */
|
|
static void *early_enable_eeh(struct device_node *dn, void *data)
|
|
{
|
|
struct eeh_early_enable_info *info = data;
|
|
int ret;
|
|
char *status = get_property(dn, "status", NULL);
|
|
u32 *class_code = (u32 *)get_property(dn, "class-code", NULL);
|
|
u32 *vendor_id = (u32 *)get_property(dn, "vendor-id", NULL);
|
|
u32 *device_id = (u32 *)get_property(dn, "device-id", NULL);
|
|
u32 *regs;
|
|
int enable;
|
|
struct pci_dn *pdn = PCI_DN(dn);
|
|
|
|
pdn->eeh_mode = 0;
|
|
pdn->eeh_check_count = 0;
|
|
pdn->eeh_freeze_count = 0;
|
|
|
|
if (status && strcmp(status, "ok") != 0)
|
|
return NULL; /* ignore devices with bad status */
|
|
|
|
/* Ignore bad nodes. */
|
|
if (!class_code || !vendor_id || !device_id)
|
|
return NULL;
|
|
|
|
/* There is nothing to check on PCI to ISA bridges */
|
|
if (dn->type && !strcmp(dn->type, "isa")) {
|
|
pdn->eeh_mode |= EEH_MODE_NOCHECK;
|
|
return NULL;
|
|
}
|
|
|
|
/*
|
|
* Now decide if we are going to "Disable" EEH checking
|
|
* for this device. We still run with the EEH hardware active,
|
|
* but we won't be checking for ff's. This means a driver
|
|
* could return bad data (very bad!), an interrupt handler could
|
|
* hang waiting on status bits that won't change, etc.
|
|
* But there are a few cases like display devices that make sense.
|
|
*/
|
|
enable = 1; /* i.e. we will do checking */
|
|
if ((*class_code >> 16) == PCI_BASE_CLASS_DISPLAY)
|
|
enable = 0;
|
|
|
|
if (!enable)
|
|
pdn->eeh_mode |= EEH_MODE_NOCHECK;
|
|
|
|
/* Ok... see if this device supports EEH. Some do, some don't,
|
|
* and the only way to find out is to check each and every one. */
|
|
regs = (u32 *)get_property(dn, "reg", NULL);
|
|
if (regs) {
|
|
/* First register entry is addr (00BBSS00) */
|
|
/* Try to enable eeh */
|
|
ret = rtas_call(ibm_set_eeh_option, 4, 1, NULL,
|
|
regs[0], info->buid_hi, info->buid_lo,
|
|
EEH_ENABLE);
|
|
|
|
if (ret == 0) {
|
|
eeh_subsystem_enabled = 1;
|
|
pdn->eeh_mode |= EEH_MODE_SUPPORTED;
|
|
pdn->eeh_config_addr = regs[0];
|
|
#ifdef DEBUG
|
|
printk(KERN_DEBUG "EEH: %s: eeh enabled\n", dn->full_name);
|
|
#endif
|
|
} else {
|
|
|
|
/* This device doesn't support EEH, but it may have an
|
|
* EEH parent, in which case we mark it as supported. */
|
|
if (dn->parent && PCI_DN(dn->parent)
|
|
&& (PCI_DN(dn->parent)->eeh_mode & EEH_MODE_SUPPORTED)) {
|
|
/* Parent supports EEH. */
|
|
pdn->eeh_mode |= EEH_MODE_SUPPORTED;
|
|
pdn->eeh_config_addr = PCI_DN(dn->parent)->eeh_config_addr;
|
|
return NULL;
|
|
}
|
|
}
|
|
} else {
|
|
printk(KERN_WARNING "EEH: %s: unable to get reg property.\n",
|
|
dn->full_name);
|
|
}
|
|
|
|
return NULL;
|
|
}
|
|
|
|
/*
|
|
* Initialize EEH by trying to enable it for all of the adapters in the system.
|
|
* As a side effect we can determine here if eeh is supported at all.
|
|
* Note that we leave EEH on so failed config cycles won't cause a machine
|
|
* check. If a user turns off EEH for a particular adapter they are really
|
|
* telling Linux to ignore errors. Some hardware (e.g. POWER5) won't
|
|
* grant access to a slot if EEH isn't enabled, and so we always enable
|
|
* EEH for all slots/all devices.
|
|
*
|
|
* The eeh-force-off option disables EEH checking globally, for all slots.
|
|
* Even if force-off is set, the EEH hardware is still enabled, so that
|
|
* newer systems can boot.
|
|
*/
|
|
void __init eeh_init(void)
|
|
{
|
|
struct device_node *phb, *np;
|
|
struct eeh_early_enable_info info;
|
|
|
|
spin_lock_init(&confirm_error_lock);
|
|
spin_lock_init(&slot_errbuf_lock);
|
|
|
|
np = of_find_node_by_path("/rtas");
|
|
if (np == NULL)
|
|
return;
|
|
|
|
ibm_set_eeh_option = rtas_token("ibm,set-eeh-option");
|
|
ibm_set_slot_reset = rtas_token("ibm,set-slot-reset");
|
|
ibm_read_slot_reset_state2 = rtas_token("ibm,read-slot-reset-state2");
|
|
ibm_read_slot_reset_state = rtas_token("ibm,read-slot-reset-state");
|
|
ibm_slot_error_detail = rtas_token("ibm,slot-error-detail");
|
|
|
|
if (ibm_set_eeh_option == RTAS_UNKNOWN_SERVICE)
|
|
return;
|
|
|
|
eeh_error_buf_size = rtas_token("rtas-error-log-max");
|
|
if (eeh_error_buf_size == RTAS_UNKNOWN_SERVICE) {
|
|
eeh_error_buf_size = 1024;
|
|
}
|
|
if (eeh_error_buf_size > RTAS_ERROR_LOG_MAX) {
|
|
printk(KERN_WARNING "EEH: rtas-error-log-max is bigger than allocated "
|
|
"buffer ! (%d vs %d)", eeh_error_buf_size, RTAS_ERROR_LOG_MAX);
|
|
eeh_error_buf_size = RTAS_ERROR_LOG_MAX;
|
|
}
|
|
|
|
/* Enable EEH for all adapters. Note that eeh requires buid's */
|
|
for (phb = of_find_node_by_name(NULL, "pci"); phb;
|
|
phb = of_find_node_by_name(phb, "pci")) {
|
|
unsigned long buid;
|
|
|
|
buid = get_phb_buid(phb);
|
|
if (buid == 0 || PCI_DN(phb) == NULL)
|
|
continue;
|
|
|
|
info.buid_lo = BUID_LO(buid);
|
|
info.buid_hi = BUID_HI(buid);
|
|
traverse_pci_devices(phb, early_enable_eeh, &info);
|
|
}
|
|
|
|
if (eeh_subsystem_enabled)
|
|
printk(KERN_INFO "EEH: PCI Enhanced I/O Error Handling Enabled\n");
|
|
else
|
|
printk(KERN_WARNING "EEH: No capable adapters found\n");
|
|
}
|
|
|
|
/**
|
|
* eeh_add_device_early - enable EEH for the indicated device_node
|
|
* @dn: device node for which to set up EEH
|
|
*
|
|
* This routine must be used to perform EEH initialization for PCI
|
|
* devices that were added after system boot (e.g. hotplug, dlpar).
|
|
* This routine must be called before any i/o is performed to the
|
|
* adapter (inluding any config-space i/o).
|
|
* Whether this actually enables EEH or not for this device depends
|
|
* on the CEC architecture, type of the device, on earlier boot
|
|
* command-line arguments & etc.
|
|
*/
|
|
void eeh_add_device_early(struct device_node *dn)
|
|
{
|
|
struct pci_controller *phb;
|
|
struct eeh_early_enable_info info;
|
|
|
|
if (!dn || !PCI_DN(dn))
|
|
return;
|
|
phb = PCI_DN(dn)->phb;
|
|
if (NULL == phb || 0 == phb->buid) {
|
|
printk(KERN_WARNING "EEH: Expected buid but found none for %s\n",
|
|
dn->full_name);
|
|
dump_stack();
|
|
return;
|
|
}
|
|
|
|
info.buid_hi = BUID_HI(phb->buid);
|
|
info.buid_lo = BUID_LO(phb->buid);
|
|
early_enable_eeh(dn, &info);
|
|
}
|
|
EXPORT_SYMBOL_GPL(eeh_add_device_early);
|
|
|
|
/**
|
|
* eeh_add_device_late - perform EEH initialization for the indicated pci device
|
|
* @dev: pci device for which to set up EEH
|
|
*
|
|
* This routine must be used to complete EEH initialization for PCI
|
|
* devices that were added after system boot (e.g. hotplug, dlpar).
|
|
*/
|
|
void eeh_add_device_late(struct pci_dev *dev)
|
|
{
|
|
struct device_node *dn;
|
|
struct pci_dn *pdn;
|
|
|
|
if (!dev || !eeh_subsystem_enabled)
|
|
return;
|
|
|
|
#ifdef DEBUG
|
|
printk(KERN_DEBUG "EEH: adding device %s\n", pci_name(dev));
|
|
#endif
|
|
|
|
pci_dev_get (dev);
|
|
dn = pci_device_to_OF_node(dev);
|
|
pdn = PCI_DN(dn);
|
|
pdn->pcidev = dev;
|
|
|
|
pci_addr_cache_insert_device (dev);
|
|
eeh_save_bars(dev, pdn);
|
|
}
|
|
EXPORT_SYMBOL_GPL(eeh_add_device_late);
|
|
|
|
/**
|
|
* eeh_remove_device - undo EEH setup for the indicated pci device
|
|
* @dev: pci device to be removed
|
|
*
|
|
* This routine should be when a device is removed from a running
|
|
* system (e.g. by hotplug or dlpar).
|
|
*/
|
|
void eeh_remove_device(struct pci_dev *dev)
|
|
{
|
|
struct device_node *dn;
|
|
if (!dev || !eeh_subsystem_enabled)
|
|
return;
|
|
|
|
/* Unregister the device with the EEH/PCI address search system */
|
|
#ifdef DEBUG
|
|
printk(KERN_DEBUG "EEH: remove device %s\n", pci_name(dev));
|
|
#endif
|
|
pci_addr_cache_remove_device(dev);
|
|
|
|
dn = pci_device_to_OF_node(dev);
|
|
PCI_DN(dn)->pcidev = NULL;
|
|
pci_dev_put (dev);
|
|
}
|
|
EXPORT_SYMBOL_GPL(eeh_remove_device);
|
|
|
|
static int proc_eeh_show(struct seq_file *m, void *v)
|
|
{
|
|
unsigned int cpu;
|
|
unsigned long ffs = 0, positives = 0, failures = 0;
|
|
unsigned long resets = 0;
|
|
unsigned long no_dev = 0, no_dn = 0, no_cfg = 0, no_check = 0;
|
|
|
|
for_each_cpu(cpu) {
|
|
ffs += per_cpu(total_mmio_ffs, cpu);
|
|
positives += per_cpu(false_positives, cpu);
|
|
failures += per_cpu(ignored_failures, cpu);
|
|
resets += per_cpu(slot_resets, cpu);
|
|
no_dev += per_cpu(no_device, cpu);
|
|
no_dn += per_cpu(no_dn, cpu);
|
|
no_cfg += per_cpu(no_cfg_addr, cpu);
|
|
no_check += per_cpu(ignored_check, cpu);
|
|
}
|
|
|
|
if (0 == eeh_subsystem_enabled) {
|
|
seq_printf(m, "EEH Subsystem is globally disabled\n");
|
|
seq_printf(m, "eeh_total_mmio_ffs=%ld\n", ffs);
|
|
} else {
|
|
seq_printf(m, "EEH Subsystem is enabled\n");
|
|
seq_printf(m,
|
|
"no device=%ld\n"
|
|
"no device node=%ld\n"
|
|
"no config address=%ld\n"
|
|
"check not wanted=%ld\n"
|
|
"eeh_total_mmio_ffs=%ld\n"
|
|
"eeh_false_positives=%ld\n"
|
|
"eeh_ignored_failures=%ld\n"
|
|
"eeh_slot_resets=%ld\n",
|
|
no_dev, no_dn, no_cfg, no_check,
|
|
ffs, positives, failures, resets);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int proc_eeh_open(struct inode *inode, struct file *file)
|
|
{
|
|
return single_open(file, proc_eeh_show, NULL);
|
|
}
|
|
|
|
static struct file_operations proc_eeh_operations = {
|
|
.open = proc_eeh_open,
|
|
.read = seq_read,
|
|
.llseek = seq_lseek,
|
|
.release = single_release,
|
|
};
|
|
|
|
static int __init eeh_init_proc(void)
|
|
{
|
|
struct proc_dir_entry *e;
|
|
|
|
if (platform_is_pseries()) {
|
|
e = create_proc_entry("ppc64/eeh", 0, NULL);
|
|
if (e)
|
|
e->proc_fops = &proc_eeh_operations;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
__initcall(eeh_init_proc);
|