59 lines
1.7 KiB
C
59 lines
1.7 KiB
C
/*
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* mailbox-omap.h
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*
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* Copyright (C) 2013 Texas Instruments, Inc.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _PLAT_MAILBOX_H
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#define _PLAT_MAILBOX_H
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/* Interrupt register configuration types */
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#define MBOX_INTR_CFG_TYPE1 (0)
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#define MBOX_INTR_CFG_TYPE2 (1)
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/**
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* struct omap_mbox_dev_info - OMAP mailbox device attribute info
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* @name: name of the mailbox device
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* @tx_id: mailbox queue id used for transmitting messages
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* @rx_id: mailbox queue id on which messages are received
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* @irq_id: irq identifier number to use from the hwmod data
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* @usr_id: mailbox user id for identifying the interrupt into
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* the MPU interrupt controller.
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*/
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struct omap_mbox_dev_info {
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const char *name;
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u32 tx_id;
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u32 rx_id;
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u32 irq_id;
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u32 usr_id;
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};
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/**
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* struct omap_mbox_pdata - OMAP mailbox platform data
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* @intr_type: type of interrupt configuration registers used
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while programming mailbox queue interrupts
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* @num_users: number of users (processor devices) that the mailbox
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* h/w block can interrupt
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* @num_fifos: number of h/w fifos within the mailbox h/w block
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* @info_cnt: number of mailbox devices for the platform
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* @info: array of mailbox device attributes
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*/
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struct omap_mbox_pdata {
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u32 intr_type;
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u32 num_users;
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u32 num_fifos;
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u32 info_cnt;
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struct omap_mbox_dev_info *info;
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};
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#endif /* _PLAT_MAILBOX_H */
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