860 lines
21 KiB
C
860 lines
21 KiB
C
/*
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* linux/arch/parisc/traps.c
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*
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* Copyright (C) 1991, 1992 Linus Torvalds
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* Copyright (C) 1999, 2000 Philipp Rumpf <prumpf@tux.org>
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*/
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/*
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* 'Traps.c' handles hardware traps and faults after we have saved some
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* state in 'asm.s'.
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*/
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#include <linux/config.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/string.h>
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#include <linux/errno.h>
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#include <linux/ptrace.h>
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#include <linux/timer.h>
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#include <linux/mm.h>
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#include <linux/module.h>
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#include <linux/smp.h>
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#include <linux/smp_lock.h>
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#include <linux/spinlock.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/console.h>
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#include <linux/kallsyms.h>
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#include <asm/assembly.h>
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#include <asm/system.h>
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#include <asm/uaccess.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/traps.h>
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#include <asm/unaligned.h>
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#include <asm/atomic.h>
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#include <asm/smp.h>
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#include <asm/pdc.h>
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#include <asm/pdc_chassis.h>
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#include <asm/unwind.h>
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#include "../math-emu/math-emu.h" /* for handle_fpe() */
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#define PRINT_USER_FAULTS /* (turn this on if you want user faults to be */
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/* dumped to the console via printk) */
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#if defined(CONFIG_SMP) || defined(CONFIG_DEBUG_SPINLOCK)
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DEFINE_SPINLOCK(pa_dbit_lock);
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#endif
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int printbinary(char *buf, unsigned long x, int nbits)
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{
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unsigned long mask = 1UL << (nbits - 1);
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while (mask != 0) {
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*buf++ = (mask & x ? '1' : '0');
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mask >>= 1;
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}
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*buf = '\0';
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return nbits;
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}
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#ifdef __LP64__
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#define RFMT "%016lx"
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#else
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#define RFMT "%08lx"
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#endif
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void show_regs(struct pt_regs *regs)
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{
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int i;
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char buf[128], *p;
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char *level;
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unsigned long cr30;
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unsigned long cr31;
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/* carlos says that gcc understands better memory in a struct,
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* and it makes our life easier with fpregs -- T-Bone */
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struct { u32 sw[2]; } s;
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level = user_mode(regs) ? KERN_DEBUG : KERN_CRIT;
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printk("%s\n", level); /* don't want to have that pretty register dump messed up */
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printk("%s YZrvWESTHLNXBCVMcbcbcbcbOGFRQPDI\n", level);
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printbinary(buf, regs->gr[0], 32);
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printk("%sPSW: %s %s\n", level, buf, print_tainted());
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for (i = 0; i < 32; i += 4) {
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int j;
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p = buf;
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p += sprintf(p, "%sr%02d-%02d ", level, i, i + 3);
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for (j = 0; j < 4; j++) {
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p += sprintf(p, " " RFMT, (i+j) == 0 ? 0 : regs->gr[i + j]);
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}
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printk("%s\n", buf);
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}
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for (i = 0; i < 8; i += 4) {
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int j;
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p = buf;
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p += sprintf(p, "%ssr%d-%d ", level, i, i + 3);
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for (j = 0; j < 4; j++) {
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p += sprintf(p, " " RFMT, regs->sr[i + j]);
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}
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printk("%s\n", buf);
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}
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/* FR are 64bit everywhere. Need to use asm to get the content
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* of fpsr/fper1, and we assume that we won't have a FP Identify
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* in our way, otherwise we're screwed.
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* The fldd is used to restore the T-bit if there was one, as the
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* store clears it anyway.
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* BTW, PA2.0 book says "thou shall not use fstw on FPSR/FPERs". */
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__asm__ (
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"fstd %%fr0,0(%1) \n\t"
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"fldd 0(%1),%%fr0 \n\t"
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: "=m" (s) : "r" (&s) : "%r0"
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);
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printk("%s\n", level);
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printk("%s VZOUICununcqcqcqcqcqcrmunTDVZOUI\n", level);
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printbinary(buf, s.sw[0], 32);
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printk("%sFPSR: %s\n", level, buf);
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printk("%sFPER1: %08x\n", level, s.sw[1]);
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/* here we'll print fr0 again, tho it'll be meaningless */
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for (i = 0; i < 32; i += 4) {
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int j;
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p = buf;
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p += sprintf(p, "%sfr%02d-%02d ", level, i, i + 3);
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for (j = 0; j < 4; j++)
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p += sprintf(p, " %016llx", (i+j) == 0 ? 0 : regs->fr[i+j]);
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printk("%s\n", buf);
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}
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cr30 = mfctl(30);
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cr31 = mfctl(31);
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printk("%s\n", level);
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printk("%sIASQ: " RFMT " " RFMT " IAOQ: " RFMT " " RFMT "\n",
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level, regs->iasq[0], regs->iasq[1], regs->iaoq[0], regs->iaoq[1]);
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printk("%s IIR: %08lx ISR: " RFMT " IOR: " RFMT "\n",
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level, regs->iir, regs->isr, regs->ior);
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printk("%s CPU: %8d CR30: " RFMT " CR31: " RFMT "\n",
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level, current_thread_info()->cpu, cr30, cr31);
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printk("%s ORIG_R28: " RFMT "\n", level, regs->orig_r28);
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printk(level);
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print_symbol(" IAOQ[0]: %s\n", regs->iaoq[0]);
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printk(level);
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print_symbol(" IAOQ[1]: %s\n", regs->iaoq[1]);
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printk(level);
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print_symbol(" RP(r2): %s\n", regs->gr[2]);
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}
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void dump_stack(void)
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{
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show_stack(NULL, NULL);
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}
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EXPORT_SYMBOL(dump_stack);
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static void do_show_stack(struct unwind_frame_info *info)
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{
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int i = 1;
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printk("Backtrace:\n");
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while (i <= 16) {
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if (unwind_once(info) < 0 || info->ip == 0)
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break;
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if (__kernel_text_address(info->ip)) {
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printk(" [<" RFMT ">] ", info->ip);
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#ifdef CONFIG_KALLSYMS
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print_symbol("%s\n", info->ip);
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#else
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if ((i & 0x03) == 0)
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printk("\n");
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#endif
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i++;
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}
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}
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printk("\n");
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}
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void show_stack(struct task_struct *task, unsigned long *s)
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{
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struct unwind_frame_info info;
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if (!task) {
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unsigned long sp;
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struct pt_regs *r;
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HERE:
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asm volatile ("copy %%r30, %0" : "=r"(sp));
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r = (struct pt_regs *)kmalloc(sizeof(struct pt_regs), GFP_KERNEL);
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if (!r)
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return;
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memset(r, 0, sizeof(struct pt_regs));
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r->iaoq[0] = (unsigned long)&&HERE;
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r->gr[2] = (unsigned long)__builtin_return_address(0);
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r->gr[30] = sp;
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unwind_frame_init(&info, current, r);
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kfree(r);
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} else {
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unwind_frame_init_from_blocked_task(&info, task);
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}
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do_show_stack(&info);
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}
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void die_if_kernel(char *str, struct pt_regs *regs, long err)
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{
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if (user_mode(regs)) {
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if (err == 0)
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return; /* STFU */
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printk(KERN_CRIT "%s (pid %d): %s (code %ld) at " RFMT "\n",
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current->comm, current->pid, str, err, regs->iaoq[0]);
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#ifdef PRINT_USER_FAULTS
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/* XXX for debugging only */
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show_regs(regs);
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#endif
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return;
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}
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oops_in_progress = 1;
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/* Amuse the user in a SPARC fashion */
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printk(
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" _______________________________ \n"
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" < Your System ate a SPARC! Gah! >\n"
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" ------------------------------- \n"
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" \\ ^__^\n"
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" \\ (xx)\\_______\n"
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" (__)\\ )\\/\\\n"
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" U ||----w |\n"
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" || ||\n");
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/* unlock the pdc lock if necessary */
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pdc_emergency_unlock();
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/* maybe the kernel hasn't booted very far yet and hasn't been able
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* to initialize the serial or STI console. In that case we should
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* re-enable the pdc console, so that the user will be able to
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* identify the problem. */
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if (!console_drivers)
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pdc_console_restart();
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printk(KERN_CRIT "%s (pid %d): %s (code %ld)\n",
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current->comm, current->pid, str, err);
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show_regs(regs);
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/* Wot's wrong wif bein' racy? */
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if (current->thread.flags & PARISC_KERNEL_DEATH) {
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printk(KERN_CRIT "%s() recursion detected.\n", __FUNCTION__);
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local_irq_enable();
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while (1);
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}
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current->thread.flags |= PARISC_KERNEL_DEATH;
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do_exit(SIGSEGV);
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}
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int syscall_ipi(int (*syscall) (struct pt_regs *), struct pt_regs *regs)
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{
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return syscall(regs);
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}
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/* gdb uses break 4,8 */
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#define GDB_BREAK_INSN 0x10004
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void handle_gdb_break(struct pt_regs *regs, int wot)
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{
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struct siginfo si;
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si.si_code = wot;
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si.si_addr = (void __user *) (regs->iaoq[0] & ~3);
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si.si_signo = SIGTRAP;
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si.si_errno = 0;
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force_sig_info(SIGTRAP, &si, current);
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}
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void handle_break(unsigned iir, struct pt_regs *regs)
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{
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struct siginfo si;
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switch(iir) {
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case 0x00:
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#ifdef PRINT_USER_FAULTS
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printk(KERN_DEBUG "break 0,0: pid=%d command='%s'\n",
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current->pid, current->comm);
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#endif
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die_if_kernel("Breakpoint", regs, 0);
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#ifdef PRINT_USER_FAULTS
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show_regs(regs);
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#endif
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si.si_code = TRAP_BRKPT;
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si.si_addr = (void __user *) (regs->iaoq[0] & ~3);
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si.si_signo = SIGTRAP;
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force_sig_info(SIGTRAP, &si, current);
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break;
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case GDB_BREAK_INSN:
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die_if_kernel("Breakpoint", regs, 0);
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handle_gdb_break(regs, TRAP_BRKPT);
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break;
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default:
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#ifdef PRINT_USER_FAULTS
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printk(KERN_DEBUG "break %#08x: pid=%d command='%s'\n",
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iir, current->pid, current->comm);
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show_regs(regs);
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#endif
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si.si_signo = SIGTRAP;
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si.si_code = TRAP_BRKPT;
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si.si_addr = (void __user *) (regs->iaoq[0] & ~3);
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force_sig_info(SIGTRAP, &si, current);
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return;
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}
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}
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int handle_toc(void)
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{
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printk(KERN_CRIT "TOC call.\n");
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return 0;
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}
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static void default_trap(int code, struct pt_regs *regs)
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{
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printk(KERN_ERR "Trap %d on CPU %d\n", code, smp_processor_id());
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show_regs(regs);
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}
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void (*cpu_lpmc) (int code, struct pt_regs *regs) = default_trap;
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void transfer_pim_to_trap_frame(struct pt_regs *regs)
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{
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register int i;
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extern unsigned int hpmc_pim_data[];
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struct pdc_hpmc_pim_11 *pim_narrow;
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struct pdc_hpmc_pim_20 *pim_wide;
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if (boot_cpu_data.cpu_type >= pcxu) {
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pim_wide = (struct pdc_hpmc_pim_20 *)hpmc_pim_data;
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/*
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* Note: The following code will probably generate a
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* bunch of truncation error warnings from the compiler.
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* Could be handled with an ifdef, but perhaps there
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* is a better way.
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*/
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regs->gr[0] = pim_wide->cr[22];
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for (i = 1; i < 32; i++)
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regs->gr[i] = pim_wide->gr[i];
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for (i = 0; i < 32; i++)
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regs->fr[i] = pim_wide->fr[i];
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for (i = 0; i < 8; i++)
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regs->sr[i] = pim_wide->sr[i];
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regs->iasq[0] = pim_wide->cr[17];
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regs->iasq[1] = pim_wide->iasq_back;
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regs->iaoq[0] = pim_wide->cr[18];
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regs->iaoq[1] = pim_wide->iaoq_back;
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regs->sar = pim_wide->cr[11];
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regs->iir = pim_wide->cr[19];
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regs->isr = pim_wide->cr[20];
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regs->ior = pim_wide->cr[21];
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}
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else {
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pim_narrow = (struct pdc_hpmc_pim_11 *)hpmc_pim_data;
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regs->gr[0] = pim_narrow->cr[22];
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for (i = 1; i < 32; i++)
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regs->gr[i] = pim_narrow->gr[i];
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for (i = 0; i < 32; i++)
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regs->fr[i] = pim_narrow->fr[i];
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for (i = 0; i < 8; i++)
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regs->sr[i] = pim_narrow->sr[i];
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regs->iasq[0] = pim_narrow->cr[17];
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regs->iasq[1] = pim_narrow->iasq_back;
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regs->iaoq[0] = pim_narrow->cr[18];
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regs->iaoq[1] = pim_narrow->iaoq_back;
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regs->sar = pim_narrow->cr[11];
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regs->iir = pim_narrow->cr[19];
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regs->isr = pim_narrow->cr[20];
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regs->ior = pim_narrow->cr[21];
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}
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/*
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* The following fields only have meaning if we came through
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* another path. So just zero them here.
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*/
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regs->ksp = 0;
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regs->kpc = 0;
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regs->orig_r28 = 0;
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}
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/*
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* This routine is called as a last resort when everything else
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* has gone clearly wrong. We get called for faults in kernel space,
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* and HPMC's.
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*/
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void parisc_terminate(char *msg, struct pt_regs *regs, int code, unsigned long offset)
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{
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static DEFINE_SPINLOCK(terminate_lock);
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oops_in_progress = 1;
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set_eiem(0);
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local_irq_disable();
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spin_lock(&terminate_lock);
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/* unlock the pdc lock if necessary */
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pdc_emergency_unlock();
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/* restart pdc console if necessary */
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if (!console_drivers)
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pdc_console_restart();
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/* Not all paths will gutter the processor... */
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switch(code){
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case 1:
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transfer_pim_to_trap_frame(regs);
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break;
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default:
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/* Fall through */
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break;
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}
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{
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/* show_stack(NULL, (unsigned long *)regs->gr[30]); */
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struct unwind_frame_info info;
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unwind_frame_init(&info, current, regs);
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do_show_stack(&info);
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}
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printk("\n");
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printk(KERN_CRIT "%s: Code=%d regs=%p (Addr=" RFMT ")\n",
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msg, code, regs, offset);
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show_regs(regs);
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spin_unlock(&terminate_lock);
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/* put soft power button back under hardware control;
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* if the user had pressed it once at any time, the
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* system will shut down immediately right here. */
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pdc_soft_power_button(0);
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/* Call kernel panic() so reboot timeouts work properly
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* FIXME: This function should be on the list of
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* panic notifiers, and we should call panic
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* directly from the location that we wish.
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* e.g. We should not call panic from
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* parisc_terminate, but rather the oter way around.
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* This hack works, prints the panic message twice,
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* and it enables reboot timers!
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*/
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panic(msg);
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}
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void handle_interruption(int code, struct pt_regs *regs)
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{
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unsigned long fault_address = 0;
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unsigned long fault_space = 0;
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struct siginfo si;
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if (code == 1)
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pdc_console_restart(); /* switch back to pdc if HPMC */
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else
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local_irq_enable();
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/* Security check:
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* If the priority level is still user, and the
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* faulting space is not equal to the active space
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* then the user is attempting something in a space
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* that does not belong to them. Kill the process.
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*
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* This is normally the situation when the user
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* attempts to jump into the kernel space at the
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* wrong offset, be it at the gateway page or a
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* random location.
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*
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* We cannot normally signal the process because it
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* could *be* on the gateway page, and processes
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* executing on the gateway page can't have signals
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* delivered.
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*
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* We merely readjust the address into the users
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* space, at a destination address of zero, and
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* allow processing to continue.
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*/
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if (((unsigned long)regs->iaoq[0] & 3) &&
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((unsigned long)regs->iasq[0] != (unsigned long)regs->sr[7])) {
|
|
/* Kill the user process later */
|
|
regs->iaoq[0] = 0 | 3;
|
|
regs->iaoq[1] = regs->iaoq[0] + 4;
|
|
regs->iasq[0] = regs->iasq[0] = regs->sr[7];
|
|
regs->gr[0] &= ~PSW_B;
|
|
return;
|
|
}
|
|
|
|
#if 0
|
|
printk(KERN_CRIT "Interruption # %d\n", code);
|
|
#endif
|
|
|
|
switch(code) {
|
|
|
|
case 1:
|
|
/* High-priority machine check (HPMC) */
|
|
|
|
/* set up a new led state on systems shipped with a LED State panel */
|
|
pdc_chassis_send_status(PDC_CHASSIS_DIRECT_HPMC);
|
|
|
|
parisc_terminate("High Priority Machine Check (HPMC)",
|
|
regs, code, 0);
|
|
/* NOT REACHED */
|
|
|
|
case 2:
|
|
/* Power failure interrupt */
|
|
printk(KERN_CRIT "Power failure interrupt !\n");
|
|
return;
|
|
|
|
case 3:
|
|
/* Recovery counter trap */
|
|
regs->gr[0] &= ~PSW_R;
|
|
if (user_space(regs))
|
|
handle_gdb_break(regs, TRAP_TRACE);
|
|
/* else this must be the start of a syscall - just let it run */
|
|
return;
|
|
|
|
case 5:
|
|
/* Low-priority machine check */
|
|
pdc_chassis_send_status(PDC_CHASSIS_DIRECT_LPMC);
|
|
|
|
flush_all_caches();
|
|
cpu_lpmc(5, regs);
|
|
return;
|
|
|
|
case 6:
|
|
/* Instruction TLB miss fault/Instruction page fault */
|
|
fault_address = regs->iaoq[0];
|
|
fault_space = regs->iasq[0];
|
|
break;
|
|
|
|
case 8:
|
|
/* Illegal instruction trap */
|
|
die_if_kernel("Illegal instruction", regs, code);
|
|
si.si_code = ILL_ILLOPC;
|
|
goto give_sigill;
|
|
|
|
case 9:
|
|
/* Break instruction trap */
|
|
handle_break(regs->iir,regs);
|
|
return;
|
|
|
|
case 10:
|
|
/* Privileged operation trap */
|
|
die_if_kernel("Privileged operation", regs, code);
|
|
si.si_code = ILL_PRVOPC;
|
|
goto give_sigill;
|
|
|
|
case 11:
|
|
/* Privileged register trap */
|
|
if ((regs->iir & 0xffdfffe0) == 0x034008a0) {
|
|
|
|
/* This is a MFCTL cr26/cr27 to gr instruction.
|
|
* PCXS traps on this, so we need to emulate it.
|
|
*/
|
|
|
|
if (regs->iir & 0x00200000)
|
|
regs->gr[regs->iir & 0x1f] = mfctl(27);
|
|
else
|
|
regs->gr[regs->iir & 0x1f] = mfctl(26);
|
|
|
|
regs->iaoq[0] = regs->iaoq[1];
|
|
regs->iaoq[1] += 4;
|
|
regs->iasq[0] = regs->iasq[1];
|
|
return;
|
|
}
|
|
|
|
die_if_kernel("Privileged register usage", regs, code);
|
|
si.si_code = ILL_PRVREG;
|
|
give_sigill:
|
|
si.si_signo = SIGILL;
|
|
si.si_errno = 0;
|
|
si.si_addr = (void __user *) regs->iaoq[0];
|
|
force_sig_info(SIGILL, &si, current);
|
|
return;
|
|
|
|
case 12:
|
|
/* Overflow Trap, let the userland signal handler do the cleanup */
|
|
si.si_signo = SIGFPE;
|
|
si.si_code = FPE_INTOVF;
|
|
si.si_addr = (void __user *) regs->iaoq[0];
|
|
force_sig_info(SIGFPE, &si, current);
|
|
return;
|
|
|
|
case 13:
|
|
/* Conditional Trap
|
|
The condition succees in an instruction which traps
|
|
on condition */
|
|
if(user_mode(regs)){
|
|
si.si_signo = SIGFPE;
|
|
/* Set to zero, and let the userspace app figure it out from
|
|
the insn pointed to by si_addr */
|
|
si.si_code = 0;
|
|
si.si_addr = (void __user *) regs->iaoq[0];
|
|
force_sig_info(SIGFPE, &si, current);
|
|
return;
|
|
}
|
|
/* The kernel doesn't want to handle condition codes */
|
|
break;
|
|
|
|
case 14:
|
|
/* Assist Exception Trap, i.e. floating point exception. */
|
|
die_if_kernel("Floating point exception", regs, 0); /* quiet */
|
|
handle_fpe(regs);
|
|
return;
|
|
|
|
case 15:
|
|
/* Data TLB miss fault/Data page fault */
|
|
/* Fall through */
|
|
case 16:
|
|
/* Non-access instruction TLB miss fault */
|
|
/* The instruction TLB entry needed for the target address of the FIC
|
|
is absent, and hardware can't find it, so we get to cleanup */
|
|
/* Fall through */
|
|
case 17:
|
|
/* Non-access data TLB miss fault/Non-access data page fault */
|
|
/* FIXME:
|
|
Still need to add slow path emulation code here!
|
|
If the insn used a non-shadow register, then the tlb
|
|
handlers could not have their side-effect (e.g. probe
|
|
writing to a target register) emulated since rfir would
|
|
erase the changes to said register. Instead we have to
|
|
setup everything, call this function we are in, and emulate
|
|
by hand. Technically we need to emulate:
|
|
fdc,fdce,pdc,"fic,4f",prober,probeir,probew, probeiw
|
|
*/
|
|
fault_address = regs->ior;
|
|
fault_space = regs->isr;
|
|
break;
|
|
|
|
case 18:
|
|
/* PCXS only -- later cpu's split this into types 26,27 & 28 */
|
|
/* Check for unaligned access */
|
|
if (check_unaligned(regs)) {
|
|
handle_unaligned(regs);
|
|
return;
|
|
}
|
|
/* Fall Through */
|
|
case 26:
|
|
/* PCXL: Data memory access rights trap */
|
|
fault_address = regs->ior;
|
|
fault_space = regs->isr;
|
|
break;
|
|
|
|
case 19:
|
|
/* Data memory break trap */
|
|
regs->gr[0] |= PSW_X; /* So we can single-step over the trap */
|
|
/* fall thru */
|
|
case 21:
|
|
/* Page reference trap */
|
|
handle_gdb_break(regs, TRAP_HWBKPT);
|
|
return;
|
|
|
|
case 25:
|
|
/* Taken branch trap */
|
|
regs->gr[0] &= ~PSW_T;
|
|
if (user_space(regs))
|
|
handle_gdb_break(regs, TRAP_BRANCH);
|
|
/* else this must be the start of a syscall - just let it
|
|
* run.
|
|
*/
|
|
return;
|
|
|
|
case 7:
|
|
/* Instruction access rights */
|
|
/* PCXL: Instruction memory protection trap */
|
|
|
|
/*
|
|
* This could be caused by either: 1) a process attempting
|
|
* to execute within a vma that does not have execute
|
|
* permission, or 2) an access rights violation caused by a
|
|
* flush only translation set up by ptep_get_and_clear().
|
|
* So we check the vma permissions to differentiate the two.
|
|
* If the vma indicates we have execute permission, then
|
|
* the cause is the latter one. In this case, we need to
|
|
* call do_page_fault() to fix the problem.
|
|
*/
|
|
|
|
if (user_mode(regs)) {
|
|
struct vm_area_struct *vma;
|
|
|
|
down_read(¤t->mm->mmap_sem);
|
|
vma = find_vma(current->mm,regs->iaoq[0]);
|
|
if (vma && (regs->iaoq[0] >= vma->vm_start)
|
|
&& (vma->vm_flags & VM_EXEC)) {
|
|
|
|
fault_address = regs->iaoq[0];
|
|
fault_space = regs->iasq[0];
|
|
|
|
up_read(¤t->mm->mmap_sem);
|
|
break; /* call do_page_fault() */
|
|
}
|
|
up_read(¤t->mm->mmap_sem);
|
|
}
|
|
/* Fall Through */
|
|
case 27:
|
|
/* Data memory protection ID trap */
|
|
die_if_kernel("Protection id trap", regs, code);
|
|
si.si_code = SEGV_MAPERR;
|
|
si.si_signo = SIGSEGV;
|
|
si.si_errno = 0;
|
|
if (code == 7)
|
|
si.si_addr = (void __user *) regs->iaoq[0];
|
|
else
|
|
si.si_addr = (void __user *) regs->ior;
|
|
force_sig_info(SIGSEGV, &si, current);
|
|
return;
|
|
|
|
case 28:
|
|
/* Unaligned data reference trap */
|
|
handle_unaligned(regs);
|
|
return;
|
|
|
|
default:
|
|
if (user_mode(regs)) {
|
|
#ifdef PRINT_USER_FAULTS
|
|
printk(KERN_DEBUG "\nhandle_interruption() pid=%d command='%s'\n",
|
|
current->pid, current->comm);
|
|
show_regs(regs);
|
|
#endif
|
|
/* SIGBUS, for lack of a better one. */
|
|
si.si_signo = SIGBUS;
|
|
si.si_code = BUS_OBJERR;
|
|
si.si_errno = 0;
|
|
si.si_addr = (void __user *) regs->ior;
|
|
force_sig_info(SIGBUS, &si, current);
|
|
return;
|
|
}
|
|
pdc_chassis_send_status(PDC_CHASSIS_DIRECT_PANIC);
|
|
|
|
parisc_terminate("Unexpected interruption", regs, code, 0);
|
|
/* NOT REACHED */
|
|
}
|
|
|
|
if (user_mode(regs)) {
|
|
if ((fault_space >> SPACEID_SHIFT) != (regs->sr[7] >> SPACEID_SHIFT)) {
|
|
#ifdef PRINT_USER_FAULTS
|
|
if (fault_space == 0)
|
|
printk(KERN_DEBUG "User Fault on Kernel Space ");
|
|
else
|
|
printk(KERN_DEBUG "User Fault (long pointer) (fault %d) ",
|
|
code);
|
|
printk("pid=%d command='%s'\n", current->pid, current->comm);
|
|
show_regs(regs);
|
|
#endif
|
|
si.si_signo = SIGSEGV;
|
|
si.si_errno = 0;
|
|
si.si_code = SEGV_MAPERR;
|
|
si.si_addr = (void __user *) regs->ior;
|
|
force_sig_info(SIGSEGV, &si, current);
|
|
return;
|
|
}
|
|
}
|
|
else {
|
|
|
|
/*
|
|
* The kernel should never fault on its own address space.
|
|
*/
|
|
|
|
if (fault_space == 0)
|
|
{
|
|
pdc_chassis_send_status(PDC_CHASSIS_DIRECT_PANIC);
|
|
parisc_terminate("Kernel Fault", regs, code, fault_address);
|
|
|
|
}
|
|
}
|
|
|
|
do_page_fault(regs, code, fault_address);
|
|
}
|
|
|
|
|
|
int __init check_ivt(void *iva)
|
|
{
|
|
int i;
|
|
u32 check = 0;
|
|
u32 *ivap;
|
|
u32 *hpmcp;
|
|
u32 length;
|
|
extern void os_hpmc(void);
|
|
extern void os_hpmc_end(void);
|
|
|
|
if (strcmp((char *)iva, "cows can fly"))
|
|
return -1;
|
|
|
|
ivap = (u32 *)iva;
|
|
|
|
for (i = 0; i < 8; i++)
|
|
*ivap++ = 0;
|
|
|
|
/* Compute Checksum for HPMC handler */
|
|
|
|
length = (u32)((unsigned long)os_hpmc_end - (unsigned long)os_hpmc);
|
|
ivap[7] = length;
|
|
|
|
hpmcp = (u32 *)os_hpmc;
|
|
|
|
for (i=0; i<length/4; i++)
|
|
check += *hpmcp++;
|
|
|
|
for (i=0; i<8; i++)
|
|
check += ivap[i];
|
|
|
|
ivap[5] = -check;
|
|
|
|
return 0;
|
|
}
|
|
|
|
#ifndef __LP64__
|
|
extern const void fault_vector_11;
|
|
#endif
|
|
extern const void fault_vector_20;
|
|
|
|
void __init trap_init(void)
|
|
{
|
|
void *iva;
|
|
|
|
if (boot_cpu_data.cpu_type >= pcxu)
|
|
iva = (void *) &fault_vector_20;
|
|
else
|
|
#ifdef __LP64__
|
|
panic("Can't boot 64-bit OS on PA1.1 processor!");
|
|
#else
|
|
iva = (void *) &fault_vector_11;
|
|
#endif
|
|
|
|
if (check_ivt(iva))
|
|
panic("IVT invalid");
|
|
}
|