275 lines
6.2 KiB
C
275 lines
6.2 KiB
C
/*
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* arch/arm/mach-pnx4008/core.c
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*
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* PNX4008 core startup code
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*
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* Authors: Vitaly Wool, Dmitry Chigirev,
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* Grigory Tolstolytkin, Dmitry Pervushin <source@mvista.com>
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*
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* Based on reference code received from Philips:
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* Copyright (C) 2003 Philips Semiconductors
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*
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* 2005 (c) MontaVista Software, Inc. This file is licensed under
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* the terms of the GNU General Public License version 2. This program
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* is licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/mm.h>
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#include <linux/interrupt.h>
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#include <linux/list.h>
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#include <linux/init.h>
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#include <linux/ioport.h>
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#include <linux/serial_8250.h>
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#include <linux/device.h>
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#include <linux/spi/spi.h>
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#include <asm/hardware.h>
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#include <asm/io.h>
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#include <asm/setup.h>
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#include <asm/mach-types.h>
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#include <asm/pgtable.h>
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#include <asm/page.h>
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#include <asm/system.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/mach/time.h>
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#include <asm/arch/irq.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/dma.h>
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struct resource spipnx_0_resources[] = {
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{
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.start = PNX4008_SPI1_BASE,
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.end = PNX4008_SPI1_BASE + SZ_4K,
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.flags = IORESOURCE_MEM,
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}, {
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.start = PER_SPI1_REC_XMIT,
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.flags = IORESOURCE_DMA,
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}, {
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.start = SPI1_INT,
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.flags = IORESOURCE_IRQ,
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}, {
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.flags = 0,
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},
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};
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struct resource spipnx_1_resources[] = {
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{
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.start = PNX4008_SPI2_BASE,
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.end = PNX4008_SPI2_BASE + SZ_4K,
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.flags = IORESOURCE_MEM,
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}, {
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.start = PER_SPI2_REC_XMIT,
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.flags = IORESOURCE_DMA,
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}, {
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.start = SPI2_INT,
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.flags = IORESOURCE_IRQ,
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}, {
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.flags = 0,
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}
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};
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static struct spi_board_info spi_board_info[] __initdata = {
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{
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.modalias = "m25p80",
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.max_speed_hz = 1000000,
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.bus_num = 1,
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.chip_select = 0,
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},
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};
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static struct platform_device spipnx_1 = {
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.name = "spipnx",
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.id = 1,
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.num_resources = ARRAY_SIZE(spipnx_0_resources),
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.resource = spipnx_0_resources,
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.dev = {
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.coherent_dma_mask = 0xFFFFFFFF,
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},
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};
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static struct platform_device spipnx_2 = {
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.name = "spipnx",
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.id = 2,
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.num_resources = ARRAY_SIZE(spipnx_1_resources),
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.resource = spipnx_1_resources,
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.dev = {
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.coherent_dma_mask = 0xFFFFFFFF,
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},
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};
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static struct plat_serial8250_port platform_serial_ports[] = {
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{
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.membase = (void *)__iomem(IO_ADDRESS(PNX4008_UART5_BASE)),
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.mapbase = (unsigned long)PNX4008_UART5_BASE,
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.irq = IIR5_INT,
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.uartclk = PNX4008_UART_CLK,
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.regshift = 2,
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.iotype = UPIO_MEM,
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.flags = UPF_BOOT_AUTOCONF | UPF_BUGGY_UART | UPF_SKIP_TEST,
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},
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{
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.membase = (void *)__iomem(IO_ADDRESS(PNX4008_UART3_BASE)),
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.mapbase = (unsigned long)PNX4008_UART3_BASE,
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.irq = IIR3_INT,
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.uartclk = PNX4008_UART_CLK,
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.regshift = 2,
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.iotype = UPIO_MEM,
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.flags = UPF_BOOT_AUTOCONF | UPF_BUGGY_UART | UPF_SKIP_TEST,
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},
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{}
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};
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static struct platform_device serial_device = {
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.name = "serial8250",
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.id = PLAT8250_DEV_PLATFORM,
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.dev = {
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.platform_data = &platform_serial_ports,
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},
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};
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static struct platform_device nand_flash_device = {
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.name = "pnx4008-flash",
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.id = -1,
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.dev = {
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.coherent_dma_mask = 0xFFFFFFFF,
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},
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};
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/* The dmamask must be set for OHCI to work */
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static u64 ohci_dmamask = ~(u32) 0;
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static struct resource ohci_resources[] = {
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{
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.start = IO_ADDRESS(PNX4008_USB_CONFIG_BASE),
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.end = IO_ADDRESS(PNX4008_USB_CONFIG_BASE + 0x100),
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.flags = IORESOURCE_MEM,
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}, {
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.start = USB_HOST_INT,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device ohci_device = {
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.name = "pnx4008-usb-ohci",
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.id = -1,
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.dev = {
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.dma_mask = &ohci_dmamask,
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.coherent_dma_mask = 0xffffffff,
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},
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.num_resources = ARRAY_SIZE(ohci_resources),
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.resource = ohci_resources,
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};
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static struct platform_device sdum_device = {
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.name = "pnx4008-sdum",
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.id = 0,
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.dev = {
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.coherent_dma_mask = 0xffffffff,
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},
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};
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static struct platform_device rgbfb_device = {
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.name = "pnx4008-rgbfb",
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.id = 0,
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.dev = {
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.coherent_dma_mask = 0xffffffff,
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}
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};
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struct resource watchdog_resources[] = {
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{
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.start = PNX4008_WDOG_BASE,
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.end = PNX4008_WDOG_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device watchdog_device = {
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.name = "pnx4008-watchdog",
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.id = -1,
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.num_resources = ARRAY_SIZE(watchdog_resources),
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.resource = watchdog_resources,
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};
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static struct platform_device *devices[] __initdata = {
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&spipnx_1,
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&spipnx_2,
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&serial_device,
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&ohci_device,
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&nand_flash_device,
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&sdum_device,
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&rgbfb_device,
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&watchdog_device,
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};
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extern void pnx4008_uart_init(void);
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static void __init pnx4008_init(void)
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{
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/*disable all START interrupt sources,
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and clear all START interrupt flags */
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__raw_writel(0, START_INT_ER_REG(SE_PIN_BASE_INT));
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__raw_writel(0, START_INT_ER_REG(SE_INT_BASE_INT));
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__raw_writel(0xffffffff, START_INT_RSR_REG(SE_PIN_BASE_INT));
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__raw_writel(0xffffffff, START_INT_RSR_REG(SE_INT_BASE_INT));
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platform_add_devices(devices, ARRAY_SIZE(devices));
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spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
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/* Switch on the UART clocks */
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pnx4008_uart_init();
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}
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static struct map_desc pnx4008_io_desc[] __initdata = {
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{
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.virtual = IO_ADDRESS(PNX4008_IRAM_BASE),
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.pfn = __phys_to_pfn(PNX4008_IRAM_BASE),
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.length = SZ_64K,
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.type = MT_DEVICE,
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}, {
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.virtual = IO_ADDRESS(PNX4008_NDF_FLASH_BASE),
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.pfn = __phys_to_pfn(PNX4008_NDF_FLASH_BASE),
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.length = SZ_1M - SZ_128K,
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.type = MT_DEVICE,
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}, {
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.virtual = IO_ADDRESS(PNX4008_JPEG_CONFIG_BASE),
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.pfn = __phys_to_pfn(PNX4008_JPEG_CONFIG_BASE),
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.length = SZ_128K * 3,
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.type = MT_DEVICE,
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}, {
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.virtual = IO_ADDRESS(PNX4008_DMA_CONFIG_BASE),
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.pfn = __phys_to_pfn(PNX4008_DMA_CONFIG_BASE),
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.length = SZ_1M,
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.type = MT_DEVICE,
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}, {
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.virtual = IO_ADDRESS(PNX4008_AHB2FAB_BASE),
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.pfn = __phys_to_pfn(PNX4008_AHB2FAB_BASE),
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.length = SZ_1M,
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.type = MT_DEVICE,
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},
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};
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void __init pnx4008_map_io(void)
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{
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iotable_init(pnx4008_io_desc, ARRAY_SIZE(pnx4008_io_desc));
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}
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extern struct sys_timer pnx4008_timer;
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MACHINE_START(PNX4008, "Philips PNX4008")
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/* Maintainer: MontaVista Software Inc. */
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.phys_io = 0x40090000,
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.io_pg_offst = (0xf4090000 >> 18) & 0xfffc,
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.boot_params = 0x80000100,
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.map_io = pnx4008_map_io,
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.init_irq = pnx4008_init_irq,
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.init_machine = pnx4008_init,
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.timer = &pnx4008_timer,
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MACHINE_END
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