28232a4317
We have been a little loose with our intermediate VMCR representation where we had a 'ctlr' field, but we failed to differentiate between the GICv2 GICC_CTLR and ICC_CTLR_EL1 layouts, and therefore ended up mapping the wrong bits into the individual fields of the ICH_VMCR_EL2 when emulating a GICv2 on a GICv3 system. Fix this by using explicit fields for the VMCR bits instead. Cc: Eric Auger <eric.auger@redhat.com> Reported-by: wanghaibin <wanghaibin.wang@huawei.com> Signed-off-by: Christoffer Dall <cdall@linaro.org> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Tested-by: Marc Zyngier <marc.zyngier@arm.com> |
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| .. | ||
| arm-gic-common.h | ||
| arm-gic-v3.h | ||
| arm-gic.h | ||
| arm-vic.h | ||
| chained_irq.h | ||
| ingenic.h | ||
| irq-omap-intc.h | ||
| irq-partition-percpu.h | ||
| irq-sa11x0.h | ||
| metag-ext.h | ||
| metag.h | ||
| mips-gic.h | ||
| mmp.h | ||
| mxs.h | ||
| versatile-fpga.h | ||
| xtensa-mx.h | ||
| xtensa-pic.h | ||